Abstract: A composite BPSG insulating and planarizing layer is formed over stepped surfaces of a semiconductor wafer by a novel two step process. The composite BPSG layer is characterized by the absence of discernible voids and a surface which is resistant to loss of boron in a subsequent etching step. The two step deposition process comprises a first step to form a void-free BPSG layer by a CVD deposition using gaseous sources of phosphorus and boron dopants and tetraethylorthosilicate (TEOS) as the source of silicon; and then a second step to form a capping layer of BPSG by a plasma-assisted CVD deposition process while again using gaseous sources of phosphorus and boron dopants, and TEOS as the source of silicon, to provide a BPSG cap layer having a surface which is non-hygroscopic and resistant to loss of boron by subsequent etching.

Abstract: A method is described for cleaning a silicon surface of a semiconductor wafer in a vacuum chamber while radiantly heating said silicon surface to maintain it within a first temperature range in the presence of hydrogen gas; then quickly cooling the wafer down to a second temperature range by reducing the radiant heat; and then forming a layer of either polysilicon or oxide over the cleaned surface within this second temperature range without removing the cleaned wafer from the chamber. By cleaning the wafer and then depositing polysilicon or growing oxide over the cleaned silicon surface in the same vacuum chamber, formation of oxides and other contaminants on the cleaned silicon surface between the cleaning step and the deposition or growth step is inhibited, resulting in a higher quality polysilicon or oxide layer formed over the cleaned silicon surface.

Abstract: A process for dynamically adjusting the concentration of one or more reactants in a plasma assisted process, such as a plasma etch process or a plasma deposition process, is described. The concentration of one or more reactants, as well as the concentration of a non-reactive gas, in a plasma enhanced process for the formation of an integrated circuit structure is quantitatively monitored by actinometry to derive a ratio of such concentrations of reactant to non-reactant. The concentration of the reactant or reactants in the plasma processing chamber is then maintained in the chamber by adjusting the flow of such reactant or reactants into the chamber based on changes in such ratio based on such continuous quantitative monitoring of the both the concentration of the reactant or reactants and that of the non-reactive (non-changing concentration) component.

Abstract: A process for etching tungsten silicide on a semiconductor wafer in a vacuum etch chamber in the presence of a plasma is described using chlorine (Cl.sub.2) and oxygen-bearing etchant gases in a ratio of not more that 20 volume % oxygen-bearing etchant gas, and preferably from about 6 to about 10 volume % oxygen-bearing etchant gas. The process is also capable of etching polysilicon and exhibits a high selectivity for both photoresist and oxide.

Abstract: A process is described for carrying out the dehydrogenation or hydrogenation, including hydrogenolysis, of a hydrocarbon in the presence of one or more soluble fullerene catalysts which have been dissolved in the hydrocarbon (when the hydrocarbon is a liquid capable of dissolving the fullerene catalyst) or dissolved in a solvent which is also a solvent for the hydrocarbon (when the hydrocarbon either is not a liquid or is not a liquid which is a solvent for the fullerene catalyst). The use of a liquid catalyst, i.e., a dissolved fullerene catalyst, inhibits coking reactions to thereby inhibit formation of coke on a solid catalyst or catalyst support by elimination of nucleation points or growth regions for such coke formation.

Abstract: An improved process is disclosed for depositing a layer of metal on a semiconductor wafer wherein a shadow ring normally engages the end edge of the front surface of the wafer to inhibit deposition of the metal on the backside of the wafer and a barrier or nucleation layer is deposited on the unshielded portion of the front surface of the wafer prior to the deposition of the metal layer thereon, and wherein gases used to form the metal layer may contact and react with underlying materials on the front surface of the wafer beneath the shadow ring.

Abstract: An improved clamping ring apparatus is disclosed comprising a clamping ring means for yieldably engaging a generally circular semiconductor wafer to peripherally clamp the wafer to a support pedestal to provide a peripheral seal between the wafer and the surface of the pedestal facing the wafer, adjacent the generally circular end edge of the wafer by providing a central generally circular opening in the clamping ring and a series of slots which radially extend outwardly from the central opening in the clamping ring means to thereby divide the inner portion of the clamping ring means into a series of yieldable fingers inwardly extending toward the central opening in the clamping ring means.

Abstract: A process and apparatus is disclosed for providing access to the interior of a vacuum deposition chamber in a vacuum deposition apparatus without exposing residues, such as chlorosilane residues, within the chamber to moisture and/or oxygen-containing gases. The process comprises first placing over the upper surface of the vacuum deposition apparatus an enclosure which has a bottom opening large enough to completely cover the top opening to the chamber, and which is capable of being filled with one or more non-reactive gases. One or more non-reactive gases are then flowed into the enclosure to purge moisture and/or oxygen-containing gases from the enclosure. After the enclosure has been mounted on the apparatus and purged by the flow of non-reactive gases therein, the vacuum deposition chamber may be opened, while continuing the flow of non-reactive gases into the enclosure.

Abstract: A method for forming an ionically bonded ammonium dinitramide salt having the formula NH.sub.4.sup.30 N(NO.sub.2).sub.2 - useful as a stable oxidizer for solid fuel rocket propellant or explosive formulations is disclosed. The ammonium dinitramide salt is formed by the reaction of ammonia and a nitronium-containing compound, such as a nitronium salt or a covalently bonded compound containing a NO.sub.2 - group, at a temperature of from about - 20.degree. C. to about 120.degree. C. The nitronium-containing compound may be either a covalently bonded compound containing a NO.sub.2 - group or a nitronium salt having the formula (NO.sub.2.sup.+).sub.n X.sup.-n, where X is the anion of the nitronium salt and n= 1-2.

Abstract: A two step process is disclosed for forming a silicon oxide layer over a stepped surface of a semiconductor wafer while inhibiting the formation of voids in the oxide layer which comprises depositing a layer of an oxide of silicon over a stepped surface of a semiconductor wafer in a CVD chamber by flowing into the chamber a gaseous mixture comprising a source of oxygen, a portion of which comprises O.sub.3, and tetraethylorthosilicate as the gaseous source of silicon while maintaining the pressure in the CVD chamber within a range of from about 250 Torr to about 760 Torr and then depositing a second layer of oxide over the first layer in a CVD chamber by flowing into the chamber a gaseous mixture comprising a source of oxygen, a portion of which comprises O.sub.3 ; and tetraethylorthosilicate as the gaseous source of silicon while maintaining the CVD chamber at a lower pressure than during the first deposition step.

Abstract: A process and apparatus is described for the production of purified fullerenes using a non-reactive gas to collect and transport impure fullerenes from an evaporation zone to a heated filter zone in which solid impurities may be filtered out of the mixture. If one or more condensed fullerenes are present in the gas stream entering the filter zone, such condensed fullerenes may be vaporized in the filter zone and carried to a condensation zone in which one or more vaporized fullerenes may be recovered. When more than one vaporized fullerene is present in the gas entering either the filter zone or the condensation zone, a temperature gradient may be used to permit separation and recovery of purified portions of different fullerenes.

Abstract: The invention comprises an improvement in the process wherein a polysilicon layer, which is formed over a step on an integrated circuit structure and masked with a photoresist, is anisotropically etched to remove the exposed portions of the polysilicon layer leaving sidewall residues of a polymerized silicon/oxide-containing material adjacent the polysilicon lines. The improvement comprises treating the integrated circuit substrate with an aqueous ammonium-containing base/peroxide solution to remove the residues of polymerized silicon/oxide-containing material, without undercutting the remaining polysilicon.

Abstract: An improved plasma etching apparatus is disclosed for the plasma etching of semiconductor wafers. The improvement includes conductive means for inhibiting arcing from electrical charges accumulating on one or more non-conductive protective surfaces on members at rf potential within the apparatus, such as the metal pedestal which supports the wafer being etched and supplies the rf potential to it, and the clamping ring mechanism which clamps the wafer to the pedestal. The conductive means may include one or more conductive plugs extending through one or more of the protective surfaces or a conductive ring surrounding the wafer on the top surface of the metal pedestal. The conductive material is selected from the class consisting of carbon; a silicide; titanium nitride; a carbide; and a semiconductor such as silicon doped to provide a resistivity ranging from about 0.001 to about 20 ohm-cm.

Abstract: A process is described for forming an aluminum plug in a via in an insulating layer in an integrated circuit structure by first depositing a layer of aluminum over the insulating layer in a multistep deposition which will also result in filling the via with aluminum to form an aluminum plug therein, followed by removal of any additional aluminum formed over the surface of the insulating layer, and subsequent formation of one or more patterned conductive layers over the insulating surface which is in electrical communication with the underlying aluminum plug in the via. The one or more patterned conductive layers formed over the insulating surface are characterized by superior electrical properties over the aluminum layer initially deposited and then removed. A barrier layer may be first formed over exposed portions of the underlying integrated circuit structure at the bottom of the via before it is filled with aluminum.

Abstract: An improved plasma etching apparatus is disclosed which includes an etch chamber having inner metal surfaces with a conductive coating formed thereon which is capable of protecting such inner metal surfaces from chemical attack by reactant gases such as halogen-containing gases used in said chamber during plasma etching processes. In a preferred embodiment, at least about 0.2 micrometers of a carbon coating is formed on the inner metal surfaces of the etch chamber by a plasma-assisted CVD process using a gaseous source of carbon and either hydrogen or nitrogen or both.

Abstract: A N,N-dinitramide salt is disclosed having the formula MN(NO.sub.2).sub.2 where M is a cation selected from the class consisting of a metal ion and a nitrogen-containing ion. The dinitramide salt exhibits high temperature stability, high energy density, and an absence of smoke generating halogens, rendering it useful as an oxidizer in rocket fuels. The dinitramide salts are meltable and pumpable oxidizers which may be used in start-stop rocket engines instead of other less stable oxidizers.

Abstract: An improved process is described for forming planar tungsten-filled contacts to a silicon substrate in contact openings through an insulating layer which provides for the formation of titanium silicide in and on the silicon surface at the bottom of the contact openings to provide low resistance silicide interconnections between the silicon substrate and the tungsten. A titanium nitride layer is formed over the titanium silicide and on the surfaces of the insulation layer, including the top surface of the insulation layer and the sidewall surfaces of the contact openings through the insulating layer. This titanium nitride layer provides a nucleation layer which permits a good bond to form from the tungsten through the titanium nitride and titanium silicide in the contact openings to the silicon substrate; and from the tungsten through the titanium nitride layer to the insulator material such as silicon dioxide (SO.sub.2), resulting in the formation of low resistance and low defect density contacts.

Abstract: A process is disclosed for forming shaped superconductors of the metal oxide type by electrophoretic deposition of superconducting particles which comprises providing particulate superconducting material of the metal oxide type coated with a fusible binder, electrophoretically depositing such coated superconducting particles on a substrate, heating the coated substrate sufficiently to fuse the binder to the substrate, fabricating the coated substrate into a desired shape, removing the binder, and then sintering the coated substrate to sinter the superconducting particles together. In a preferred embodiment the process further comprises immersing the coated substrate in an electrostatic field during the fusion step to both orient and maintain the superconducting particles in a desired direction.

Abstract: A planarizing process is disclosed for planarizing an integrated circuit structure using a low melting inorganic planarizing material which comprises flowing while depositing a low melting inorganic planarizing layer such as a boron oxide glass over a layer if insulating material such as an oxide of silicon and then dry etching the low melting inorganic planarizing layer to planarize the structure. The method eliminates the need for separate coating, drying, and curing steps associated with the application of organic-based planarizing layers usually carried out outside of a vacuum apparatus. In a preferred embodiment, the deposition steps and the etching step are carried out without removing the integrated circuit structure from the vacuum apparatus. An additional etching step may be carried out after depositing the insulating layer and prior to deposition of the planarizing layer to remove any voids formed in the insulating layer.

Abstract: A process is described for forming, over a silicon surface, a titanium nitride barrier layer having a surface of (111) crystallographic orientation. The process comprises: depositing a first titanium layer over a silicon surface; sputtering a titanium nitride layer over the titanium layer; depositing a second titanium layer over the sputtered titanium nitride layer; and then annealing the structure in the presence of a nitrogen-bearing gas, and in the absence of an oxygen-bearing gas, to form the desired titanium nitride having a surface of (111) crystallographic orientation and a sufficient thickness to provide protection of the underlying silicon against spiking of the aluminum. When an aluminum layer is subsequently formed over the (111) oriented titanium nitride surface, the aluminum will then assume the same (111) crystallographic orientation, resulting in an aluminum layer having enhanced resistance to electromigration.