Abstract: A scan driver may include first signal processor adapted to receive an initializing signal, a base clock signal, a base negative clock signal and a feedback signal, and to generate a first output signal, a second signal processor adapted to receive the initializing signal, the first output signal, the base clock signal and the base negative clock signal, and to generate a second output signal and a second negative output signal, a first logic gate adapted to receive the base clock signal and the second output signal, and to generate a first clock signal, and a second logic gate adapted to receive the base clock signal and the second negative output signal, and to generate a second clock signal.
Abstract: A nonvolatile memory device, including a lower electrode on a semiconductor substrate, a phase change material pattern on the lower electrode, an adhesion pattern on the phase change material pattern and an upper electrode on the adhesion pattern, wherein the adhesion pattern includes a conductor including nitrogen.
Type:
Grant
Filed:
February 18, 2009
Date of Patent:
September 6, 2011
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Han-Bong Ko, Yong-Ho Ha, Doo-Hwan Park, Bong-Jin Kuh, Hee-Ju Shin
Abstract: A plasma display device includes a plasma display panel having a front panel, a rear panel, and a plurality of address electrodes therebetween, a chassis base affixed to the rear panel of the plasma display panel, a plurality of printed circuit boards which on the chassis base, each printed circuit board electrically connected to the electrodes via a flexible printed circuit, and an insert member between the chassis base and the printed circuit boards.
Abstract: A method of forming a semiconductor device includes forming line patterns on a substrate, the line patterns defining narrow and wide gap regions, forming spacer patterns in the narrow and wide gap regions on sidewalls of the line patterns, spacer patterns in the wide gap regions exposing an upper surface of the substrate, and spacer patterns in the narrow gap regions contacting each other to fill the narrow gap regions, forming an insulating interlayer to cover the spacer patterns and the line patterns, forming at least one opening through the insulating interlayer, the opening including at least one contact hole selectively exposing the upper surface of the substrate in the wide gap region, the contact hole being formed by using the spacer patterns in the narrow gap region as an etching mask, and forming a conductive pattern to fill the opening.
Abstract: The present teachings encompass proton-conductive material comprising a new polymer compound. A proton-conductive electrolyte comprising the proton-conductive material, and a fuel cell comprising the proton-conductive electrolyte are disclosed. A proton-conductive material comprising poly(phosphophenylene oxide) that comprises polyphenylene oxide as the main chain, and at least one phosphonic acid group as a side chain of the main chain, a proton-conductive electrolyte comprising the proton-conductive material, and a fuel cell employing the proton-conductive electrolyte, are also disclosed.
Abstract: A semiconductor memory device includes a plurality of memory cell array blocks connected to word lines, source lines, and bit lines, each memory cell array including memory cells each having a transistor with a floating body, a reference voltage generator configured to have a reference memory cell and generate a reference voltage for bit line sensing corresponding to a current flowing into a reference memory cell during a data read operation, first and second prechargers configured to precharge a bit line connected to non-selected memory cells to the reference voltage in response to first and second precharge control signals during the data read operation, and a sense amplifier configured to sense and amplify a voltage difference between a bit line connected to the selected memory cells and a bit line connected to the non-selected memory cells during the data read operation.
Abstract: A semiconductor device having a semiconductor substrate including a first region and a second region is provided. The semiconductor device further includes a gate electrode on the first region and having a first sidewall and a second sidewall, a first source region in the first region proximate to the first sidewall, a first drain region in the first region proximate to the second sidewall, an upper electrode on the second region and having a first sidewall and a second sidewall, a second source region in the second region proximate to the first sidewall of the upper electrode, and a second drain region in the second region proximate to the second sidewall of the upper electrode, wherein an impurity doping concentration of the first source region and the first drain region is greater than an impurity doping concentration of the second source region and the second drain region.
Type:
Grant
Filed:
December 13, 2007
Date of Patent:
August 23, 2011
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Dae-won Ha, Tae-hyun An, Min-young Shim
Abstract: A thin film transistor (TFT) includes a substrate, a transparent semiconductor layer on the substrate, the transparent semiconductor layer including zinc oxide and exhibiting a charge concentration of about 1×1014 atom/cm3 to about 1×1017 atom/cm3, a gate electrode on the substrate, a gate insulating layer between the gate electrode and the transparent semiconductor layer, the gate insulting layer insulating the gate electrode from the transparent semiconductor layer, and source and drain electrodes on the substrate, the source and drain electrodes being in contact with the transparent semiconductor layer.
Abstract: A composition for fabricating an electrode includes an organic binder and a conductive filler. About 3 to about 60 wt. % of the composition is the organic binder, about 5 to about 95 wt. % of the composition is the conductive filler, the conductive filler includes predominantly aluminum, the conductive filler has a flake shape, and the conductive filler has an average thickness of about 0.05 ?m to about 0.75 ?m.
Type:
Grant
Filed:
October 10, 2008
Date of Patent:
August 23, 2011
Assignee:
Cheil Industries, Inc.
Inventors:
Jae Hwi Cho, Kuninori Okamoto, Yong Hyun Kim, Hyun Don Kim
Abstract: An adhesive composition includes an ethylene-vinyl acetate copolymer, a copolymer of an aliphatic heterocyclic compound and a monomer having an aromatic ring, a binder resin, a radical polymerizable material, and a radical initiator.
Type:
Grant
Filed:
December 18, 2008
Date of Patent:
August 23, 2011
Assignee:
Cheil Industries, Inc.
Inventors:
Byeong Hwan Jeon, Kyoung Soo Park, Bong Yong Kim, Young Jin Kwon, Kang Bae Yoon, Kyong Hun Shin, Hyun Hee Namkung, Hyun Joo Seo, Cheon Seok Lee
Abstract: A heat exchanger that can mechanically automatically control a level of cooling water according to heat generation of the fuel cell. The heat exchanger includes a housing having a cooling water inlet and an outlet connected to a fuel cell stack, a moving plate which moves reciprocally in the housing and discharges cooling water filled in the housing to the stack when it moves in a one direction and when it receives a steam pressure from the stack it moves in an opposite direction, and an elastic member that applies a force to the moving plate in the one direction. The heat exchanger can automatically maintain the level of cooling water despite a difference in heat generated between a full and a partial load operation of the fuel cell obviating complicated electronics such as a thermo-sensor, a valve, or a controller. Also, under a partial load, the exposure of flow channels to superheated steam is avoided, thereby extending the lifetime of the fuel cell.
Abstract: A nonvolatile memory device may include a memory cell array adapted to store tail-bit flag information indicating tail-bit memory cells, and a tail-bit controller adapted to calibrate a program start voltage of normal memory cells and a program start voltage of the tail-bit memory cells independently based upon the tail-bit flag information.
Abstract: In a semiconductor device and associated methods, the semiconductor device includes a substrate, an insulation layer on the substrate, a conductive structure on the insulation layer, the conductive structure including at least one metal silicide film pattern, a semiconductor pattern on the conductive structure, the semiconductor pattern protruding upwardly from the conductive structure, a gate electrode at least partially enclosing the semiconductor pattern, the gate electrode being spaced apart from the conductive structure, a first impurity region at a lower portion of the semiconductor pattern, and a second impurity region at an upper portion of the semiconductor pattern.
Type:
Grant
Filed:
April 8, 2009
Date of Patent:
August 16, 2011
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Jae-Man Yoon, Yong-Chul Oh, Hui-Jung Kim, Hyun-Woo Chung, Hyun-Gi Kim, Kang-Uk Kim
Abstract: A method for forming hard mask patterns includes, sequentially forming first, second, and third hard mask layers formed of materials having different etching selectivities on a substrate, forming first sacrificial patterns having a first pitch therebetween on the third hard mask layer, forming fourth hard mask patterns with a second pitch between the first sacrificial patterns, the second pitch being substantially equal to about ½ of the first pitch, patterning the third hard mask layer to form third hard mask patterns using the fourth hard mask patterns as an etch mask, patterning the second hard mask layer to form second hard mask patterns using the third and fourth hard mask patterns as an etch mask, and patterning the first hard mask layer to form first hard mask patterns with the second pitch therebetween using the second and third hard mask patterns as an etch mask.
Type:
Grant
Filed:
October 30, 2007
Date of Patent:
August 16, 2011
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Hak-sun Lee, Myeong-cheol Kim, Kyung-yub Jeon, Cha-won Koh, Ji-young Lee
Abstract: A method of fabricating a nonvolatile memory device includes forming a tunnel insulating layer on a semiconductor substrate, forming a charge storage layer on the tunnel insulating layer, forming a dielectric layer on the charge storage layer, the dielectric layer including a first aluminum oxide layer, a silicon oxide layer, and a second aluminum oxide layer sequentially stacked on the charge storage layer, and forming a gate electrode on the dielectric layer, the gate electrode directly contacting the second aluminum oxide layer of the dielectric layer.
Type:
Grant
Filed:
March 20, 2009
Date of Patent:
August 9, 2011
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Byong-Ju Kim, Sun-Jung Kim, Zong-Liang Huo, Jun-Kyu Yang, Seon-Ho Jo, Han-Mei Choi, Young-Sun Kim
Abstract: An organic light emitting display device may include a pixel portion including a plurality of pixels, which are coupled to scan lines and data lines, a scan driver adapted to provide scan signals to the scan lines, a first transistor group adapted to test the plurality of pixels, the first transistor group being directly connected to first ends of the data lines, a second transistor group adapted to test the plurality of pixels, the second transistor group being connected to second ends of the data lines, a data distributor coupled between the second ends of the data lines and the second transistor group, a first wire group extending in a first direction at an outer area of the light emitting display device, and a second wire group extending in a second direction at the outer area of the light emitting display device.
Abstract: An electron emission device includes a base substrate, at least one isolation layer on the base substrate, the isolation layer having a first lateral side and a second lateral side opposite the first lateral side, first and second electrodes on the base substrate along the first and second lateral sides of the isolation layer, respectively, a first electron emission layer between the first electrode and the first lateral side of the isolation layer, and a second electron emission layer between the second electrode and the second lateral side of the isolation layer.
Type:
Grant
Filed:
June 9, 2008
Date of Patent:
August 9, 2011
Assignee:
Samsung SDI Co., Ltd.
Inventors:
Hyun-Ki Park, Hee-Sung Moon, Yoon-Jin Kim, Jae-Myung Kim, Kyu-Nam Joo, So-Ra Lee
Abstract: A duty control circuit including a clock input unit connected to a first node and a second node, the clock input unit receiving an input clock signal through the first node and changing a voltage of the second node to one of a first voltage level and a second voltage level in response to respective low and high logic levels of the input clock signal, a slew controller connected to the second node, the slew controller including one or more switches controlled by respective control signals, the one or more switches providing one of the first voltage level and the second voltage level to the second node in response to the control signals such that a slew rate of a signal at the second node is varied, and a clock output unit, the clock output unit outputting an output clock signal having a duty that varies.
Type:
Grant
Filed:
September 22, 2009
Date of Patent:
August 9, 2011
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Kwan-yeob Chae, Su-ho Kim, Won Lee, Sang-hoon Joo, Dharmendra Pandit, Jong-ryun Choi
Abstract: A method of preparing a supported catalyst, a supported catalyst prepared by the method, and a fuel cell using the supported catalyst. In particular, a method of preparing a supported catalyst by preparing a primary supported catalyst containing catalytic metal particles that are obtained by a primary gas phase reduction reaction of a portion of the final loading amount of a catalytic metal, and reducing the remaining portion of the catalytic metal by a secondary liquid phase reduction reaction using the primary supported catalyst. The supported catalyst contains catalytic metal particles having a very small average particle size, which are uniformly distributed on a carbon support at a high concentration, and thus exhibits maximal catalyst activity. A fuel cell produced using the supported catalyst has improved efficiency.
Type:
Grant
Filed:
February 21, 2007
Date of Patent:
August 9, 2011
Assignee:
Samsung SDI Co., Ltd.
Inventors:
Chan-ho Pak, Dae-jong Yoo, Sang-hoon Joo, Hyuk Chang, Seol-ah Lee
Abstract: A (meth)acrylate compound having an aromatic acid-labile group, the (meth)acrylate compound being represented by the following Formula 1: In Formula I, R1 is hydrogen or methyl, R2 is hydrogen, a substituted or unsubstituted alkyl, or a substituted or unsubstituted aryl, R3 is hydrogen, a substituted or unsubstituted alkyl, or a substituted or unsubstituted aryl, AR is a substituted or unsubstituted phenyl, or a substituted or unsubstituted aryl having from two to four fused aromatic rings, and carbon CAR is bonded directly to an aromatic ring of AR.
Type:
Grant
Filed:
December 17, 2008
Date of Patent:
August 9, 2011
Assignee:
Cheil Industries, Inc.
Inventors:
Sang-Jun Choi, Youn-Jin Cho, Seung-Wook Shin, Hye-Won Kim