Abstract: A liquid crystal display device includes a first substrate having a plurality of first electrodes, a second substrate facing the first substrate and having a plurality of second electrodes perpendicular to the first electrodes to define sub-pixels at intersection regions between the first and second electrodes, a liquid crystal layer between the first and second substrates, a plurality of color filters between the first and second substrates adapted to correspond to respective sub-pixels, the color filters including first color filters and second color filters having a different shape than the first color filters, a black matrix between the color filters, the black matrix including vertical portions, horizontal portions, and step portions, each of the step portions corresponding to a respective second color filter, and a plurality of patterned spacers between the first and second substrates, each of the patterned spacers overlaps with a respective step-portion of the black matrix.
Abstract: A planar light source device having excellent in-plane uniformity of brightness includes an illuminator having an array of light sources, a light transmission plate in an optical path of light output by the illuminator, and a plurality of refractive diffusing elements on the light transmission plate, each refractive diffusing element providing more than two refractive surfaces in at least one vertical cross-section along the optical path at an angle determined in accordance with a pattern of the array of light sources. Each refractive diffusing element may be a polygonal prism or a microlens.
Abstract: A method of fabricating a semiconductor device includes forming a first electrode, sequentially forming a first dielectric film, a conductive film for a second electrode, a second dielectric film, and a conductive film for a third electrode above the first electrode, forming a first pattern on the conductive film for a third electrode, the first pattern defining a second electrode, forming the second electrode by sequentially patterning the conductive film for the third electrode, the second dielectric film, and the conductive film for the second electrode, using the first pattern as an etching mask, partially removing the first pattern to form a second pattern that defines a third electrode, and forming the third electrode by patterning the conductive film for the third electrode, using the second pattern as an etching mask, wherein the third electrode has a width less than that of the second electrode.
Abstract: A single electron transistor having a memory function and a fabrication method thereof are disclosed. In the single electron transistor, a first substrate and an insulation film are sequentially stacked, a second substrate is stacked on the insulation film and includes a source region, a channel region, and a drain region, a tunneling film is formed on the second substrate, at least two trap layers are formed on the tunneling film and are separated by an interval such that at least one quantum dot may be formed in a same interval in the channel region, and a gate electrode is formed to contact the at least two trap layers and the tunneling film between the at least two trap layers. Because the single electron transistor is simple and includes a single gate electrode, a fabricating process and an operational circuit thereof may be simplified, and power consumption may be reduced.
Type:
Grant
Filed:
July 24, 2006
Date of Patent:
December 8, 2009
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Soo-doo Chae, Chung-woo Kim, Ju-hyung Kim
Abstract: A plasma display panel includes a first substrate and a second substrate that partially define a plurality of discharge cells in a space therebetween, and an electrode structure including an address electrode extending along a first direction, a dielectric layer formed on the address electrode, a first electrode extending along a second direction intersecting the first direction, and a second electrode extending along the second direction intersecting the first direction, where the first electrode and the second electrode are electrically insulated from the address electrode, and at least a portion of each of the first electrode and the second electrode is associated with each of the discharge cells. At least one of the address electrode and the dielectric layer associated with each of the discharge cells may include a first portion and a second portion.
Abstract: An electron emission display includes an electron emission unit on a first substrate adapted to emit electron beams, a light emission unit on a second substrate, the light emission unit including a plurality of photoluminescent layers facing the electron and emission unit, a plurality of spacers between the first and second substrates along a first direction, wherein each photoluminescent layer of the plurality of photoluminescent layers satisfies a proviso that (a?b)/2>c, where “a” is a length of the photoluminescent layer in a second direction, “b” is a magnitude of an electron beam spot on the photoluminescent layer in the second direction, and “c” is a shifting distance of the electron beam spot in the second direction.
Abstract: A driving method of a plasma display panel in which scan electrode lines and sustain electrode lines are parallel to each other and address electrode lines are spaced from and intersect the scan electrode lines and the sustain electrode lines, includes temporally dividing a unit frame into a plurality of subfields, generating a driving signal having a reset period, an address period, and a sustain period for each subfield, detecting an average signal level for the unit frame, alternately applying a first sustain pulse which reaches a first voltage with a rising slope and a second sustain pulse which reaches a ground voltage with a falling slope to the scan electrode lines and the sustain electrode lines, and controlling a timing of alternately applying in accordance with the average signal level for the unit frame.
Type:
Grant
Filed:
November 9, 2005
Date of Patent:
November 17, 2009
Assignee:
Samsung SDI Co., Ltd.
Inventors:
Seung-Woo Chang, Woo-Jin Kim, Chee-Young Yoon
Abstract: A method of manufacturing a semiconductor device includes forming a pillar-shaped active region by etching a portion of a semiconductor substrate, forming a blocking film selectively exposing a sidewall of a lower portion of the pillar-shaped active region, and forming a bit-line selectively on the exposed sidewall of the lower portion of the pillar-shaped active region.
Type:
Grant
Filed:
January 5, 2007
Date of Patent:
November 10, 2009
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Kwang-jin Moon, Hyun-su Kim, Sang-woo Lee, Ho-ki Lee, Eun-ok Lee, Sung-tae Kim
Abstract: A method of manufacturing a non-volatile memory device includes sequentially depositing a first insulation layer, a charge storage layer, and a second insulation layer on a substrate, forming a first opening through the resultant structure to expose the substrate, forming second and third openings through the second insulation layer to form a second insulation layer pattern, forming a conductive layer on the second insulation layer pattern, forming a photoresist pattern structure on the conductive layer, and forming simultaneously a common source line, at least one ground selection line, at least one string selection line, and a plurality of gate structures on the substrate by etching through the photoresist pattern structure, wherein the common source line and the gate structures are formed simultaneously on a substantially same level and of substantially same components.
Type:
Grant
Filed:
May 13, 2008
Date of Patent:
November 10, 2009
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Suk-Kang Sung, Kyu-Charn Park, Choong-Ho Lee
Abstract: A self-align patterning method for forming patterns includes forming a first layer on a substrate, forming a plurality of first hard mask patterns on the first layer, forming a sacrificial layer on top surfaces and sidewalls of the first hard mask patterns, thereby forming a gap between respective facing portions of the sacrificial layer on the sidewalls of the first hard mask patterns, forming a second hard mask pattern in the gap, etching the sacrificial layer using the second hard mask pattern as a mask to expose the first hard mask patterns, exposing the first layer using the exposed first hard mask patterns and the second hard mask pattern, and etching the exposed first layer using the first and second hard mask patterns.
Abstract: A display filter for use with a plurality of microlenses in a display system includes an external light and electromagnetic (EM)-shielding portion having a photosensitive transparent resin layer with a photocatalyst, and an external light and EM-shielding pattern formed on regions of the photosensitive transparent resin layer to prevent external light from entering the display system and to prevent EM waves generated in the display device from exiting the display device, the regions corresponding to boundaries between the plurality of microlenses.
Abstract: A method of evaluating human stress using photoplethysmography (PPG) includes defining at least one PPG parameter, radiating light having at least one wavelength, which reacts to a blood component to be measured, at a measuring target and measuring a PPG signal from the measuring target during a predetermined period of time, and evaluating a level of human stress using a plurality of stress indexes obtained from the PPG parameter.
Abstract: A method of manufacturing a thin film transistor is provided. The method includes forming an amorphous silicon layer on a substrate, forming a source region, a drain region, and a region of a plurality of channels electrically interposed between the source region and the drain region by patterning the amorphous silicon layer, annealing a region of the channels, sequentially forming a gate oxide film and a gate electrode on a channel surface, and doping the source region and the drain region.
Type:
Grant
Filed:
August 9, 2005
Date of Patent:
November 3, 2009
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Huaxiang Yin, Wenxu Xianyu, Takashi Noguchi, Hans S. Cho, Ji-sim Jung
Abstract: A plasma display device includes a plasma display panel having discharge cells formed between a plurality of first electrodes and a plurality of second electrodes and a driving circuit dividing one frame into a plurality of subfields, each subfield including a reset period, an address period, and a sustain period, and applying a driving voltage to the first electrodes and the second electrodes. During a sustain period of each subfield, a sustain discharge pulse is alternately applied to the first and second electrodes for triggering a sustain discharge. A width of a last sustain discharge pulse applied to the second electrode is set to be greater than a width of other sustain discharge pulses for selected subfields. The subfields may be selected based on whether a total number of the sustain discharge pulses during the sustain period is less than a critical number of sustain discharge pulses.
Type:
Grant
Filed:
November 7, 2005
Date of Patent:
November 3, 2009
Assignee:
Samsung SDI Co., Ltd.
Inventors:
Jin-Sung Kim, Tae-Seong Kim, Jin-Ho Yang
Abstract: An electroluminescent display apparatus, including a substrate having a scale pattern, a display unit, a sealing substrate affixed to the substrate to enclose the display unit therebetween, and a sealant disposed on the scale pattern between the substrate and the sealing substrate.
Abstract: A digital video signal processing apparatus and method for frame-based adaptive spatio-temporal Y/C separation. In the digital video signal processing apparatus, an adaptive three-dimensional bandpass filter (3D BPF) performs Y/C separation using local comb filtering/1D band pass filtering/frame comb filtering when the edge direction is fixed vertically/horizontally/temporally according to spatio-temporal local characteristics of an image using spatio-temporal filters. When the edge direction is not fixed horizontally/vertically/temporally, the 3D BPF performs 2D or 3D band pass filtering in all directions. Thus, the 3D BPF continuously carries out comb filtering, 1D band pass filtering, frame comb filtering and 2D/3D band pass filtering according to the spatio-temporal local characteristic of the image.
Type:
Grant
Filed:
January 13, 2006
Date of Patent:
October 20, 2009
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sung-cheol Park, Hyung-jun Lim, Jae-hong Park, Kyoung-mook Lim, Heo-jin Byeon, Dong-suk Shin
Abstract: A light guide plate includes a main body having opposing side faces, and front and rear faces connected to the opposing side faces, the front face being adapted to output light incident on at least one of the side faces, a plurality of front prisms disposed at the front face of the main body, and a plurality of dot prisms disposed in an array at the rear face of the main body, the dot prisms being spaced apart from each other, each of the dot prisms including prism parts, sizes of the dot prisms increasing as a distance from the at least one side face increases.
Type:
Grant
Filed:
April 9, 2007
Date of Patent:
October 13, 2009
Assignee:
Cheil Industries, Inc.
Inventors:
Chul-Goo Chi, Man-Suk Kim, O-Yong Jeong
Abstract: A semiconductor device includes a semiconductor substrate including a first region having a cell region and a second region having a peripheral circuit region, first transistors on the semiconductor substrate, a first protective layer covering the first transistors, a first insulation layer on the first protective layer, a semiconductor pattern on the first insulation layer in the first region, second transistors on the semiconductor pattern, a second protective layer covering the second transistors, the second protective layer having a thickness greater than that of the first protective layer, and a second insulation layer on the second protective layer and the first insulation layer of the second region.
Abstract: An automated system and method of establishing a local mobility domain (LMD) and a local mobility agent (LMA) on a mobile terminal node (MN) using Internet Protocol version (IPv6) preferably includes: establishing within the MN a newly contacted access router (AR) as the LMA and then receiving from the LMA and storing a list of neighboring ARs, which comprise the LMD. Each AR contains a stored list of neighboring ARs that are within a predetermined range of the AR, which is dynamically set by a network manager. The MN registers a retrieved local and regional address with both the LMA and a home agent (HA.) When the MN moves to a new AR, the stored list of the new AR is checked for the present LMA. The LMA is only changed to the new AR and re-registered with the HA if the new AR is in a different LMD.
Abstract: A system for testing memory modules having a rotating-type board mounting portion with a plurality of mounting surfaces positioned at different planes and connected around an axis to form a rotatable structure, at least one circuit board mounted on each mounting surface, an input/output portion, a rotational motor coupled to a rotational shaft for rotating the rotatable structure, and a central controller electrically connected to the circuit boards.
Type:
Grant
Filed:
September 12, 2006
Date of Patent:
October 13, 2009
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sun Choi, Dong-soo Lee, Yong-kyun Sun, Hyun-ho Kim