Abstract: A method of crystallizing amorphous silicon, wherein the method includes supplying nanoparticles over a surface of an amorphous silicon layer; intermittently melting nanoparticles that reach the surface of the amorphous silicon layer while supplying the nanoparticles; and cooling the amorphous silicon layer to grow crystals using unmolten nanoparticles as crystal seeds, thereby forming a polysilicon layer. Externally supplied nanoparticles are used as crystal seeds to crystallize an amorphous silicon layer so that large grains can be formed. Accordingly, since the number and size of nanoparticles may be controlled, the size and arrangement of grains may also be controlled.
Abstract: In a method of estimating a component concentration of a mixture, and an apparatus for performing the method, the method includes generating a global calibration model with respect to a calibration data set using a concentration value determined by a plurality of independent variables including a predetermined specific component, a concentration of which is intended to be estimated, as a dependent variable, dividing the calibration data set into at least two small groups according to a value of the dependent variable and generating local calibration models for each of the at least two small groups using the calibration data set included in the divided at least two small groups, and determining a small group to which a spectrum of the mixture belongs and estimating a concentration of the specific component using a local calibration model of the determined small group.
Abstract: An automated and integrated substrate inspecting apparatus for performing an EBR/EEW inspection, a defect inspection of patterns and reticle error inspection of a substrate includes a first stage for supporting a substrate; a first image acquisition unit for acquiring a first image of a peripheral portion of the substrate supported by the first stage; a second stage for supporting the substrate; a second image acquisition unit for acquiring a second image of the substrate supported by the second stage; a transfer robot for transferring the substrate between the first stage and the second stage; and a data processing unit, connected to the first image acquisition unit and the second image acquisition unit, for inspecting results of an edge bead removal process and an edge exposure process performed on the substrate using the first image, and for inspecting for defects of patterns formed on the substrate using the second image.
Type:
Grant
Filed:
September 15, 2003
Date of Patent:
October 30, 2007
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Chung-Sam Jun, Sun-Yong Choi, Kwang-Soo Kim, Joo-Woo Kim, Jeong-Hyun Choi, Dong-Jin Park
Abstract: A trifluorostyrene and substituted vinyl compound based partially fluorinated copolymer, an ionic conductive polymer membrane including the same, and a fuel cell adopting the ionic conductive polymer membrane, wherein the partially fluorinated copolymer has formula (1): where each of R1, R2 and R3 is F, H or CH3; X is a hydroxy group or a trifluoromethyl group; m is an integer greater than zero; n is an integer greater than zero; and p, q and r are zero or integers greater than zero.
Abstract: A method for fabricating a film bulk acoustic resonator (FBAR) includes depositing a dielectric layer on a substrate, providing a sacrificial layer on part of the dielectric layer; providing a bottom electrode on part of the sacrificial layer on part of the dielectric layer; providing a piezoelectric layer on the bottom electrode; patterning a top electrode on the piezoelectric layer; and removing the sacrificial layer. The substrate may have a cavity receiving the sacrificial layer. As a result, a cantilevered resonator having an air gap between the bottom electrode and the dielectric layer may be simply fabricated.
Type:
Grant
Filed:
April 20, 2004
Date of Patent:
October 16, 2007
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sang-chae Kim, In-sang Song, Young-tack Hong
Abstract: For an automatic defect inspection of an edge exposure area of a wafer, an optical unit supplies a light beam onto the edge portion of a wafer and a detection unit detects light reflected from the edge portion. The detection unit converts the detected light into an electrical signal to transmit the electrical signal to a processing unit. The processing unit analyzes the electrical signal to measure the reflectivity of the edge portion, compares the measured reflectivity with a reference reflectivity, and calculates the width of the edge exposure area. The processing unit compares the calculated width with a reference width to detect any defect in the edge exposure area.
Abstract: A scanner apparatus includes an exposure unit and an alignment unit, wherein the alignment unit includes an aligning/leveling apparatus for performing global aligning and leveling processes for a wafer in the alignment unit and an edge exposure apparatus, receiving light from a light source, for performing an edge exposure process for the wafer in the alignment unit.
Abstract: A method for manufacturing the same, wherein the monolithic ink-jet printhead includes a manifold for supplying ink, an ink chamber having a hemispheric shape, and an ink channel formed monolithically on a substrate; a silicon oxide layer, in which a nozzle for ejecting ink is centrally formed in the ink chamber, is deposited on the substrate; a heater having a ring shape is formed on the silicon oxide layer to surround the nozzle; a MOS integrated circuit is mounted on the substrate to drive the heater and includes a MOSFET and electrodes connected to the heater. The silicon oxide layer, the heater, and the MOS integrated circuit are formed monolithically on the substrate. Additionally, a DLC coating layer having a high hydrophobic property and high durability is formed on an external surface of the printhead.
Abstract: In a field effect transistor (FET), and a method of fabricating the same, the FET includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a plurality of wire channels electrically connecting the source and drain regions, the plurality of wire channels being arranged in two columns and at least two rows, and a gate dielectric layer surrounding each of the plurality of wire channels and a gate electrode surrounding the gate dielectric layer and each of the plurality of wire channels.
Abstract: A cover for reducing contamination in a plasma display apparatus including a frame with a printed circuit board, signal transmission cables and buffer substrates arranged on one side thereof and including a guiding portion for guiding the cables is provided. The cover may include a first portion and a second portion that may itself include a first part and a second part. When the cover is detachably attached to the frame, the first portion may extend over the buffer substrates such that the buffer substrates are arranged between the first portion of the cover and the frame, an end portion of the first part may extend toward and/or contact a surface of the frame on which the plurality of buffer substrates and the at least one printed circuit board are arranged, and an end portion of the second part may extend toward and/or contact the guiding portion of the frame.
Abstract: A slurry composition includes about 4.25 to about 18.5 weight percent of an abrasive, about 80 to about 95 weight percent of deionized water, and about 0.05 to about 1.5 weight percent of an additive. The slurry composition may further include a surfactant. In a polishing method using the slurry composition, a polysilicon layer may be rapidly polished, and also dishing and erosion of the polysilicon layer may be suppressed.
Type:
Grant
Filed:
June 29, 2005
Date of Patent:
September 18, 2007
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Hyo-Jin Lee, Kyung-Hyun Kim, Yong-Sun Ko
Abstract: Provided are a multi-purpose magnetic film structure using a spin charge, a method of manufacturing the same, a semiconductor device having the same, and a method of operating the semiconductor memory device. The multi-purpose magnetic film structure includes a lower magnetic film, a tunneling film formed on the lower magnetic film, and an upper magnetic film formed on the tunneling film, wherein the lower and upper magnetic films are ferromagnetic films forming an electrochemical potential difference therebetween when the lower and upper magnetic films have opposite magnetization directions.
Type:
Grant
Filed:
August 1, 2005
Date of Patent:
September 18, 2007
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Tae-wan Kim, Wan-jun Park, Sang-jin Park, In-jun Hwang, Soon-ju Kwon, Young-keun Kim, Richard J. Gambino
Abstract: A device for and a method of measuring a blood flow of a living body having blood vessels that emit bio-photons and through which blood flows, the device including a detector positioned adjacent to a predetermined portion of the living body for measuring a bio-photon emission from the living body and a processor for analyzing and displaying the blood flow of the living body based on a value of the bio-photon emission.
Abstract: A waveguide to waveguide monitor includes an optics block between the two waveguides. The optics block couples light between the two waveguides and includes at least two parallel surfaces. The monitor also has an optical tap which creates a monitor beam. The optics block may be flush with the endfaces of the waveguides, even if the endfaces are angled. At least two optical elements needed to couple the light between the two optical waveguides and direct the monitor beam on a detector are on the at least two parallel surfaces of the optics block and any surfaces secured thereto.
Type:
Grant
Filed:
June 28, 2002
Date of Patent:
September 4, 2007
Assignee:
Tessera North America
Inventors:
James E. Morris, Alan D. Kathman, Hongtao Han, Michael R. Feldman, Charles S. Koehler
Abstract: A method of ejecting ink from a ink-jet printhead includes filling a rear end of a nozzle with ink using a capillary force, the rear end of the nozzle being surrounded by a hydrophilic layer, forming an electric field directed toward an outlet of the nozzle on a front end of the nozzle, the front end of the nozzle being surrounded by a hydrophobic layer, varying a surface tension of ink to separate ink droplets having a predetermined volume from ink and to move the separated ink droplets within the front end of the nozzle toward the outlet of the nozzle, and ejecting the separated ink droplets through the outlet of the nozzle.
Abstract: An apparatus for cleaning a wafer includes a plurality of holders for contacting and securing peripheral portions of a wafer, and for rotating the wafer, a first plate disposed to face a first surface of the wafer, the first plate having a plurality of first nozzles for spraying a first cleaning solution onto the first surface of the wafer, and a second plate disposed to face a second surface of the wafer that is opposite to the first surface, the second plate having a plurality of second nozzles for spraying a second cleaning solution onto the second surface of the wafer. In operation, the first and second plates and the wafer are rotated in opposite directions. The opposite rotation causes the cleaning solutions to flow abruptly thereby increasing a frictional force between the surfaces on the wafer and the cleaning solutions to improve the efficiency of the cleaning process.
Abstract: In a magnetic memory device, and a method of manufacturing the same, the magnetic memory device includes a switching device, and a magnetic tunneling junction (MTJ) cell connected to the switching device, the MTJ cell including a lower electrode connected to the switching device and a lower magnetic layer, a tunneling film containing fluorine, an upper magnetic layer, and a capping layer, sequentially stacked on the lower electrode.
Type:
Grant
Filed:
January 31, 2005
Date of Patent:
August 28, 2007
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Tae-wan Kim, Kook-rin Char, Dae-sik Kim
Abstract: A vertical double channel silicon-on-insulator (SOI) field-effect-transistor (FET) includes a pair of two vertical semiconductor layers in contact with a pair of parallel shallow trench isolation layers on a substrate, a source, a drain and a channel region on each of the pair of vertical semiconductor layers with corresponding regions on the pair of vertical semiconductor layers facing each other in alignment, a gate oxide on the channel region of both of the pair of the vertical semiconductor layers, and a gate electrode, a source electrode, and a drain electrode electrically connecting the respective regions of the pair of vertical semiconductor layers.
Abstract: An apparatus for cleaning air, and a method for cleaning air using the apparatus, includes a housing including an air inlet through which air to be cleaned flows into the housing and an air outlet through which air that has been cleaned is exhausted from the housing, the housing isolating an interior thereof from external surroundings. A first filtering unit is disposed adjacent to the air inlet and includes a plurality of first filters for removing a first group of contaminants from the air to be cleaned. Each of the plurality of first filters is disposed substantially parallel to each other. A fan for drawing the air to be cleaned into the housing from the external surroundings is disposed in the housing.
Type:
Grant
Filed:
August 18, 2004
Date of Patent:
August 21, 2007
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Chang-Su Lim, Yo-Han Ahn, Suk-Hee Im, Sun-Wook Park
Abstract: A wafer stage including an electrostatic chuck and a method for dechucking a wafer using the wafer stage are provided, wherein, the wafer stage includes an electrostatic chuck support, an electrostatic chuck, a lifting means, and a grounding means including a device for connecting the interconnections for grounding the lifting means. According to the method for dechucking a wafer, when a lifting means is in contact with a rear side of the wafer, the lifting means is grounded. Then, an electrostatic chuck is neutralized by supplying power to electrostatic electrodes, and the wafer is neutralized by supplying plasma to the wafer.
Type:
Grant
Filed:
June 10, 2004
Date of Patent:
August 21, 2007
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Chang-woong Chu, Kyeong-koo Chi, Ji-soo Kim, Seung-pil Chung, Sang-hun Seo