Abstract: The present invention provides a semiconductor device in which the gate is self-aligned to the device isolation film and a fabricating method thereof. A device isolation film restricting an active region is disposed on a portion of a semiconductor substrate, and a word line is across over the device isolation film. A gate pattern is disposed between the word line and the active region, and a tunnel oxide film is disposed between the gate pattern and the active region. The gate pattern comprises a floating gate pattern, a gate interlayer dielectric film pattern and a control gate electrode pattern deposited in the respective order, and has a sidewall self-aligned to the device isolation film. To form the gate pattern having the sidewall self-aligned to the device isolation film, a gate insulation film and a gate material film are formed in the respective order on the semiconductor substrate.
Abstract: A method of isolating semiconducting carbon nanotubes includes mixing carbon nanotubes with a mixed acid solution of nitric acid and sulfuric acid to obtain a dispersion of carbon nanotubes, stirring the carbon nanotube dispersion, and filtering the carbon nanotube dispersion. Functional groups remaining on the filtered carbon nanotubes may then be removed, e.g., via heating.
Type:
Grant
Filed:
December 30, 2004
Date of Patent:
June 17, 2008
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Wan-jun Park, Young-hee Lee, Cheol-min Yang
Abstract: A self-aligned buried contact (BC) pair includes a substrate having diffusion regions; an oxide layer exposing a pair of diffusion regions formed on the substrate; bit lines formed between adjacent diffusion regions and on the oxide layer, each of the bit lines having bit line sidewall spacers formed on sidewalls thereof; a first interlayer dielectric (ILD) layer formed over the bit lines and the oxide layer; a pair of BC pads formed between adjacent bit lines and within the first ILD layer, each BC pad being aligned with one of the pair of exposed diffusion regions in the substrate; and a pair of capacitors, each of the pair of BC pads having one of the pair of capacitors formed thereon, wherein a pair of the bit line sidewall spacers is adjacent to each of the BC pads and the pair of bit line sidewall spacers has an asymmetrical shape.
Abstract: An electrostatic latent image forming medium includes a frame, an imaging surface on which an electrostatic latent image is to be formed, the imaging surface being supported by the frame, and an alteration mechanism for altering the electrostatic latent image on the imaging surface, the alteration mechanism being between the frame and the imaging surface. When signals are selectively applied to the alteration mechanism, an electrostatic latent image with a potential different from a potential of its surrounding area is formed on the imaging surface.
Abstract: A mobile communication system capable of increasing communication efficiency and a method therefor are provided, including a receiver for grouping n MCS levels (where n>0) into continuous m MCS levels (where n>m>0) according to the quality of a data channel for transmitting an information signal, and sending information on an MCS group using a pilot signal, and an ACK or an NACK signal, which indicates whether the information signal is completely received; and a transmitter for storing information on the n MCS levels, extracting the m MCS levels according to the information on the MCS group transmitted from the receiver, determining one of the extracted m MCS levels as an initial MCS level, modulating and coding information data to be transmitted according to the initial MCS level and transmitting the result to the receiver, and changing the current MCS level in response to the ACK or the NACK signal.
Abstract: A micro-machining method of manufacturing a micro fluxgate sensor manufactured having an amorphous magnetic core includes forming lower coils of an excitation coil and a magnetic field detecting coil on a wafer, depositing a first insulating layer on the lower coils and forming an amorphous magnetic core, depositing a second insulating layer on the amorphous magnetic core and forming upper coils connected to the lower coils to complete the excitation coil and the magnetic field detecting coil, and covering the excitation coil and the magnetic field detecting coil with a protective film, and etching the protective film to expose a portion of the excitation coil and magnetic field detecting coil, thereby forming a pad.
Type:
Grant
Filed:
June 3, 2004
Date of Patent:
June 3, 2008
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Kyung-won Na, Sang-on Choi, Hae-seok Park, Dong-sik Shim
Abstract: An apparatus and method for enabling cost-effective duplex communication by diplexing one of down stream signals for frequency up-conversion in a hybrid fiber-radio system includes diplexing an unmodulated mode signal among beating signals between a master laser and an injection-locked slave laser and using the diplexed signal for down-conversion in upstream transmission, thereby eliminating the need for expensive high-frequency local oscillators for frequency conversion. Higher radio frequency signals can be generated using beating between basic modes and satellite modes such as FWM conjugates of the master laser and slave laser. Cost-effective systems, stabilization of a light source and improved transmission performance may be achieved by using a diplexer instead of an expensive high-frequency local oscillator.
Abstract: A magnetic tunneling junction (MTJ) cell includes a free magnetic layer having a low magnetic moment, and a magnetic random access memory (MRAM) includes the MTJ cell. The MTJ cell of the MRAM includes a lower electrode, a lower magnetic layer, a tunneling layer, an upper magnetic layer and an upper electrode, which are sequentially stacked on the lower electrode. The upper magnetic layer includes a free magnetic layer having a thickness of about 5 nm or less. The MTJ cell may have an aspect ratio of about 2 or less, and the free magnetic layer may have a magnetic moment of about 800 emu/cm3 or less.
Type:
Grant
Filed:
November 15, 2004
Date of Patent:
May 27, 2008
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Tae-wan Kim, Sang-jin Park, In-jun Hwang
Abstract: A fast, reliable, highly integrated memory device formed of a carbon nanotube memory device and a method for forming the same, in which the carbon nanotube memory device includes a substrate, a source electrode, a drain electrode, a carbon nanotube having high electrical and thermal conductivity, a memory cell having excellent charge storage capability, and a gate electrode. The source electrode and drain electrode are arranged with a predetermined interval between them on the substrate and are subjected to a voltage. The carbon nanotube connects the source electrode to the drain electrode and serves as a channel for charge movement. The memory cell is located over the carbon nanotube and stores charges from the carbon nanotube. The gate electrode is formed in contact with the upper surface of the memory cell and controls the amount of charge flowing from the carbon nanotube into the memory cell.
Abstract: A method for recognizing a pattern of an alignment mark on a wafer includes positioning the wafer on an adjustable wafer stage in an alignment apparatus; capturing images of a key alignment mark by magnifying an alignment mark region of the wafer; deleting image data from a region where the alignment pattern does not exist between the captured images; and extracting an alignment mark pattern by a pattern recognition of the remaining image data after the deletion of the image data. Thus, an alignment failure can be reduced because a particle on the wafer is not mistaken as an alignment mark.
Abstract: A bismuth titanium silicon oxide having a pyrochlore phase, a thin film formed of the bismuth titanium silicon oxide, a method for forming the bismuth-titanium-silicon oxide thin film, a capacitor and a transistor for a semiconductor device including the bismuth-titanium-silicon oxide thin film, and an electronic device employing the capacitor and/or the transistor are provided. The bismuth titanium silicon oxide has good dielectric properties and is thermally and chemically stable. The bismuth-titanium-silicon oxide thin film can be effectively used as a dielectric film of a capacitor or as a gate dielectric film of a transistor in a semiconductor device. Various electronic devices having good electrical properties can be manufactured using the capacitor and/or the transistor having the bismuth-titanium-silicon oxide film.
Type:
Grant
Filed:
May 25, 2005
Date of Patent:
May 20, 2008
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Young-jin Cho, Yo-sep Min, Young-soo Park, Jung-hyun Lee, June-key Lee, Yong-kyun Lee
Abstract: In a silicon-oxide-nitride-oxide-silicon (SONOS) memory device and a method of manufacturing the same, a SONOS memory device includes a semiconductor substrate, an insulating layer deposited on the semiconductor substrate, an active layer formed on a predetermined region of the insulating layer and divided into a source region, a drain region, and a channel region, a first side gate stack formed at a first side of the channel region, and a second side gate stack formed at a second side of the channel region opposite the first side of the channel region. In the SONOS memory device, at least two bits of data may be stored in each SONOS memory device, thereby allowing the integration density of the semiconductor memory device to be increased without increasing an area thereof.
Type:
Grant
Filed:
August 10, 2005
Date of Patent:
May 20, 2008
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Won-il Ryu, Jo-won Lee, Se-wook Yoon, Chung-woo Kim
Abstract: In a field effect transistor (FET), and a method of fabricating the same, the FET includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a plurality of wire channels electrically connecting the source and drain regions, the plurality of wire channels being arranged in two columns and at least two rows, and a gate dielectric layer surrounding each of the plurality of wire channels and a gate electrode surrounding the gate dielectric layer and each of the plurality of wire channels.
Abstract: An optical transceiver includes at least one light source and at least one detector mounted on the same surface of the same substrate. The detector is to receive light from other than a light source on the surface. At least one of the light source and the detector is mounted on the surface. An optics block having optical elements for each light source and detectors is attached via a vertical spacer to the substrate. Electrical interconnections for the light source and the detector are accessible from the same surface of the substrate with the optics block attached thereto. One of the light source and the detector may be monolithically integrated into the substrate.
Abstract: A printed circuit board integrated with a two-axis fluxgate sensor includes a first soft magnetic core formed lengthwise in a first axial direction, a first excitation coil formed of a metal film and wound around the first soft magnetic core, a first pick-up coil formed of a metal film and wound around the first soft magnetic core and the first excitation coil, a second soft magnetic core formed lengthwise in a second axial direction, the second axial direction being perpendicular to the first axial direction, a second excitation coil formed of a metal film and wound around the second soft magnetic core, a second pick-up coil formed of a metal film and wound around the second soft magnetic core and the second excitation coil, and a pad for establishing conductivity between the first and second excitation coils and the first and second pick-up coils and an external circuit.
Type:
Grant
Filed:
July 30, 2003
Date of Patent:
May 13, 2008
Assignee:
Samsung Electro-Mechanics Co., Ltd.
Inventors:
Won-youl Choi, Sang-on Choi, Jun-sik Hwang, Myung-sam Kang
Abstract: In an ink-jet printhead and a method for manufacturing the same, the ink-jet printhead includes a substrate, an ink chamber to be filled with ink formed on a front surface of the substrate, a manifold for supplying ink to the ink chamber formed on a rear surface of the substrate, and an ink passage in flow communication with the ink chamber and the manifold formed parallel to the front surface of the substrate; a nozzle plate including a plurality of passivation layers formed of an insulating material on the front surface of the substrate, a heat dissipating layer formed of a metallic material, and a nozzle in flow communication with the ink chamber; and a heater and a conductor, the heater being positioned on the ink chamber and heating ink in the ink chamber, and the conductor for applying a current to the heater.