Abstract: A method for manufacturing a cell capacitor includes a step of forming an upper electrode and a trench for the lower electrode simultaneously in a single mask step. Further steps for manufacturing a cell capacitor includes forming a storage node contact by employing a predefined plate silicon layer and forming a capacitor dielectric using the storage contact node, as a result, it becomes possible to resolve “lift-off” problems, twin-bit failures, and misalignment.

Abstract: A method of forming a silicon oxide layer of a semiconductor device comprising coating a spin-on glass (SOG) composition including perhydropolysilazane having a compound of the formula (SiH2NH2)n where n represents a positive integer on a semiconductor substrate having a surface discontinuity, to form a planar SOG layer; and forming a silicon oxide layer with a planar surface by implementing a first heat treatment to convert an SOG solution into oxide and a second heat treatment to densify thus obtained oxide. The silicon oxide layer of the present invention can bury a gap between gaps of VLSI having a high aspect ratio and gives the same characteristics as a CVD oxide layer. Further, the oxidation of silicon in the active region is restrained in the present invention to secure dimension stability. Also disclosed is a semiconductor device made by the method.

Abstract: A method for fabricating a MIM capacitor of a MDL logic or analog circuit of a semiconductor device. A conductivity layer is formed on a semiconductor substrate having a first inter-level insulating layer. A capping metal layer having an etching rate higher than an oxide layer is formed on the conductivity layer. A lower electrode comprising a “conductivity layer/capping metal layer” deposition is formed by selectively etching the capping metal layer and the conductivity layer in order to expose a predetermined part of the surface of the first inter-level insulating layer. A second inter-level insulating layer is formed on the first inter-level insulating layer covering the lower electrode. A via hole is formed by selectively etching both the second inter-level insulating layer and the lower electrode thereby to expose a portion of the lower electrode so that a tapered capping metal layer remains along the lower edges of the via hole.

Abstract: An ink-jet printhead having a hemispherical ink chamber and a method for manufacturing the same, wherein the ink-jet printhead includes a substrate, in which a manifold for supplying ink, an ink chamber having a substantially hemispherical shape, and an ink channel for supplying ink from the manifold to the ink chamber are integrally formed; a nozzle plate having a multi-layered structure, in which a first insulating layer, a thermally conductive layer formed of a thermally conductive material, and a second insulating layer are sequentially stacked, and having a nozzle, formed at a location corresponding to the center of the ink chamber; a nozzle guide having a multi-layered structure and extending from the edge of the nozzle to the inside of the ink chamber; a heater formed on the nozzle plate to surround the nozzle, and an electrode formed on the nozzle plate to be electrically connected to the heater.

Abstract: A ferroelectric emitter is described. The ferroelectric emitter of the present invention includes a ferroelectric layer having a first side, an opposing second side, and a top surface, a first and a second electrode formed along the top surface of the ferroelectric layer, and a mask layer which has a predetermined pattern and is formed along the top surface of the ferroelectric layer between the first and second electrodes. When used in ferroelectric switching emission lithography, the ferroelectric emitter of the present invention allows electron emission from a wide or narrow gap of a mask layer and from an isolated pattern such as a doughnut shape while facilitating re-poling in pyroelectric electron emission.

Abstract: A code division multiple access (CDMA) demodulating method and demodulator employing the demodulating method, the CDMA demodulating method including the steps of: (a) sequentially-storing all input data, which are over-sampled by M-fold and go through a number (N) of paths, in a predetermined first memory, where M and N are predetermined positive integers; (b) generating PN codes for each of the N paths and storing the PN codes in a predetermined second memory; (c) generating and sequentially-storing traffic walsh codes of one period, which correspond to a processing gain L, in a predetermined third memory; (d) multiplying a complex-conjugated value with one of the values stored in the first memory and one of the values stored in the second memory; (e) performing a control operation for storing the PN codes in a predetermined address of the second memory and a control operation for outputting data for each of the N paths from the first, second, and third memories; (f) multiplying the resultant value of the st

Abstract: A method of forming a pattern for a semiconductor device without using a photolithography technique is disclosed, wherein the method includes forming a sacrificial layer on a semiconductor substrate, forming a sacrificial layer pattern by patterning the sacrificial layer, forming a conformal layer on a resultant structure after forming the sacrificial layer pattern, and forming the layer pattern by anisotropically etching the conformal layer.

Abstract: A method of fabricating a multiple tunnel junction Scalable Two-Transistor Memory (STTM) cell array with a unit cell area as low as 4F2, F representing the minimum feature dimension, which usually is the width and also the spacing of the data lines or the write (or word or control gate) lines, wherein process sequence and conditions are designed to offer wide flexibility in material choices and layer thickness at different regions of the STTM cell with surface planarity maintained at several stages of the manufacturing sequence. The processing of memory cell devices is made compatible with peripheral CMOS devices so that the devices in both areas can be made simultaneously, thereby decreasing the total number of processing steps. Insulator filled trenches around the device regions, source/drain and the gate regions of the peripheral devices are formed simultaneously with the corresponding regions of the memory cell devices.

Abstract: A method and an apparatus for pyroelectric lithography using a patterned emitter is provided. In the apparatus for pyroelectric lithography, a pyroelectric emitter or a ferroelectric emitter is patterned using a mask and it is then heated. Upon heating, electrons are not emitted from that part of the emitter covered by the mask, but are emitted from the exposed part of the emitter not covered by the mask so that the shape of the emitter pattern is projected onto the substrate. To prevent dispersion of emitted electron beams, which are desired to be parallel, the electron beams are controlled using a magnet or a projection system, thereby achieving exact a one-to-one projection or a x-to-one projection of the desired pattern etched on the substrate.

Abstract: A method of manufacturing a semiconductor device for protecting a Cu layer from post chemical mechanical polishing (CMP) corrosion and CMP equipment therefore wherein, when wafers on which a Cu layer is formed wait to be transferred to a cleaning system after being polished in a CMP equipment, the wafers collected at a stand-by station are supplied with a solution containing a corrosion inhibitor, thus at least keeping the polished surface of Cu layer wet with the solution. Then, the wafers collected at the stand-by station are transferred to the cleaning system and cleaned. In the present invention, the solution uses a solution in which the corrosion inhibitor is added to de-ionized water. Furthermore, while transferring the wafers, the surfaces of the transferred wafers are kept wet with a solution containing a corrosion inhibitor.

Abstract: A semiconductor memory device and a system using the semiconductor memory device can perform a data sampling operation safely without a phase synchronization device such as delay locked loop (DLL) or phase locked loop (PLL), wherein the semiconductor memory device incorporates a strobe signal, which is synchronized with a data signal, both traversing similar-length paths between a memory device and a memory controller. In a read operation, the semiconductor memory device generates a first strobe signal synchronized with a read data signal, whereby a read data signal is outputted at both a rising and a falling edge of a strobe signal. In a write operation, a second strobe signal is generated whereby only a single edge is used to generate a write data signal, thereby allowing sufficient time for a data sampling operation to occur and thus operating at half the speed of a read operation.

Abstract: A sonic level measuring method comprises steps of disposing N sonic receivers 51,52,53, . . .

Abstract: An ultrasonic flow rate measuring method comprises steps of measuring an inner diameter of a pipe in a manner to subtract a corrosive resistance layer and its possible thickness deviation from the maximum deviation of an inner diameter presented as a pipe size within the range of being able to be estimated, measuring a flow rate QI of the ideal circular section having the measured inner diameter based on the ultrasonic multi-channel flow rate measuring method, calculating a flow rate QII of the remaining section according to a flow velocity distribution curve and adding the flow rate QII to the flow rate QI to calculate a total flow rate Q. Therefore, the method can enhance the accuracy of the flow rate measurement, if the section area of a pipe can't be measured, exactly, and the inner diameter of the pipe has a deviation due to an ovalness.

Abstract: An ultrasonic flow velocity measuring method using a transit time difference of continuous sine waves without transmitting/receiving an ultrasonic pulse comprises steps of amplitude-modulating a continuous ultrasonic sine wave carrier into a lower frequency and transiting the amplitude-modulated signal, whenever the ultrasonic transit time is measured; demodulating the amplitude-modulated signal; detecting or discriminating the amplitude-modulated signal from the demodulated signal and measuring a time interval from the moment that the ultrasonic sine wave is amplitude-modulated till the amplitude-modulated signal is demodulated.

Abstract: The present invention relates to a poly(imide-siloxane) compound useful as passivation layer for packaging tapeless LOC, which is produced by reacting in a polar solvent a diaminosiloxane compound of the formula(1) wherein R1, R2, R3, R4, R5, R6, R7, R8, R9, and R10 are independently an aromatic group, aliphatic group or halogenated hydrocarbon, hydroxy, or ether group, and m and n are integers such that m+n is an integer of 0˜1000; and a diamine compound of the formula(2) H2N—R—NH2   (2) wherein R is at least one selected from the below groups: with an aromatic tetracarboxylic dianhydride of the formula (3) wherein A is at least one selected from the below groups: wherein the number of moles of the compound (3) is the same as the total number of moles of compounds (1) and (2).

Abstract: A process chamber used in the manufacture of a semiconductor device for etching a material layer on a semiconductor wafer includes an electrostatic chuck for holding the semiconductor wafer, and an annular edge ring which surrounds the side of the semiconductor wafer on the electrostatic chuck to prevent the semiconductor wafer from departing from its original position. The annular edge ring has a first side which faces the side of the semiconductor wafer and contacts firmly with the side of the semiconductor wafer.

Abstract: A process for preparing a malonic acid monoester or &bgr;-ketoester from an epoxide includes the steps of reacting an epoxide with carbon monoxide and an alcohol in the presence of a catalytic amount of a cobalt compound and at least one promoter to produce a &bgr;-hydroxyester, separating the &bgr;-hydroxyester from the cobalt compound and the promoter, and oxidizing the &bgr;-hydroxyester to produce a malonic acid monoester or &bgr;-ketoester.

Abstract: An ultrasonic flow measuring method that includes selecting a section area in a right angle to an ultrasonic transit trajectory line for measuring a flow velocity as a section area necessary for a flow measurement; and multiplying a flow velocity component of a direction corresponding to an ultrasonic transit trajectory, which is directly measured by an ultrasonic wave, by the section area thereby to compute a flow or flowrate, so that a flow measuring error and a measuring error of a section area can be significantly reduced, thereby enhancing the accuracy of the flow measurement. The apparatus having a plurality of paired transducers disposed within the pipe at opposing sides; a mechanism for measuring a flow velocity of the fluid for each of a plurality of chords dividing the section area; and a mechanism for determining the flow of the fluid based on a product of the average flow velocity of the fluid and a flow computing area.

Abstract: A method and apparatus for synchronizing an OFDM receiver is provided.

Abstract: A method for forming a metal layer located over a metal underlayer of a semiconductor device, using a metal halogen gas. The method involves supplying a predetermined reaction gas into a reaction chamber for a predetermined period of time prior to deposition of the metal layer. The reaction gas has a higher reactivity with an active halogen element of a metal halogen gas supplied to form the metal layer, compared to a metal element of the metal halogen gas. As the metal halogen gas is supplied into the reaction chamber, the reaction gas reacts with the halogen radicals of the metal halogen gas, so that the metal underlayer is protected from being contaminated by impurities containing the halogen radicals.