Abstract: This invention provides an optical pointing device, such as those used to control devices such as televisions, VCRs, video games and computers, which have improved accuracy and lower sensitivity to detrimental effects, such as noise and user hand unsteadiness, than prior art devices. Such pointing devices emit light beams, such as infrared light, which when received by a receiver are used to position cursors or other symbolic shapes, such as sliding volume controls. An advantage of the pointing device of the invention is that light emitting diodes of conventional manufacture, known to have poor optical precision and hence variable angular emission profiles, may nevertheless be used in the pointing device of the invention.

Abstract: A heat sink structure for an electronic device of the type having a chassis and a plug-in unit provides efficient heat dissipation for a heat-generating component on a printed circuit board within the unit. In a preferred embodiment, a first heat pipe is fixedly attached to a heat dissipating plate for the heat generating component. At the opposite end, the first heat pipe is held by a connector plug attached to the unit. At one end, a second heat pipe is held by a plug-receiving seat that is fixedly attached to a backboard of the chassis. At the opposite end, the second heat pipe is fixedly attached to a heat dissipating portion on the chassis. The first heat pipe, plug, plug-receiving seat and second heat pipe transfer heat from the heat-generating component to the heat-dissipating portion.

Abstract: In a multi-processor system, a translation look-aside buffer in a processor can be invalidated without stopping operations of other processors of the multi-processor system. Each processor has a range comparator including an address compare circuit which detects whether a logical address to access the main storage is in an address range being invalidated (e.g., updated), a pending indicator which stops translating the logical address when the address is detected to be in the address range, and a restart indicator which restarts translation of the logical address when the logical address is out of the address range.

Abstract: A semiconductor laser diode, and a method for producing the semiconductor laser diode, includes a waveguide being terminated by a back facet and a front facet and a front facet coating and a back facet coating having a reflectivity providing for controlled decoupling of light at the front facet from the standing lightwave in the waveguide. The front facet coating includes a stack of layers providing for a phase shift of the standing lightwave within the waveguide such that the intensity of the lightwave at the front facet, where the light is decoupled from the standing lightwave, has a relative minimum.

Abstract: This invention relates to a system and method for altering the harmonic referent of segments of a music composition while maintaining the register of the musical segments and their conformity to a harmonic rule-base. By combining the three novel notions of a "role-preserving" transformation "shape-preserving" transformation, and a "register" preserving transformation, a novel operation enabled by the present invention can be described. Essentially, the invention allows a pitch to be moved from one harmonic context to another. The pitches are then constrained to take on values that have the same harmonic function as their corresponding original pitches, while remaining, as much as possible, within the same register as their corresponding original pitches. Secondly, when a group of pitches are moved together as a melody, the operation can preserve not only the function and register of the pitches but the shape of the melody.

Abstract: An electrically erasable and programmable read only memory device supplies first current from a precharging circuit through a first input node of a sense amplifier to a selected bit line to see whether a selected floating gate type field effect transistor passes the first current or block the first current, and a reference voltage generator supplies reference voltage to a second input node of the sense amplifier so as to produce a potential difference between the first input node and the second input node; the reference voltage generator supplies second current from a dummy precharging circuit through the second input node and a reference floating gate type field effect transistor to a ground line so as to produce the reference voltage at the second input node; and the reference floating gate type field effect transistor has an interconnection between the floating gate electrode and the control gate electrode so as to prevent the floating gate electrode from accumulation of electron.

Abstract: An optical character recognition method and system are provided, employing context analysis and operator input, alternatively and in combination, on the same batch of documents. After automatic character recognition, the context analyzer processes the fields that are good enough to expect resolution. This will accept as many fields as possible without any operator intervention. For some other fields, the process uses operator input to certify the character-level OCR result of, or to enter, a certain percentage of the characters, so that context analysis may accept some of the remaining fields. If the context analyzer successfully identifies a small set of very close hypotheses, the process asks the operator to certify one or two characters to resolve the ambiguity between the hypotheses. For the fields that are still not resolved, the fields and the hypotheses are shown to the operator for acceptance, correction, or entry.

Abstract: To fabricate a smaller memory system, a memory system includes a memory cell array having a first memory cell and a second memory cell, a first switching circuit connected to the first memory cell, a second switching circuit connected to the second memory cell, and a sense amplifier connected to the first and second switching circuits. The sense amplifier includes an N-type flip-flop circuit for selectively amplifying data from the first memory cell or the second memory cell, a P-type flip-flop circuit for selectively amplifying the data from the first memory cell or the second memory cell, and a first circuit formed between the N-type flip-flop circuit and the P-type flip-flop circuit. When data in the first memory cell is to be transferred, the first switching circuit is activated and the data from the first memory cell is transferred to the sense amplifier, and then the data is amplified by the sense amplifier.

Abstract: A total transmitting power of a base station calculated in a total transmitting power monitor is compared with a predetermined value in a comparator. When the total transmitting power is detected to exceed a first predetermined value, the transmitting power of a pilot signal transmitted by the base station is decreased by a pilot signal transmitting power controller. As a result, a forward channel can be assigned the transmitting power even when the number of mobile stations increases. Further, a priority for disconnection of the channel may be discriminated depending upon a characteristic of the mobile station, and the channel may be disconnected based on the comparing step and the discriminating priority step.

Abstract: When a fault is detected in data read-out from an address array, a replacement controller registers the address in a replacement buffer. When this address is sent out from the replacement buffer, the address array is invalidated for the address by using an address register and a flush register. During the invalidation process, the processing of the request is suppressed by a pending register, and the request address is held in an address register until the invalidation is completed for use in retrying a cache indexing.

Abstract: In a multi-processor system including a plurality of processing units each having a cache memory, the processing units each include a synchronization counter for indicating a present synchronization state of the respective processing unit, and a cache state table for holding information regarding the respective entries of the cache memory. The cache state table includes a cache state and a cache synchronization count. The cache state holds the respective cache state used in a cache protocol. The cache synchronization count holds a value of the synchronization counter when an entry is loaded. A cache protocol in the multi-processor system is simplified to realize a high-speed processing.

Abstract: To protect a system efficiently from static electricity and electrostatic discharge (ESD) and thereby prevent the system from becoming defective, a system formed on a first conductivity-type semiconductor substrate includes a pad for receiving a signal, a protection element connected to the pad, and a discharge line connected to the protection element. The protection element includes a single bipolar transistor portion and at least one diode portion located adjacent to the bipolar transistor portion.

Abstract: An electronic device assembly includes a rigid, first substrate and a second substrate. The first substrate has a first pad on the upper surface, and a through-hole at a position of the first pad. The second substrate has a second pad on the upper surface thereof. The first and second pads are connected via solder. At least a part of the solder is positioned in the through-hole of the first substrate. The first substrate may include a flexible substrate and a rigid plate. The through-hole is provided in the flexible substrate. The first pad is provided on the lower surface of the flexible substrate. The rigid plate is attached to the flexible substrate. The plate has a hole at a position of the through-hole to make the first pad reachable.

Abstract: In a computer system, a device is inserted to and disconnected from a synchronous bus without stopping the entire system. A timing generator generates timing to issue a bus termination/start command. A bus control table manage correspondence between the requests and the replies. For logical termination, the timing generator waits until the bus control table becomes empty. A bus arbitor has an arbitration pointer which stores the highest priority. A bus operation controller clears the arbitration pointer when the insertion or disconnection occurs.

Abstract: An automated program-generating apparatus, includes a program-generating section for receiving an input specification and for transforming the input specification into an output program. A reference device external to the program-generating section is available for referencing by the program-generating section. Metarules in the program-generating section operate with the reference device to transform the input specification into the output program.

Abstract: A bus controller connects to external devices having both a separate-type bus interface and a multiplexed-type bus interface simultaneously by providing a dedicated address terminal and a time-division-multiplexed address/data terminal in the same bus controller. A selector connects a first address bus (A0 through A7) to the combined address/data terminal. Additionally, the first address bus is connected to the dedicated address bus terminal. Hence, the bus controller can interface with external devices designed for either type of terminal without requiring an adapter.

Abstract: A wavelength division multiplexing system includes a first optical output level detector for detecting an optical output level of a first signal light transmitted on a transmission line, a signal light transmitter for transmitting an additional signal light to be multiplexed with the first signal light, and an optical coupler for multiplexing the additional signal light with the first signal light. The optical output level of the additional signal light is controlled on the basis of the optical output level of the first signal light transmitted on the transmission line.

Abstract: A semiconductor device includes a metal terminal provided on a semiconductor substrate and a protection element. The protection element includes an insulated gate field-effect transistor. The transistor has a first diffusion layer of a reverse conductive-type formed on one conductive type region of the semiconductor substrate and connected to the metal terminal, as its source. The transistor also includes a second diffusion layer of a reverse conductive-type connected to an electrode wire having a constant electric potential, as its source, and has a gate electrode connected to the electrode wire. A lateral bipolar transistor includes a third diffusion layer of a reverse conductive-type formed with a constant spaced distance with respect to the second diffusion layer and connected to the metal terminal, as its collector, and also has the second diffusion layer as its emitter, and furthermore has the one conductive-type region as its base.