Abstract: A method and structure for a transistor device comprises forming a source, drain, and trench region in a substrate, forming a first insulator over the substrate, forming a gate electrode above the first insulator, forming a pair of insulating spacers adjoining the electrode, converting a portion of the first insulator into a metallic film, converting the metallic film into one of a silicide and a salicide film, forming an interconnect region above the trench region, forming an etch stop layer above the first insulator, the trench region, the gate electrode, and the pair of insulating spacers, forming a second insulator above the etch stop layer, and forming contacts in the second insulator. The first insulator comprises a metal oxide material, which comprises one of a HfOx and a ZrOx.

Abstract: A method (and system) of improving performance of a multiprocessor system, includes proactively flushing and locking an arbitrarily-sized region of memory out of caches of the multiprocessor system.

Abstract: Transparent parallel planar plates which are members for retaining an optical waveguide are provided erectly in an optical path of light in a transparent vessel in advance. An optical fiber is fixed into the transparent vessel while the optical fiber penetrates the transparent vessel, and an optical sensor is also disposed adjustably. Next, a first photo-curable resin solution is injected into the transparent vessel, and light with a predetermined wavelength for curing is emitted from the optical fiber so that the optical waveguide is self-formed by polymerization reaction. Because the parallel planar plates are transparent, the optical waveguide is formed so as to be extended again from the emission ports of the parallel planar plates. Finally, the optical waveguide is formed so as to reach a bottom surface of the transparent vessel.

Abstract: A method (and resultant structure) of forming a semiconductor structure, includes processing an oxide to have a crystalline arrangement, and depositing an amorphous semiconductor layer on the oxide by one of evaporation and chemical vapor deposition (CVD).

Abstract: A LED has a thin highly resistive or insulative layer formed below an electrode pad in order to divert current flow from the region below an electrode pad, which region does not contribute to light emission, to another region which does. Consequently, better current efficiency is obtained. Further, diverting current flow from the region below the electrode pad where mechanical damages are expected deters deterioration of the region. Consequently, the LED lasts longer and is a better quality product.

Abstract: A mode establishing section of a differential limiting control apparatus for a four wheel drive vehicle commands an automatic mode control section or a manual mode control section to output calculated clutch torques according to a signal from a mode switch operated by a driver. In an initial condition of an ignition switch turned on, the execution command is issued to the automatic mode control section, until the driver newly selects the manual mode through the mode switch. Further, when the vehicle travels at a speed higher than a preestablished threshold value, the execution command is outputted to the automatic mode control section, irrespective of the signal from the mode switch.

Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).

Abstract: A method for design auditing by automating ways of auditing data produced by process steps is disclosed. The invention automates the process of auditing to account for complex methodology conditions. It also automates auditing of values of data produced by methodology steps. The invention provides a means of grouping task and information within a program and of preserving parent-child relationships.

Abstract: A method of classifying samples to one of a number of predetermined classes involves using a number of class models or classifiers to form order statistic for each classifier. A linear combination of the order statistic (L-statistic) is calculated to determine the confidence of that particular classifier, both in general and for that particular sample. Relative weights are then derived from these confidences, and used to calculate a weighted summation across all classifiers for each class of the likelihoods that a sample belongs to that class. The sample is classified in the class which has the associated weighted summation which is greatest in value.

Abstract: A 40/80-core cable discriminating method comprises the steps of setting a detecting period for detecting a first state of the PDIAG-signal, the detecting period being not shorter than a first time, the first time is necessary that the PDIAG-signal has been changed into the first state, and discriminating, by detecting the state of the PDIAG-signal during the detecting period, which the 40-core or the 80-core cable is used.

Abstract: A received electric field measuring section 11 measures the received electric fields from the communicative base station and the neighbor base stations. A received electric field memory section 12 stores received electric field patterns of the communicative base station and two given neighbor stations measured in the received electric field measuring section whenever the communicative base station for communication for the first time is switched over to one of the neighbor base stations. A received electric field pattern comparing section 13 compares the received electric field patterns of the communicative base station having and the two given neighbor stations and the received electric field patterns stored in the received electric field memory section whenever the received electric fields from the communicative base station been in communication with before and the two given neighbor base stations are measured in the received electric field measuring section.

Abstract: A structure and method for forming a tamper respondent electronic circuit enclosure that includes an integrated circuit structure, a mesh structure surrounding the integrated circuit structure, and a sealed enclosure surrounding the mesh structure. The mesh structure includes a layer of flexible dielectric having a first side and a second side, a screen-printed pattern of flexible electrically conductive first circuit lines forming a first resistor network on the first side, and a photo lithographically-formed pattern of flexible electrically conductive second circuit lines forming a second resistor network on the second side.

Abstract: A method and structure for a driver circuit having a plurality of parallel resistors, where a total impedance of all the resistors equals an impedance of an associated transmission line and a switch adapted to combine the resistors to control an output level of the driver. The driver circuit's switch selectively connects the resistors to either a voltage high signal or a voltage low signal. The first set of the switches connect a voltage high signal to a first resistor of the resistors and a second set of switches connect a voltage low signal to a second resistor of the resistors. The switch has a matched pair of opposite type transistors. The driver circuit has balancing resistors connected to the switch, the balancing resistors are sized to balance the resistance within the driver circuit. The resistors are the balancing resistors and the drivers are connected to the switches.

Abstract: First channel waveguides 1021 to 1023 of an array waveguide grating are connected via a first to a third exponential function shape optical waveguide 1111 to 1113 to a first sector-shape slab waveguide 105. In a second boundary part 109 which is disposed symmetrically with a first boundary part 108 via a channel waveguide array 104, second channel waveguides 1031 to 1033 are connected via a first to a third taper shape optical waveguide 1121 to 1123 to a second sector-shape slab waveguide 106. By adopting exponential function shape optical waveguides 111 at least partly, the optical frequency characteristics can be improved compared to the case of the second degree function shape, and also the degree of freedom can also be improved compared to the case of the rectangular shape.

Abstract: An electric power steering apparatus includes: a rotation speed detecting unit which detects a rotation speed of the electric motor; a compensation current determining unit which determines an instruction value of a compensation current to flow through the electric motor to suppress torque ripples due to distortion of an induced electromotive force waveform of the electric motor in accordance with a load correspondence quantity as a physical quantity corresponding to a load of the electric motor and the rotation speed detected by the rotation speed detecting unit; a correcting unit which corrects the current target value on the basis of the compensation current instruction value; and a control unit which performs a feedback control on the electric motor so that a current having the current target value as corrected by the correcting unit flows through the electric motor.

Abstract: A state saving circuit includes a state saving latch powered by an un-interruptible power supply, and a cut-off control device powered by the un-interruptible power supply that selectively connects the state saving latch to a pair of latch nodes based upon a control signal. The control signal determines whether the state-saving latch is in one of a state saving mode and a state restoring mode.

Abstract: A method and structure for a fuse structure comprises an insulator layer, a plurality of fuse electrodes extending through the insulator layer to an underlying wiring layer, an electroplated fuse element connected to the electrodes, and an interface wall. The fuse element is positioned external to the insulator, with a gap juxtaposed between the insulator and the fuse element. The interface wall further comprises a first side wall, a second side wall, and an inner wall, wherein the inner wall is disposed within the gap. The fuse electrodes are diametrically opposed to one another, and the fuse element is perpendicularly disposed above the fuse electrodes. The fuse element is either electroplatted, electroless plated, or is an ultra thin fuse.

Abstract: A device for executing a number of actions, such as driving in nails, on a planar section, for example a wall element, for fixing a covering panel or the like on the planar section. A carriage is displaceable longitudinally over the planar section. A number of the action device are mounted on one side of a carriage and are displaceable individually transversely of the planar section. A number of the action devices are mounted on the other side of the carriage and are displaceable together with one another transversely of the planar section.

Abstract: The present invention provides a small, low power consumption ultrasonic flow velocity meter. The burst signal generation section 110 generates two kinds of burst signals with a phase difference and sends these burst signals to a pair of transmission/reception ultrasonic transducers 6 and 7 located on the upstream side and downstream side of the conduit to be measured 9. Upon reception of the corresponding burst signals, the pair of the transmission/reception ultrasonic transducers 6 and 7 convert the burst signals, send ultrasonic waves with a phase difference to the conduit to be measured 9, receive the ultrasonic wave sent by the other transmission/reception ultrasonic transducer and propagated through the conduit to be measured and convert the ultrasonic waves to received signals.

Abstract: A first diffused layer and a second diffused layer are formed on the major surface of a silicon substrate. A first insulating layer, a second insulating layer or a semiconductor layer, and a third insulating layer are laminated on the major surface of the silicon substrate in the vicinity of the first diffused layer or the second diffused layer and are partially formed. A fourth insulating layer is formed as a gate insulating film. A fifth insulating layer is formed on the side walls of the second insulating layer or the semiconductor layer. In a region of most of a channel, the gate insulating film is formed and a gate electrode is formed so that it covers the gate insulating film and the laminated films. According to this structure, the operating voltage of a flash memory is reduced, the operation is easily sped up and the holding characteristic of information charge can be enhanced.