Patents Represented by Attorney Miles & Stockbridge P.C.
  • Patent number: 8346683
    Abstract: A knowledge based system, program, and method for regulatory knowledge representation, utilization, and maintenance is presented. The system, program, and method support advanced reasoning concerning entities and events in order to determine their adherence to regulations and policies, with the specific ability to identify violations of regulations that govern industries such as the financial services industry. Advanced approaches and methods that allow for efficient representation of regulatory knowledge, its utilization and maintenance are specifically defined. Events and actions like, for instance, financial transactions or regulatory compliance violations can be evaluated on an automated basis by applying various approaches and methods using the regulatory knowledge system.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: January 1, 2013
    Assignee: Exprentis, Inc.
    Inventors: Tomasz G. Dybala, Ewa Grzybowska, Roman Vichr
  • Patent number: 8346180
    Abstract: A transceiver includes an oscillator and a plurality of communication blocks. Each of the communication blocks includes frequency dividers and mixers. Frequency dividing number of the frequency divider included in one communication block is set to an even-numbered integer, and transmission local signals supplied from the frequency dividers to the mixer become quadrature signals having a phase difference of 90 degrees. The frequency dividing number of another frequency divider in the another communication block is set to a non-integer, and communication local signals supplied from the frequency divider to the mixers become non-quadrature signals having a phase difference at a predetermined offset angle from 90 degrees. The transceiver further includes a converting unit for giving a compensation offset amount having almost the same absolute value and having a polarity opposite to that of the offset angle to communication analog signals related to the mixer of the another communication block.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: January 1, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroshi Kamizuma, Satoshi Tanaka, Taizo Yamawaki, Yukinori Akamine, Koji Maeda
  • Patent number: 8345480
    Abstract: The present invention realizes a semiconductor integrated circuit device for driving liquid crystal (liquid crystal control driver IC) capable of easily setting drive conditions and the like according to specifications of a liquid crystal display to be used. An electrically-programmable nonvolatile memory circuit (EPROM) or an electrically erasable and programmable nonvolatile memory circuit (EEPROM) is provided in a semiconductor integrated circuit device for driving a liquid crystal display, and setting information is stored in the memory circuit. The memory circuit is constructed by a normal device which can be formed in the same process as a semiconductor manufacturing process of forming devices of other circuits.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: January 1, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Yasushi Kawase, Susumu Ishida, Takesada Akiba, Yasushi Nagata, Naoki Miyamoto, Kazuyoshi Shiba
  • Patent number: 8341204
    Abstract: A data processor whose level of operation parallelism is enhanced by composing floating-point inner product execution units to be compatible with single instruction multiple data (SIMD) and thereby enhancing the operation processing capability is made possible. An operating system that can significantly enhance the level of operation parallelism per instruction while maintaining the efficiency of the floating-point length-4 vector inner product execution units is to be implemented. The floating-point length-4 vector inner product execution units are defined in the minimum width (32 bits for single precision) even where an extensive operating system becomes available, and compose the inner product execution units to be compatible with SIMD. The mutually augmenting effects of the inner product execution units and SIMD-compatible composition enhances the level of operation parallelism dramatically.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: December 25, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Fumio Arakawa, Tetsuya Yamada
  • Patent number: 8339869
    Abstract: To improve the speed of accessing a low-speed circuit block from a high-speed circuit block without significantly increasing power consumption.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: December 25, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshihiko Hotta, Seiichi Saito, Hiroyuki Hamasaki, Hirotaka Hara, Itaru Nonomura
  • Patent number: 8339190
    Abstract: AVS (Adaptive Voltage Scaling) technique, by which variability and uncertainty are both taken into account. In the system arranged for AVS technique, a detection circuit optimum for each type of process variation is set. Examples of the detection circuit so arranged include a first measurement circuit for detection of variability, which produces a relative value with respect to the gate delay mean value, and a second measurement circuit for detection of uncertainty, which produces a relative value related to the gate delay standard deviation. The first and second measurement circuits are provided separately from each other. The control information for deciding the supply voltage is prepared based on relative values produced by the detection circuits. When preparing the control information, reference is made to e.g. a table data.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: December 25, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuo Otsuga, Yusuke Kanno, Yoshio Takazawa
  • Patent number: 8338968
    Abstract: A semiconductor device manufacturing technique which allows reduction of semiconductor chip size. First, a pad and other wires are formed over an insulating film. A surface protective film is formed over the insulating film including the pad and wires, and an opening is made in the surface protective film. The opening lies over the pad and exposes a surface of the pad. A bump electrode is formed over the surface protective film including the opening. Here, the pad is smaller than the bump electrode. Consequently, the wires are arranged just beneath the bump electrode in the same layer as the pad 10. In other words, the wires are arranged in space which becomes available because the pad is small enough.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: December 25, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Akihiko Yoshioka, Shinya Suzuki
  • Patent number: 8339713
    Abstract: A zoom optical system comprising, in order from an object side: a first lens group G1 having positive refractive power; a second lens group G2 having negative refractive power; and a rear lens group GR having positive refractive power; the rear lens group GR including at least a third lens group G3 that is disposed to the most object side and has positive refractive power, the third lens group G3 including at least four positive lenses L31-L33, L35 and at least one negative lens L34, at least a portion of a lens group disposed to an image side of the first lens group G1 being movable as a vibration reduction lens group in a direction including a component perpendicular to an optical axis, and a given conditional expression being satisfied, thereby providing a zoom optical system having excellent optical performance.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: December 25, 2012
    Assignee: Nikon Corporation
    Inventor: Hiroki Harada
  • Patent number: 8339712
    Abstract: Provided are a variable magnification optical system for making it possible to properly set a variable magnification ratio of each lens group by properly setting a variable magnification ratio of a fifth lens group, and an optical apparatus with the variable magnification optical system, and a method for manufacturing the variable magnification optical system. The optical apparatus has first to sixth lens groups (G1) to (G6) in order from an object, wherein the fifth lens group (G5) satisfies the following conditional expression: 0.65<|?5T/?5W|<3.20, where ?5T denotes the lateral magnification at the telephoto end state, and ?5W denotes the lateral magnification at the wide-angle end state.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: December 25, 2012
    Assignee: Nikon Corporation
    Inventor: Satoshi Hayakawa
  • Patent number: 8335883
    Abstract: To provide a data processing device in which a plurality of CPUs can individually and independently communicate with different functions of a USB device using a single communication path. The data processing device is configured so that a USB host module to be coupled to a plurality of central processing units has a plurality of pipes to communicate with an arbitrary end point of a USB device coupled from the outside of the data processing device, the data processing device also includes an access control register to specify which central processing unit should have a right to control the pipe and specify to which extent a range of the content of setting of a function for the pipe should be allowed, and a USB host interface is controlled in accordance with the content of setting of the access control register.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: December 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Shohei Tateyama, Takao Yamauchi, Eisaku Tomida, Kunihiko Nishiyama, Yasuyuki Suzuki
  • Patent number: 8334860
    Abstract: A semiconductor integrated circuit device includes a first high-speed serial interface circuit which has one differential serial data channel and a second high-speed serial interface circuit which has a plurality of differential serial data channels, the first high-speed serial interface circuit performs interface with the outside for control information, and a control circuit performs an internal operation on the basis of the control information. Both of the high-speed serial interface circuits share a RAM for storage of display data information. Whether the data information to be supplied to the RAM is received by using the first high-speed serial interface circuit or the second high-speed serial interface circuit is determined by the control circuit in accordance with the control information that is input to the first high-speed serial interface circuit.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: December 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Shusaku Miyata, Hirofumi Sonoyama
  • Patent number: 8334726
    Abstract: The semiconductor integrated circuit incorporates a PLL circuit including a phase-frequency comparator 1, first and second charge pumps 2 and 3, a loop filter 4, a voltage-control oscillator 5 and a divider 6. The operation mode of the PLL circuit includes a standby state where locking is stopped, a lock response operation where locking is started and a steady lock operation where the locking started by the lock response operation is continued. In the steady lock operation, setting is made so that the second charge pump 3 is smaller in charge/discharge current than the first charge pump 2. The first and second charge pumps 2 and 3 charge and discharge the loop filter 4 in response to outputs of the phase-frequency comparator 1 in reverse to each other in phase. In the lock response operation where locking is started, the second charge pump 3 is stopped from charging and discharging in reverse in phase.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: December 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Takashi Kawamoto
  • Patent number: 8330524
    Abstract: A semiconductor integrated circuit which reduces and increase in the level of a harmonic signal of an RF transmission output signal at the time of supplying an RF transmission signal to a bias generation circuit of an antenna switch, including an antenna switch having a bias generation circuit, a transmitter switch, and a receiver switch. The on/off state of a transistor of the transmitter switch coupled between a transmitter port and an I/O port is controlled by a transmit control bias. The on/off state of the transistors of the receiver switch coupled between the I/O port and a receiver port is controlled by a receiver control bias. An RF signal input port of the bias generation circuit is coupled to the transmit port, and a negative DC output bias generated from a DC output port is supplied to a gate control port of transistors of the receiver switch.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: December 11, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kaoru Katoh, Shigeki Koya, Shinichiro Takatani, Yasushi Shigeno, Akishige Nakajima, Takashi Ogawa
  • Patent number: 8327840
    Abstract: A solar energy collection system includes a primary solar receiver and a secondary solar receiver. The secondary solar receiver generates steam using energy from solar radiation incident thereon. The primary solar receiver receives the generated steam from the secondary solar receiver and superheats the steam using energy from solar radiation incident thereon. A plurality of heliostat-mounted mirrors reflects incident solar radiation onto one of the primary and secondary solar receivers. A controller aims a portion of the heliostat-mounted mirrors at the primary solar receiver such that a predetermined thermal profile is provided on a surface of the primary solar receiver.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: December 11, 2012
    Assignee: Brightsource Industries (Israel) Ltd.
    Inventors: Yoel Gilon, Israel Kroizer
  • Patent number: 8327992
    Abstract: The present invention provides a friction plate having a friction surface formed by sticking an annular friction material to a substantially annular core plate and wherein the friction surface is provided with a first oil groove having an opening portion opened to an inner peripheral edge of the friction plate and an end terminating at a point between the inner peripheral edge and an outer peripheral edge, and a second oil groove having an opening portion opened to the outer peripheral edge of the friction plate and an end terminating at a point between the inner peripheral edge and the outer peripheral edge.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: December 11, 2012
    Assignee: NSK-Warner K.K.
    Inventors: Tomoyuki Miyazaki, Masahiro Kobayashi
  • Patent number: 8330688
    Abstract: A display control drive device sequentially reads display data from a display memory in which the display data is stored, produces three primary color image signals that are applied to pixel locations in a dot-matrix color display device, and transmits the signals through a common external output terminal in a time-sharing manner. The display control drive device produces control signals applied to selection switching elements in the display device and that selectively apply an input image signal to any of three source lines. The display control drive device includes: a unit that determines one horizontal period based on a clock received from outside synchronously with display data; and a signal production circuit that produces and transmits the control signals, applied to the selection switching elements, so that the control signals will have a pulse duration equivalent to a time calculated by trisecting one horizontal period.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: December 11, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yasuhito Kurokawa, Kunihiko Tani
  • Patent number: 8327706
    Abstract: A high-performance angular rate detecting device is provided. A driving part including a drive frame and a Coriolis frame is levitated by at least two fixing beams which share a fixed end and are extending in a direction orthogonal to a driving direction, thereby vibrating the driving part. Even when a substrate is deformed by mounting or heat fluctuation, internal stress generated to the fixed beam and a supporting beam is small, thereby maintaining a vibrating state such as resonance frequency and vibration amplitude constant. Therefore, a high-performance angular rate detecting device which is robust to changes in mounting environment can be obtained.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: December 11, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Heewon Jeong, Yasushi Goto
  • Patent number: 8330496
    Abstract: An object of the present invention is to provide a technique of reducing the leakage current of a drive circuit for driving a circuit that must retain a potential (or information) when in its standby state. A semiconductor integrated circuit device of the present invention includes a drive circuit for driving a circuit block. This drive circuit is made up of a double gate transistor with gates having different gate oxide film thicknesses. When the circuit block is in its standby state, the gate of the double gate transistor having a thinner gate oxide film is turned off and that having a thicker gate oxide film is turned on. This arrangement allows a reduction in the leakage currents of both the circuit block and the drive circuit while allowing the drive circuit to deliver or cut off power to the circuit block.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: December 11, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Masanao Yamaoka, Takayuki Kawahara
  • Patent number: 8325786
    Abstract: There is a need for reducing the scale of a circuit that determines and decodes code types for reception signals coded with different codes. A reception logic circuit determines and decodes code types for reception signals coded with different codes. The reception logic circuit determines one of code types for a demodulation signal corresponding to the reception signal based on a difference between codes detected during a modulation period or a non-modulation period occurring in the demodulation signal. The reception logic circuit decodes the code type in accordance with the determined code type based on the modulation period or the non-modulation period that alternately occurs in the demodulation signal. In this manner, the received data is reproduced. There is no need for a decoder specific to each code.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: December 4, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Katsumi Sekiguchi, Mikihisa Orimo
  • Patent number: D673744
    Type: Grant
    Filed: November 7, 2011
    Date of Patent: January 1, 2013
    Inventors: Roberto Vela, Jonathan H. Bents