Patents Represented by Attorney Miles & Stockbridge P.C.
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Patent number: 7731731Abstract: In accordance with an embodiment of the present invention, a system for widening passages in the body of a patient includes a member extendable into a patient with a proximal end and a distal end with a tip and a hollow interior extending therebetween; bristles adjacent the distal end of the member such that rotation of the proximal end of the member causes rotation of the bristles to remove material from walls of pre-existing passages in the patient and, all of the bristles are inclined away from the tip of the distal end as they extend out from the distal end; a guide wire having a proximal end and a distal end disposed within the hollow interior and extendable into the patient; and a non-rotating capture member coaxially aligned with and fixed near the guide wire distal end to be disposed within the hollow interior and extendable into the patient.Type: GrantFiled: June 17, 2005Date of Patent: June 8, 2010Inventor: George S. Abela
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Patent number: 7732864Abstract: The present invention provides a high speed and low power consumption LSI operable in a wide temperature range in which a MOS transistor having back gates is used specifically according to operating characteristics of a circuit. In the LSI, an FD-SOI structure having an embedded oxide film layer is used and a lower semiconductor region of the embedded oxide film layer is used as a back gate. A voltage for back gates in the logic circuits having a small load in the logic circuit block is controlled in response to activation of the block from outside of the block. Transistors, in which the gate and the back gate are connected to each other, are used for the circuit generating the back gate driving signal, and logic circuits having a heavy load such as circuit block output section, and the back gates are directly controlled according to the gate input signal.Type: GrantFiled: July 25, 2006Date of Patent: June 8, 2010Assignee: Renesas Technology Corp.Inventors: Takayuki Kawahara, Masanao Yamaoka
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Patent number: 7732906Abstract: There is provided a small and high-performance System in Package (SiP) suitable for high-density mounting. A System in Package (SiP) has a stack structure such that two memory chips are stacked and mounted over the main surface of a wiring substrate, a microcomputer chip is stacked and mounted over the upper part thereof, and the chips are sealed by a mold resin. Each of the memory chips is constructed so as to transmit and receive data to/from the outside of the system via the microcomputer chip. The microcomputer chip is constructed of a multiport structure having various interfaces between it and the outside of the system in addition to an interface between it and the inside of the system. The number of terminals (pins) of the microcomputer chip is much larger than that of the memory chips.Type: GrantFiled: April 11, 2006Date of Patent: June 8, 2010Assignee: Renesas Technology Corp.Inventors: Hiroshi Kuroda, Nobuhiro Kinoshita
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Patent number: 7732919Abstract: Coupling reliability of a passive component is improved to increase the reliability of a semiconductor device. A first through hole is formed in a first electrode part of a first plate-like lead, and a second through hole is formed in a second electrode part of a second plate-like lead. As a result, at the first electrode part of the first plate-like lead, one external terminal of the passive component can be coupled to the first electrode parts on both sides of the first through hole while being laid across the first through hole. Also, at the second electrode part of the second plate-like lead, the other external terminal of the passive component can be coupled to the second electrode parts on both sides of the second through hole while being laid across the second through hole. Accordingly, at central portions both in the longitudinal and width directions of the passive component, the passive component is surrounded by sealing members.Type: GrantFiled: January 29, 2009Date of Patent: June 8, 2010Assignee: Renesas Technology Corp.Inventors: Ichio Shimizu, Kenya Kawano, Kisho Ashida, Yuichi Machida
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Patent number: 7732239Abstract: A method using a divided exposure technology is provided for restraining deterioration in the performance of a solid-state image sensor. A photoresist is formed over a semiconductor substrate and subjected to divided exposure. A dividing line for divided exposure is located at least over a region of a semiconductor substrate in which an active region in which a pixel is to be formed is defined. The photoresist is then developed and patterned. By utilizing the patterned photoresist, an element isolation structure for defining the active region in the semiconductor substrate is formed in the semiconductor substrate.Type: GrantFiled: March 18, 2008Date of Patent: June 8, 2010Assignee: Renesas Technology Corp.Inventors: Masatoshi Kimura, Hiroki Honda
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Patent number: 7728832Abstract: A display control/drive device (a liquid crystal controller driver and a semiconductor integrated circuit for driving liquid crystals) which can serve to reduce peak currents and thereby restrain the occurrence of EMI is to be provided. In a liquid crystal display control/drive device in which image signals to be applied to signal lines of a color liquid crystal panel are generated in response to display image data that are received, image signals for pixels of the same color are divided into a plurality of groups. And during a period in which the substantial frame frequency can be reduced, the period of a line clock matching one horizontal period is extended to slightly stagger the output timing of image signals from one to another of the groups and the sequence of outputs from the different groups is periodically varied.Type: GrantFiled: July 31, 2006Date of Patent: June 1, 2010Assignee: Renesas Technology Corp.Inventor: Kazuhiro Okamura
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Patent number: 7729258Abstract: A multiport switch circuit which performs transfer according to flow control and a protocol with an ordering rule specified, wherein the circuit for avoiding packets from clogging is realized in a small size. A packet receiving side circuit has a packet selection output circuit to suppress a circuit size by decreasing the number of transfer data paths, and the packet selection output circuit performs output of selected packets according to a priority packet type selection instruction signal in addition to output of a receiving order packet according to a receiving order output instruction signal to make it possible to avoid clogging caused because the packets made to wait for transmission by the flow control cannot be overtaken by another packet type according to the ordering rule.Type: GrantFiled: May 29, 2007Date of Patent: June 1, 2010Assignee: Hitachi, Ltd.Inventors: Masatoshi Ezawa, Masamichi Andou, Hisakazu Date
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Patent number: 7726449Abstract: An airtight damper, an input axis, and a flywheel are mounted to the input axis with a bolt. A torque transmitter, a torque transmitter attachment unit of the flywheel, and a support plate are united with each other using a bolt. The torque transmitter includes a spline unit. A pressure plate engaged with the spline unit is pressed by a pressure spring so as to press a friction plate and a torque transmitter plate against the support plate. Since the torque transmitter plate is fixed to a drive plate by a rivet, the torque from the input axis can be transmitted to the drive plate. Although the torque from the engine is larger than an allowable value, a friction member can slip at a constant torque depending on the pressure of the pressure spring, thereby protecting the damper against an excess load.Type: GrantFiled: December 14, 2001Date of Patent: June 1, 2010Assignee: NSK-Warner K.K.Inventors: Hiroshi Yabe, Dai Okamura
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Patent number: 7729198Abstract: A semiconductor integrated circuit device including a memory circuit with both high access efficiency and high memory efficiency in a simple configuration is provided. In a memory read control circuit, burst length is changed based on whether or not a read instruction is issued at a cycle after a cycle at which a read instruction /R is issued. And, in a memory write control circuit, burst length is changed based on whether or not a write instruction is issued at a cycle before a cycle at which a write instruction /W is issued.Type: GrantFiled: October 29, 2007Date of Patent: June 1, 2010Assignee: Hitachi, Ltd.Inventors: Masatoshi Hasegawa, Michiaki Nakayama, Masatoshi Sakamoto
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Patent number: 7728442Abstract: A semiconductor device manufacturing technique which allows reduction of semiconductor chip size. First, a pad and other wires are formed over an insulating film. A surface protective film is formed over the insulating film including the pad and wires, and an opening is made in the surface protective film. The opening lies over the pad and exposes a surface of the pad. A bump electrode is formed over the surface protective film including the opening. Here, the pad is smaller than the bump electrode. Consequently, the wires are arranged just beneath the bump electrode in the same layer as the pad 10. In other words, the wires are arranged in space which becomes available because the pad is small enough.Type: GrantFiled: December 9, 2007Date of Patent: June 1, 2010Assignee: Renesas Technology Corp.Inventors: Akihiko Yoshioka, Shinya Suzuki
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Patent number: 7727399Abstract: A device, system and method for exchanging components between first and second fluids by direct contact in a microfluidic channel. The fluids flow as thin layers in the channel. One of the fluids is passed through a filter upon exiting the channel and is recycled through a secondary processor which changes the fluid's properties. The recycled fluid is reused for further exchange. The filter excludes blood cells from the recycled fluid and prevents or limits clogging of the filter. The secondary processor removes metabolic waste and water by diafiltration.Type: GrantFiled: May 22, 2007Date of Patent: June 1, 2010Assignee: The Trustees of Columbia University in the City of New YorkInventors: Edward F. Leonard, Alan C. West, Christian P. Aucoin, Edgar E. Nanne
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Patent number: 7730527Abstract: Disclosed is a method and system for controlling access of a source terminal to a network that includes, in particular, a firewall and an authentication portal that maintains the firewall during an access request originating from the source terminal and which permits access when periodically and subsequently provided with a valid authentication token. The source terminal can also communicate in tunnel mode with the destination terminal of the network via a block mode tunnel. Authentication tokens are periodically supplied on the OSI Layer 2 level so that the tokens continue to be provided during a block tunnel mode communication. A network operator can maintain access control using a captive portal paradigm even when a user chooses to use a block mode tunnel.Type: GrantFiled: May 27, 2005Date of Patent: June 1, 2010Assignee: France TelecomInventors: Olivier Charles, Laurent Butti, Franck Veysset
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Patent number: 7726504Abstract: A packaging system or method for protecting combustible material in a sprinkler-provided environment has an outer layer with a combustible surface covering a fire-retardant protection layer. Combustion of the surface of the outer layer promotes effective sprinkler operation, while combustible material is protected by the fire-retardant protection layer.Type: GrantFiled: February 7, 2007Date of Patent: June 1, 2010Inventor: Jeffrey M. Shapiro
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Patent number: 7726535Abstract: A stapler for stapling together a workpiece, primarily a sheaf of papers, in which the stapler comprises a stapling unit and an anvil, which interacts with the stapling unit and on which the workpiece is placed, and against which stapling is performed, which stapling unit and an anvil are, driven relative to each other in a reciprocating stapling movement, during which movement stapling takes place, the stapling unit comprises a frame and a staple cassette which houses staple blanks and which is exchangeable, and which is detachably connected to the frame by attachment devices, and the staple blanks are fed one by one to an outlet channel by a feeding device incorporated in the stapler.Type: GrantFiled: April 13, 2005Date of Patent: June 1, 2010Assignee: Isaberg Rapid ABInventors: Ulf Jönsson, Lars-Inge Magnusson, Frank Ambjörnsson, Trygve Gustavsson
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Patent number: 7727496Abstract: The present invention relates generally to a method of extracting cobalt and other impurity metals from a concentrated nickel sulphate solution by a solvent extraction process whereby a cationic solvent extractant is separately pre-equilibrated with a portion of a purified nickel sulphate solution in such a manner that it is loaded with nickel without precipitating insoluble nickel double salts. The nickel loaded extracted is then transferred to an impure cobalt nickel solution where the cobalt and certain other impurity metals exchange with nickel leaving a purified concentrated nickel sulphate solution suitable for hydrogen reduction or electrowinning. The cobalt loaded extractant is stripped with dilute sulphuric acid before being recycled while an aqueous cobalt stripped solution is further processed to recover cobalt.Type: GrantFiled: December 19, 2000Date of Patent: June 1, 2010Assignee: WMC Resources Ltd.Inventors: John O'Callaghan, Tony Chamberlain
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Patent number: 7722437Abstract: A polishing pad used in a CMP step in the manufacture of a semiconductor integrated circuit device is relatively expensive; thus, it is necessary to avoid a wasteful exchange of the pad. Accordingly, it is important to measure the abrasion amount of this pad precisely. However, in ordinary measurement thereof through light, the presence of a slurry hinders the measurement. In measurement thereof with a contact type sensor, a problem that pollutants elute out is caused. In a CMP step in the invention, the height position of a dresser is measured while the dresser operates, thereby detecting the abrasion amount or the thickness of a polishing pad indirectly. In this way, the time for exchanging the polishing pad is made appropriate.Type: GrantFiled: May 8, 2008Date of Patent: May 25, 2010Assignee: Renesas Technology Corp.Inventor: Yoshinori Ito
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Patent number: 7725665Abstract: A data processor (1) has a central processing unit (3) and a memory controller (6) capable of controlling a memory (8) to be connected to an outside. The memory has a buffer capable of temporarily holding data within an address range corresponding to a predetermined bit number on a low order side of an address signal, and a burst operation for inputting/outputting data can be carried out by a data transfer between the buffer and the outside for an access request in which an access address is changed within the address range. When causing the memory to carry out the burst operation to give an access, the memory controller performs an access control for freely executing the burst operation of the memory continuously if it detects an access exceeding the address range. When causing the memory to carry out the burst access, the memory controller performs an access control for freely executing the burst operation of the memory continuously if it detects the access exceeding the address range.Type: GrantFiled: June 30, 2004Date of Patent: May 25, 2010Assignee: Renesas Technology Corp.Inventors: Masayoshi Horishima, Hajime Sasaki, Takashi Koshido
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Patent number: 7723849Abstract: A semiconductor device and a manufacturing method thereof are provided for the improvement of the reliability of copper damascene wiring in which a film between wiring layers and a film between via layers are comprised of an SiOC film with low dielectric constant. A film between wiring layers, a film between wiring layers, and a film between via layers are respectively comprised of an SiOC film, and stopper insulating films and a cap insulating film are comprised of a laminated film of an SiCN film A and an SiC film B. By doing so, it becomes possible to reduce the leakage current of the film between wiring layers, the film between wiring layers, and the film between via layers, and also possible to improve the adhesion of the film between wiring layers, the film between wiring layers, and the film between via layers to the stopper insulating films and the cap insulating film.Type: GrantFiled: December 28, 2006Date of Patent: May 25, 2010Assignee: Renesas Technology Corp.Inventors: Kazutoshi Ohmori, Tsuyoshi Tamaru, Naohumi Ohashi, Kiyohiko Sato, Hiroyuki Maruyama
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Patent number: D616214Type: GrantFiled: June 30, 2009Date of Patent: May 25, 2010Assignee: Innovation U.S.A., Inc.Inventor: Per Weiss Andersen
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Patent number: D616215Type: GrantFiled: June 30, 2009Date of Patent: May 25, 2010Assignee: Innovation U.S.A., Inc.Inventor: Per Weiss Andersen