Abstract: This invention provides a high frequency power module which is incorporated into a mobile phone and which incorporates high frequency portion analogue signal processing ICs including low noise amplifiers which amplify an extremely weak signal therein. A semiconductor device includes a sealing body which is made of insulation resin, a plurality of leads which are provided inside and outside the sealing body, a tab which is provided inside the sealing body and has a semiconductor element fixing region and a wire connection region on a main surface thereof, a semiconductor element which is fixed to the semiconductor element fixing region and includes electrode terminals on an exposed main surface, conductive wires which connect electrode terminals of the semiconductor element and the leads, and conductive wires which connect electrode terminals of the semiconductor element and the wire connecting region of the tab.

Abstract: A first flow path is defined within a first panel that forms a part of an extracorporeal fluid circuit. A second flow path is defined within a second panel that also forms a part of the extracorporeal fluid circuit. The first and second panels are oriented in a fluid processing cartridge for mounting as an integrated unit on a fluid processing machine and for removal as an integrated unit from the fluid processing machine.

Abstract: A medical treatment system isolates more risk-sensitive equipment from less risk-sensitive components of a treatment device to allow upgrades to be made to the latter more easily without an concomitant increase in risk to a patient caused by upgrades. For example, the latter may serve a pure monitoring function while the former encapsulates the treatment functions thereby preventing errors from the latter from propagating into the treatment-sensitive portions of the device.

Abstract: The test design cost of a circuit capable of accessing an external memory is reduced. There is included a built-in self-test circuit for use in testing an external memory separately from a memory controller for performing memory control in response to an access request to the external memory capable of being coupled to a memory interface, and a TAP controller is used to control the built-in self-test circuit and referring to a test result. There is adopted a multiplexer for switchably selecting the memory controller or the built-in self-test circuit as a circuit for coupling to the memory interface in accordance with control information externally inputted through the TAP controller. The built-in self-test circuit programmably generates and outputs a pattern for a memory test in accordance with an instruction inputted through the TAP controller, and compares data read from the external memory with an expected value.

Abstract: A processing load of a high performance application processing such as a voice, an image and the like is reduced, and a processing capacity of a base band processing is improved. A semiconductor integrated circuit device used in a mobile communication system such as a cellular phone is provided with a base band CPU block performing a base band processing for executing a base band protocol stack, an application system CPU block executing a high-level OS and controlling applications other than the base band processing, an application real-time CPU block executing a real-time OS and the like and controlling an image/voice processing, all of which are formed on one semiconductor chip. Further, internal high-speed buses to which these CPU blocks are connected are respectively connected via bridges.

Abstract: Erasing is performed with respect to a nonvolatile memory cell without causing depletion halfway therethrough. A control circuit for reversibly and variably controlling the threshold voltage of the nonvolatile memory cell by electrical erasing and writing controls an erase process of performing erasing to the plurality of nonvolatile memory cells assigned to one unit in an erase operation, a first write process of performing writing to the nonvolatile memory cell exceeding a pre-write-back level before a depletion level, and a second write process of performing writing to the nonvolatile memory cell exceeding a write-back level after the first write process. Since the occurrence of depletion is suppressed by successively performing the first write process with respect to the nonvolatile memory cells which may exceed the depletion level in the erase process, erasing can be performed to the nonvolatile memory cell without causing depletion halfway therethrough.

Abstract: The present invention provides a wet-type multi-plate clutch comprising an external toothed plate formed by sticking a friction material onto a core plate and an internal toothed plate formed by a friction material onto a core plate and designed so that torque is transmitted by engaging the external toothed plate with the internal toothed plate and wherein each of the external toothed plate and the internal toothed plate has one axial surface including a convex surface to which a friction material is stuck, and a friction surface from which a surface of the core plate is exposed and wherein the convex surface and the friction surface are opposed to each other.

Abstract: A high-performance angular rate detecting device is provided. A driving part including a drive frame and a Coriolis frame is levitated by at least two fixing beams which share a fixed end and are extending in a direction orthogonal to a driving direction, thereby vibrating the driving part. Even when a substrate is deformed by mounting or heat fluctuation, internal stress generated to the fixed beam and a supporting beam is small, thereby maintaining a vibrating state such as resonance frequency and vibration amplitude constant. Therefore, a high-performance angular rate detecting device which is robust to changes in mounting environment can be obtained.

Abstract: After forming a source-drain material film on an insulator layer, an opening portion reaching the insulator layer is formed in the source-drain material film. Then, a channel having desired thickness and a gate insulator are sequentially formed on the insulator layer and the source-drain material film in the opening portion. Thereafter, a gate material film embedding the opening portion is formed on the gate insulator. Subsequently, a cap film is formed on the gate material film, thereby forming the gate made of the gate material film. Then, a mask layer is formed on the source-drain material film. Next, the source-drain material film not protected by the mask layer is removed while protecting the gate by the cap film, thereby leaving the source-drain material film on both sides of the gate. The source-drain material film on one side becomes the source and that on the other side becomes the drain.

Abstract: An outer retainer for a one-way clutch has a cylindrical portion and a flange portion extending radially outward from an axial end of the cylindrical portion. The flange portion has three or more arc-shaped major parts disposed circumferentially and arc-shaped minor parts, each adjacent two of the major parts being connected to one another through a minor part, the major and minor parts projecting radially outward to different extents, and the arc-shape of the major and minor parts constituting continuously the shape of the outer periphery of the flange portion.

Abstract: The disclosed invention is intended to decrease the power consumption of a pulse latch circuit. A pulse latch circuit that operates in sync with a pulsed clock signal, including a first operation mode in which shifting test pattern scan data is performed and a second operation mode in which shifting the test pattern scan data is not performed, comprises the following circuits: a first latch circuit that is able to latch input data in sync with the clock signal; a second latch circuit that is connected to the first latch circuit and is able to latch the test pattern scan data to be shifted in sync with the clock signal; and a control circuit that stops supply of the clock signal to the second latch circuit during the second operation mode. By thus stopping the supply of the clock signal to the second latch circuit, decrease the power consumption is achieved.

Abstract: Electrostatic discharge protection for guided wave microwave structures is provided by a protection device that imposes minimal disruption on the microwave structures and negligible interference with the normal operation of the structures. The protection device provides a discharge path between a signal conductor and a ground conductor when electrostatic charges on the signal conductor reach a predetermined voltage level. The protection device includes an insulating base that bridges a space between the signal conductor and the ground conductor and that supports a dispersion of metal particles adhered to the base.

Abstract: Provided is a semiconductor device having, over a semiconductor substrate, a control gate electrode and a memory gate electrode which are adjacent to each other and constitute a nonvolatile memory. The height of the memory gate electrode is lower than the height of the control gate electrode. A metal silicide film is formed over the upper surface of the control gate electrode, but not formed over the upper surface of the memory gate electrode. The memory gate electrode has, over the upper surface thereof, a sidewall insulating film made of silicon oxide. This sidewall insulating film is formed in the same step as that for the formation of respective sidewall insulating films over the sidewalls of the memory gate electrode and the control gate electrode. The present invention makes it possible to improve the production yield and performance of the semiconductor device having a nonvolatile memory.

Abstract: No flicker is displayed on the display screen during display of moving pictures and power consumption can be reduced by adding a high quality moving picture display function. Moreover, the number of times of transfer of moving pictures by comprising a still-picture•text•system•I/O bus•interface and a moving picture interface (external display interface), providing a display operation change register (DM) and a RAM access change register (RM) which are changed selectively depending on display content (display mode) displayed on a display device and displaying the display data on the display device via a picture memory even in the moving picture display mode.

Abstract: A nonvolatile, sophisticated semiconductor device with a small surface area and a simple structure capable of switching connections between three or more electrodes. In a semiconductor device at least one of the electrodes contains atoms such as copper or silver in the solid electrolyte capable of easily moving within the solid electrolyte, and those electrodes face each other and applying a voltage switches the voltage on and off by generating or annihilating the conductive path between the electrodes. Moreover applying a voltage to a separate third electrode can annihilate the conductive path formed between two electrodes without applying a voltage to the two electrode joined by the conductive path.

Abstract: A semiconductor device includes a gate electrode GE electrically connected to a gate portion which is made of a polysilicon film provided in the inside of a plurality of grooves formed in a striped form along the direction of T of a chip region CA wherein the gate electrode GE is formed as a film at the same layer level as a source electrode SE electrically connected to a source region formed between adjacent stripe-shaped grooves and the gate electrode GE is constituted of a gate electrode portion G1 formed along a periphery of the chip region CA and a gate finger portion G2 arranged so that the chip region CA is divided into halves along the direction of X. The source electrode SE is constituted of an upper portion and a lower portion, both relative to the gate finger portion G2, and the gate electrode GE and the source electrode SE are connected to a lead frame via a bump electrode.

Abstract: A light beam emitted from a light source (11) impinges on the spherical surface (20a) of a collimator lens (20) substantially perpendicularly thereto. A light beam making a small angle to the optical axis impinges on the ellipsoid (20c) and then it is refracted. The ellipsoid (20c) converts light beams diverging from a light source located at the first focal point thereof into parallel light beams. A light beam making a large angle to the optical axis impinges on an ellipsoid (20b) and then it is reflected totally off the ellipsoid (20b). A light beam diverging from a light source located at the first focal point of the ellipsoid (20b) is converted into a light beam being focused on the second focal point thereof. An ellipsoid (20d) converts the light beams focused on the second focal point thereof into parallel light beams.

Abstract: A UMOSFET is capable of reducing a threshold voltage and producing a large saturation current. A typical UMOSFET according to the present invention includes: an N+ type SiC substrate constituting a drain layer; an N? type SiC layer that is in contact with the drain layer and constitutes a drift layer; a P type body layer formed on the drift layer and being a semiconductor layer; an N+ type SiC layer constituting a source layer; a trench extending from the source layer to a predetermined location placed in the drift layer; a P type electric field relaxation region provided around and outside a bottom portion of the trench; and a channel region extending from the N+ type source layer to the P type electric field relaxation region and having an impurity concentration higher than that of the N? type drift layer and lower than that of the P type body layer.

Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.

Abstract: A peelable lid structure, particularly for use in the closing of food cans, has a tab which is folded over the center panel and secured in the folded position for processing of can contents and/or handling operations. As the tab is secured, an inexpensive laminate structure which requires little or no aluminum content can be used. Methods of forming the peelable lid structure include exposing a layer of heat sealable material and/or an adhesive layer so that the tab (3) can be folded over and adhered to this layer, for example, by heat sealing.