Patents Represented by Attorney Miles & Stockbridge P.C.
  • Patent number: 7492526
    Abstract: A high-zoom-ratio zoom lens having superb optical performance despite compactness and a high zoom ratio. The lens includes, in order from an object, a first group having positive power; a second group having negative power; a third group having positive power; and a fourth group having positive power. The third group includes, in order from the object, a first positive lens having a convex surface facing the object, a second positive lens having a convex surface facing the object, a double concave negative lens having a radius of curvature of the image side surface smaller than that of the object side surface, and a third positive lens having a double convex shape. Any of lens surfaces composing the third group is an aspherical surface. Upon zooming from a wide-angle end to a telephoto end, all groups moving along the optical axis. Given condition is satisfied.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: February 17, 2009
    Assignee: Nikon Corporation
    Inventor: Susumu Sato
  • Patent number: 7492524
    Abstract: Providing a zoom lens system with a vibration reduction function, a high zoom ratio, and a wide angle of view, an imaging apparatus, a method for vibration reduction, and a method for varying a focal length. The system includes, in order from an object, a first lens group having positive power, a second lens group having negative power, a third lens group having positive power, and a fourth lens group having positive power. Upon zooming from a wide-angle end to a telephoto end, a distance between the first and the second lens groups increases, a distance between the second and the third lens groups decreases, and a distance between the third and the fourth lens groups varies. The third lens group consists of a front group and a rear group. Vibration reduction is carried out by moving only the rear group perpendicularly to the optical axis. Given conditions are satisfied.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: February 17, 2009
    Assignee: Nikon Corporation
    Inventor: Tomoki Ito
  • Patent number: 7490630
    Abstract: The invention relates to a pipe system comprising four pipes or tubes each with external corrugations. The pipes also have an end sleeve or connector joint. As in the first embodiment, the pipes of the system are supported in a desired array by an initially separate support, comprising in use base element or part, an intermediate or middle, in use, cruciform element or part and in use upper element or part. The upper part is shown cut away to show the pipes in position. The parts of the support are bound together by a shrink-wrapped film, e.g. of polyethylene, and can be delivered to a building site and laid in a trench without the need to import on the site expensive gravel, sand, soil or the like. Material removed from the trench is used as the back fill.
    Type: Grant
    Filed: September 2, 2005
    Date of Patent: February 17, 2009
    Assignee: Polypipe Civils Limited
    Inventor: Kevin John Coupe
  • Patent number: 7492655
    Abstract: A sense amplifier is constructed to reduce the occurrence of malfunctions in a memory read operation, and thus degraded chip yield, due to increased offset of the sense amplifier with further sealing down. The sense amplifier circuit is constructed with a plurality of pull-down circuits and a pull-up circuit, and a transistor in one of the plurality of pull-down circuits has a constant such as a channel length or a channel width larger than that of a transistor in another pull-down circuit. The pull-down circuit with a larger constant of a transistor is first activated, and then, the other pull-down circuit and the pull-up circuit are activated to perform the read operation.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: February 17, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Satoru Akiyama, Riichiro Takemura, Takayuki Kawahara, Tomonori Sekiguchi
  • Patent number: 7490695
    Abstract: A small gap is formed between a worm shaft 3 and a second bearing 20, so that the worm shaft can be tilted relative to the inner ring 20a of the second bearing 20 without fail when preloaded by a torsion spring 14. An elastic member 41 is provided in at least portion of a circumferential groove 40 in the small gap. The worm shaft 3 and the inner ring 20a of the second bearing 20 are not in contact with each other, and their metallic clank in the small gap can be prevented. By providing a projecting portion(s) 3b on one side or both sides, with respect to the axial direction, of the circumferential groove 40, the small gap between the worm shaft 3 and the inner ring 20a of the second bearing 20 can be made large, and it is possible to enlarge the range over which the worm shaft 3 can swing.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: February 17, 2009
    Assignee: NSK Ltd.
    Inventor: Toru Segawa
  • Patent number: 7492341
    Abstract: A semiconductor circuit with the reduced scale of circuitry and a semiconductor integrated circuit chip which is obtained by integrating the semiconductor circuit and enables chip size reduction are provided. For this purpose, a two-decode method is used. The method uses: a pre-decode circuit comprising a first decoder of the preceding stage which decodes an arbitrary bit of an address signal of eight bits and a second decoder of the preceding stage which decodes the remaining bits; level conversion circuits which shift the output of the pre-decode circuit; and post-decode circuits which decode the decode outputs of the decoders in the pre-decode circuit, level-converted through the level conversion circuits.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: February 17, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Toshikazu Tachibana, Yoshitaka Iwasaki, Kazuya Endo, Goro Sakamaki
  • Patent number: 7492644
    Abstract: There is achieved a high-integrated and high-speed nonvolatile memory which can stabilize an operation of a phase-change memory for a short operation cycle time. A latch is provided in a write driver. A change to a high-resistance state of a phase-change element is performed per column cycle by a write-enable signal, and a change to a low-resistance state thereof is performed after a pre-charge command is inputted and concurrently with deactivation of a pre-charge signal. Thereby, a write time to a memory cell in which phase-change resistance is changed to a low-resistance state, and a period from a write operation for changing the phase-change resistance to a high-resistance state to a read operation to the above memory cell can be lengthened without extending the column cycle time, so that the stable write operation is achieved.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: February 17, 2009
    Assignees: Hitachi, Ltd., Elpida Memory, Inc.
    Inventors: Riichiro Takemura, Takeshi Sakata, Norikatsu Takaura, Kazuhiko Kajigaya
  • Patent number: 7492132
    Abstract: The present invention provides a switching regulator having good stability compatible with a good response and an enhanced protection function. A first capacitor is placed between an output end of an inductor to generate an output voltage and a ground potential. From input voltage, a current is supplied to the inductor's input end by a first switch element. A first feedback path includes a hysteretic comparator. An output voltage added to a voltage proportional to the current flowing through the inductor is supplied to the hysteretic comparator which discriminates whether the voltage is appropriate by hysteresis characteristics and generates a PWM control signal in accordance with an output current variation. Moreover, a second feedback path is provided to feed back an error amplifier output voltage with greater gain in a low frequency domain and an attenuation loop around a PWM frequency band to the comparator's reference voltage input terminal.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: February 17, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Hiroshi Kuroiwa, Yasuhiko Kokami, Osamu Yamashita
  • Patent number: 7490258
    Abstract: A microcomputer is provided having a memory card interface capable of correctly latching data even when a card such as an MMC card is connected thereto. In the microcomputer having an interface with an external device such as a memory card, the interface unit is provided with an output driver connected to an external terminal for outputting a clock signal to output the clock signal and with an equivalent load circuit capable of imparting, to the clock signal extracted from an arbitrary position in a stage previous to the output driver in a clock signal path, delay equivalent to delay resulting from an external load connected to the external terminal in order to generate a clock signal for latching data inputted from the memory card.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: February 10, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Kazuo Sakamoto, Naozumi Morino, Ikuo Kudo
  • Patent number: 7489552
    Abstract: In a non-volatile phase change memory, information is recorded by utilizing a change in resistance of a phase change portion. When the phase change portion is allowed to generate Joule's heat and is held at a specific temperature, it goes into a state of a low resistance. When the gate voltage of a memory cell selection transistor QM is controlled to afford a low resistance state, the maximum amount of current applied to the phase change portion is limited by the application of a medium-state voltage to the control gate, thereby avoiding overheating of the phase change portion.
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: February 10, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Kenzo Kurotsuchi, Norikatsu Takaura, Osamu Tonomura, Motoyasu Terao, Hideyuki Matsuoka, Riichiro Takemura
  • Patent number: 7488927
    Abstract: Disclosed herein is a semiconductor integrated circuit device such as a for-camera preprocessing LSI suitable for a semiconductor integrated circuit and having improved responsiveness. In a D/A converter circuit for generating a feedback signal for compensating for black level variation in a for-camera preprocessing LSI, first-conductivity-type MOSFETs as first current sources produce currents corresponding to digital signals. The digital signals are supplied to first-conductivity-type first differential MOSFETs and second-conductivity-type second differential MOSFETs, with the gates and drains of the first differential MOSFETs and the gates and drains of the second differential MOSFETs being connected together respectively.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: February 10, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Toshio Mochizuki, Takanobu Ambo
  • Patent number: 7489588
    Abstract: A column circuit that amplifies signals read from a sense amplifier array SAA to local input/output lines LIO in sub-amplifiers SAMP to transfer the amplified signals to main input/output lines MIO is provided. A current control circuit IC that can set one of two kinds of currents according to read enable signals RD1, RD2 is provided in each sub-amplifier SAMP. The read enable signals RD1, RD2 are generated at timings corresponding to the number of cycles in burst read operation under control of the timing controller. Current in the current control circuit IC is set to be large by the RD1 in burst read operation cycle just after activation of a memory bank, while current in the current control circuit IC is set to be small by the RD2 in the next and subsequent burst read cycles. Accordingly, expansion of an operation margin or reduction of power consumption can be realized in a semiconductor device including a semiconductor memory such as a DRAM.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: February 10, 2009
    Assignees: Hitachi, Ltd., Elpida Memory, Inc.
    Inventors: Satoru Hanzawa, Tomonori Sekiguchi, Riichiro Takemura, Satoru Akiyama, Kazuhiko Kajigaya
  • Patent number: 7489063
    Abstract: An object of the present invention is to provide an inexpensive thin film piezoelectric bulk acoustic wave resonator that allows fine-tuning of a resonant frequency. Another object is to provide an inexpensive filter with dramatically improved frequency characteristics, using thin film piezoelectric bulk acoustic wave resonators that can be formed on one substrate.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: February 10, 2009
    Assignee: Hitachi Media Electronics Co., Ltd.
    Inventors: Atsushi Isobe, Kengo Asai, Hisanori Matsumoto, Nobuhiko Shibagaki
  • Patent number: 7486126
    Abstract: This invention provides a technique for enhancing an operating frequency and improving reliability in a system using at least level sense type sequence circuits as a plurality of sequence circuits. A microcomputer includes a clock generator configured as a clock supply source, functional modules operated in sync with a clock signal, level sense type sequence circuits which are contained in the functional modules and configured as clock supply destinations, a clock supply system which propagates the clock signal to the level sense type sequence circuits, etc. The clock supply system includes a clock wiring which propagates the clock signal outputted from the clock generator to ends thereof via a plurality of branches. At least pulse generators are disposed in the midstream of the clock wiring. Each of the pulse generators varies timing provided to change the falling edge of the clock signal, which defines an endpoint of an input operating period of each level sense type sequence circuit.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: February 3, 2009
    Assignee: Renesas Technology Corp.
    Inventor: Yasuhisa Shimazaki
  • Patent number: 7484606
    Abstract: A one-way clutch comprising an inner race and an outer race radially spaced apart from each other and concentrically disposed for rotation relative to each other, and a spray disposed between the inner race and the outer race for transmitting torque is characterized in that the cam surface of the sprag which contacts with the outer peripheral surface of the inner race is formed with a plurality of axially extending grooves.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: February 3, 2009
    Assignee: NSK-Warner K.K.
    Inventors: Kazuhiko Muramatsu, Akira Iwano
  • Patent number: 7484879
    Abstract: Embodiments of the present invention are directed to a stirrer tool that includes a head component having a first plurality of projections extending substantially radially out from and substantially perpendicular to a longitudinal axis of a body portion. Head component may also have a second plurality of projections extending in a substantially distal direction away from a distal end of the body portion, and all of the projections may be made of a substantially stiff material that is flexible enough to be bent to fit through an opening in a container that is smaller in diameter than a diameter of the head component and stiff enough to mix viscous products. The projections may further be capable of being shortened by cutting off a selected length of the projections. The first plurality of projections may be configured to create a vortex mixing action and the second plurality of projections may be configured to reach and stir up sediment on bottoms and in corners of containers.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: February 3, 2009
    Inventor: Ralph H. Hamilton, Jr.
  • Patent number: 7482875
    Abstract: The invention provides a wide-band, low-noise, and small-sized high frequency power amplifier that has small temperature dependence of the gain and is excellent in input matching. A parallel circuit consisting of a resistor whose resistance depends strongly on temperature and a conventional resistor is inserted serially into a signal path in an input matching circuit of an amplification unit, and resistances of the resistors are set to appropriate values, for example, about 2/3 times an input impedance of the amplification unit.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: January 27, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Tomonori Tanoue, Masami Ohnishi
  • Patent number: 7481305
    Abstract: A lock-up mechanism for a torque converter comprising a lock-up clutch secured thereto with a friction liner having a friction surface, and a front cover having an engaging surface adapted to be engaged with the friction surface, is wherein either the friction surface or the engaging surface is formed therein with a substantially annular circumferential groove.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: January 27, 2009
    Assignees: NSK-Warner K.K., Aisin AW Co., Ltd., Aisin AW Industries Co., Ltd.
    Inventors: Hiroyuki Sakai, Makoto Ogawa, Takamitsu Kuroyanagi, Osamu Yoshida, Eiji Hayashi, Hideki Ogawa, Tamotsu Fujii, Kenji Maruo, Hideaki Takabayashi
  • Patent number: 7481130
    Abstract: A vehicle steering telescopic shaft having a male shaft and a female shaft so fitted to each other as not to be rotatable but to be slidable. First torque transmitting members are disposed between the male shaft and the female shaft, and roll when the male shaft and the female shaft make relative movements in axial directions. Elastic members are disposed adjacent in a radial direction to the first torque transmitting members and restrict them when rotated and apply a pre-load to the male shaft and the female shaft through the first torque transmitting members when not rotated. Second torque transmitting members are provided between the male shaft and the female shaft, and slide when the male shaft and the female shaft make the relative movements in the axial directions, and transmit a torque when rotated.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: January 27, 2009
    Assignee: NSK Ltd.
    Inventors: Yasuhisa Yamada, Akihiro Shoda, Atsushi Ozawa, Masato Taniguchi
  • Patent number: 7482850
    Abstract: A technology capable of avoiding malfunction of a delay locked loop without generating a constant phase error in a delay locked loop circuit is provided. In a delay locked loop circuit, a control circuit is disposed in the outside of a delay locked loop, and in phase comparison of the delay locked loop, the control circuit outputs a control signal to the delay locked loop so that the relation in the phase comparison between a reference signal and an output signal is shifted by a set cycle.
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: January 27, 2009
    Assignee: Renesas Technology Corp.
    Inventor: Takashi Kawamoto