Abstract: A semiconductor device manufacturing technique which allows reduction of semiconductor chip size. First, a pad and other wires are formed over an insulating film. A surface protective film is formed over the insulating film including the pad and wires, and an opening is made in the surface protective film. The opening lies over the pad and exposes a surface of the pad. A bump electrode is formed over the surface protective film including the opening. Here, the pad is smaller than the bump electrode. Consequently, the wires are arranged just beneath the bump electrode in the same layer as the pad 10. In other words, the wires are arranged in space which becomes available because the pad is small enough.

Abstract: A technique of manufacturing a semiconductor integrated circuit device is provided for reducing the possibility of attachment of foreign matter to a membrane probe when performing probe inspection using the membrane probe formed by the manufacturing technique. A pressing member for pressing a membrane sheet includes a pressing pin receiving portion relatively disposed above for receiving the tip of a pressing pin of the plunger in a recess, and a membrane sheet pressing portion relatively disposed below. The membrane sheet pressing portion in contact with the membrane sheet has the minimum plane size to enable pressing of the entire surface of one chip of interest to be subjected to the probe inspection.

Abstract: Hammer tacker (1) for driving staples (7) into a workpiece, which tacker comprises a body (2) and a magazine (5) which is pivotably connected by connecting element (6) to the body in such a way that at the front edge of the tacker the magazine can move into and out of the body, and which magazine is provided with an endpiece (9) containing an elongate staple rail (10) which in the longitudinal direction of the magazine is slidably fitted to the magazine and is secured to the magazine by securing elements (13,14) and which, when fitted, leaves a gap (23) between its front edge (16) and the tacker's front edge (22), whereby the securing elements (13,14) take the form of a hook (13) integral with the staple rail/magazine (10, 5) and an aperture (14) on the magazine/staple rail (5, 10) and lockingly engage with one another when the staple strip is fitted to the magazine.

Abstract: A prosthetic implant for replacing a facet joint of a spinal motion segment includes a generally conical superior component adapted to be implanted at a surgically prepared site on a lower articular process of a cephalad vertebra of a spinal motion segment, and a cup-shaped inferior component adapted to be implanted at a surgically prepared site on a superior articular process of a caudad vertebra of the spinal motion segment.

Abstract: An IC card capable of reinforcing the prevention of the electrostatic damage without causing a rise in the cost of a semiconductor integrated circuit chip. The semiconductor integrated circuit chip (2) is mounted on a card substrate (1), and plural connection terminals (3) are exposed. The connection terminals are connected to predetermined external terminals (4) of the semiconductor integrated circuit chip, first overvoltage protection elements (7, 8, 9) connected to the external terminals are integrated in the semiconductor integrated circuit chip, and second overvoltage protection elements such as surface-mount type varistors (11) connected to the connection terminals are mounted on the card substrate. The varistors are variable resistor elements having a current tolerating ability greater than that of the first overvoltage protection elements.

Abstract: There is provided a semiconductor memory device which offers enhanced speed in burst mode. The semiconductor memory device has a burst mode for serially reading multiple bits of data in a fixed order in synchronization with both edges of a clock. Multiple memory blocks are geometrically arranged correspondingly to the multiple bits. An address selection circuit selects a memory cell from the memory blocks. Data read from the memory blocks is parallel transmitted to an output circuit. The output circuit first outputs data from a memory block to which data is transmitted fastest among the multiple memory blocks. The output circuit serially outputs data in the fixed order in synchronization with both edges of the clock.

Abstract: There are provided a liquid crystal drive method, a liquid crystal display system and a liquid crystal drive control device, which can realize low power consumption at an alternating current drive of a liquid crystal panel. A common voltage given to a common electrode of a liquid crystal is switched between a positive phase and a negative phase. Display data is converted in such a manner that first display data and second display data selecting two of a plurality of gradation voltages in which magnitudes of potential differences in the pixel electrodes in the positive phase and the negative phase with reference to the common voltage corresponding to display data in a display memory are the same are in the same bit pattern except for one specified bit. For example, bit allocation of positive and negative gradation display data is made in such a manner that low-order bits other than the highest order bit are symmetric up and down in binary with respect to the middle.

Abstract: A semiconductor integrated circuit capable of protection from card hacking, by which erroneous actions are actively induced by irradiation with light and protected secret information is illegitimately acquired, is to be provided. Photodetectors, configured by a standard logic process, hardly distinguishable from other circuits and consumes very little standby power, are mounted on a semiconductor integrated circuit, such as an IC card microcomputer. Each of the photodetectors, for instance, has a configuration in which a first state is held in a static latch by its initializing action and reversal to a second state takes place when semiconductor elements in a state of non-conduction, constituting the static latch of the first state, is irradiated with light. A plurality of photodetectors are arranged in a memory cell array. By incorporating the static latch type photodetector into the memory array, they can be arranged inconspicuously.

Abstract: Continuous-wave radiation is used to detect a target hidden behind a surface. In an embodiment, a transmitter directs a beam of continuous-wave microwave radiation from a transmitting location, and reflected radiation from the target is received at first and second receiving locations closer to the surface than the transmitting location. The transmitting and receiving locations have spatial relationships such that the phase of reflected radiation received at one receiving location is in quadrature with the phase of reflected radiation received at the other receiving location. In an embodiment, direct transmitted radiation is received at the receiving locations in quadrature.

Abstract: There is provided a semiconductor device including an output buffer circuit which reduces an area occupied by a circuit for impedance adjustment and allows high-speed impedance adjustment. In an impedance measuring circuit, the impedance values of reference transistors having the same sizes as those of a plurality of transistors composing the output buffer circuit which are equal in size are measured. An impedance code generating circuit outputs impedance codes corresponding to the impedance values of the reference transistors to an output buffer code generating circuit based on the result of the measurement from the impedance measuring circuit. The output buffer code generating circuit generates output buffer codes for adjusting the impedance of the output buffer circuit by performing an arithmetic operation process to provide an objective impedance based on the impedance codes.

Abstract: A floating water surface cover module, comprising a rim (1), and a shallow dome-shaped cover (2 )extending from the top of the rim (1 )and formed with a vent (3), the rim and cover being formed with shaped air-filled air-tight cavities (5 )spaced around the rim (1 )to provide buoyancy, the rim (1 )and the cover (2 )being configured so that one module will nest within another to form a stable stack.

Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract: Providing a high zoom ratio zoom lens system having a short total lens length and a small diameter of the first group despite of securing excellent optical performance, a half angle of view of 3.5° or less in the telephoto end, an f-number of 6 or less in the telephoto end, and a zoom ratio of about 10 or more. The system is composed of a first group having positive power, a second group having negative power, a third group having positive power , and a fourth group having positive power. The first group is composed of, in order from the object, a negative meniscus lens having a convex surface facing the object, a first positive lens having a convex surface facing the object, and a second positive lens. All groups moves along the optical axis upon zooming from a wide-angle end to a telephoto end. Given conditions are satisfied.

Abstract: A semiconductor integrated circuit device including an I/O circuitry capable of low-voltage high-speed operation at low cost is provided. In the I/O circuitry, when an I/O voltage (for example, 3.3 V) is lowered to a predetermined voltage (for example, 1.8 V), portions causing a speed deterioration are a level conversion unit and a pre-buffer unit for driving a main large-sized buffer. In view of this, a high voltage is applied to a level up converter and a pre-buffer circuit. By doing so, it is possible to achieve an I/O circuitry capable of low-voltage high-speed operation at low cost.

Abstract: A capacitor has an MIM (Metal Insulator Metal) structure comprising a lower electrode formed in the interior of an electrode trench which is formed in an interlayer insulating film, a dielectric film formed over the lower electrode, and an upper electrode formed over the dielectric film. The upper electrode and the dielectric film are each formed with an area larger than the area of the lower electrode so that the whole of the lower electrode is positioned inside the upper electrode and the dielectric film. The reliability and production yield of the capacitor are improved.

Abstract: An automotive construction machine for working ground surfaces, with a machine frame, a drive engine for driving traveling devices and for driving working devices, and a milling drum for milling the ground surfaces, which can be raised, driven by, and can be uncoupled from a drum drive, the milling drum can be moved into a raised position when not in milling mode, and when raised, the rotating direction of the milling drum corresponds to the rotating direction of the traveling devices and remains coupled with the drive engine, and a monitoring device monitors the distance between the milling drum and the ground surface and uncouples the raised milling drum from the drive engine or uncouples the traveling devices from the drive engine or raises the machine frame or generates an alarm signal when the monitoring device detects a deviation that falls below a pre-determined distance, or any of the latter.

Abstract: An assembly for can manufacture includes a toolpack having coolant dies (3,4,5,6) adjacent and either side of ironing dies (1,2) so that coolant may be circulated around cavities in the coolant dies so as to cool the ironing die inserts (12). Generally, the toolpack is used in conjunction with a ram (20), coolant tube assembly (30) and ram guidance assembly (60) which together ensure that the ram is cooled along its entire length, up to and including the punch nose (21).

Abstract: There is a need for high-precision detection timing in a radiological imaging apparatus using a semiconductor detector so as to decrease time variations against a noise and easily correct process variations. A radiation detection circuit includes: a semiconductor detector; charge accumulation means connected to the semiconductor detector; a circuit to discriminate timing of a signal generated from the charge accumulation means based on a specified threshold value; a shaper 1 to limit a band from the charge accumulation means using a first time constant; a shaper 2 to limit a band from the charge accumulation means using a second time constant; a circuit 1 to hold an analog peak value 1 for the shaper 1; and a circuit 2 to hold an analog peak value 2 for the shaper 2. The radiation detection circuit performs a signal process to generate timing correction data based on the analog peak values 1 and 2 and correct timing data from the timing discriminator circuit.

Abstract: Disclosed here is a method for speeding up data writing and reducing power consumption by reducing the variation of the threshold voltage of each of non-volatile memory cells at data writing. When writing data in a memory cell, a voltage of about 8V is applied to the memory gate line, a voltage of about 5V is applied to the source line, a voltage of about 1.5V is applied to the selected gate line respectively. At that time, in the writing circuit, the writing pulse is 0, the writing latch output a High signal, and a NAND-circuit outputs a Low signal. And, a constant current of about 1iA flows in a constant current source transistor and the bit line is discharged by a constant current of about 1iA to flow a current in the memory cell.

Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.