Abstract: An automated software test is provided which includes a functional model of a system to be tested. The automated software test is utilized to operate a system under test in accordance with specified facts, goals and rules. Quasi-random actions are taken within the system in accordance with specified rules and facts until a defined goal has been accomplished. Training the automated software test is accomplished by specifying a particular goal, i.e. identifying a particularly known defect, and thereafter running the test in a quasi-random fashion until the particular goal has been achieved. The number and nature of actions required to achieve that goal are logged and the process is then repeated until the shortest path required to achieve that goal has been determined. The log of actions which eventually reach a particularly defect may also be utilized a probable cause tree structure for future analysis.
Type:
Grant
Filed:
January 29, 1999
Date of Patent:
February 19, 2002
Assignee:
International Business Machines Corporation
Abstract: A capacitor structure includes a bottom plate, a top plate, and a dielectric layer between the bottom and top plates. In addition, at least one insulating sidewall spacer that protects the dielectric layer during processing is formed along the perimeter of the top plate and overlaying a portion of the dielectric layer.
Type:
Grant
Filed:
July 14, 2000
Date of Patent:
February 5, 2002
Assignee:
International Business Machines Corporation
Abstract: A method for identifying predefined error conditions in a build output log file to determine if software build is defective. An output log file is generated within a storage device of a data processing system during a build of a software algorithm on the data processing system. A user creates a list file on the data processing system containing predefined valid error conditions. The output log file is searched to identify user-defined strings from the list file. A comparison of the user-defined strings identified during the search is made with predefined valid error conditions to determine when the user-defined strings identified matches the predefined valid conditions.
Type:
Grant
Filed:
December 18, 1998
Date of Patent:
February 5, 2002
Assignee:
International Business Machines Corporation
Abstract: A method of providing an interconnection between one or more peripheral devices and a system bus of a computer system selectively establishes and removes a connection from a primary peripheral bus to a secondary peripheral buses, and determines a target from among the one or more peripheral devices when a bus bridge is a master of the primary peripheral bus, using an address decoder. Access to and from the primary peripheral bus is controlled using an arbiter to select a master for the primary peripheral bus from among the one or more peripheral devices, to allow both (i) selective establishing and removing of a connection from the primary peripheral bus to one of the secondary peripheral buses in response to the selection of the master, and (ii) isolating of the master prior to establishing the connection to the secondary peripheral bus. Hot Plug Control Logic and Switch Control Logic in conjunction with the arbiter allows Hot Plug support along with the expanded slot environment.
Type:
Grant
Filed:
December 16, 1998
Date of Patent:
January 8, 2002
Assignee:
International Business Machines Corporation
Abstract: A method and system in a distributed shared-memory data processing system are disclosed having a single operating system being executed simultaneously by a plurality of processors included within a plurality of coupled processing nodes for determining a utilization of each memory location included within a shared-memory included within each of the plurality of nodes by each of the plurality of nodes. The operating system processes a designated application utilizing the plurality of nodes. During the processing, for each of the plurality of nodes, a determination is made of a quantity of times each memory location included within a shared-memory included within each of the plurality of nodes is accessed by each of the plurality of nodes.
Type:
Grant
Filed:
October 13, 1998
Date of Patent:
January 1, 2002
Assignee:
International Business Machines Corporation
Inventors:
Mark E. Dean, James Michael Magee, Ronald Lynn Rockhold, Guy G. Sotomayor, Jr., James Van Fleet
Abstract: A method and apparatus for implementing the keys of a visual keyboard so that each key can perform multiple functions without the prior or simultaneous selection of differing visual keys. Each key is divided into quadrants each of which provide a different function which is well recognized and understood by the end user.
Type:
Grant
Filed:
April 24, 1998
Date of Patent:
December 4, 2001
Assignee:
International Business Machines Corporation
Inventors:
Hatim Yousef Amro, Miller Paul Van Eaton
Abstract: A method and system are disclosed in a computer network for efficiently permitting code applets to communicate with other code applets remotely located within the computer network, wherein the computer network includes local network sites linked to remote network sites. Initially a communications link is established at each local network site, wherein the communications link permits code applets to communicate with one another. The communications link is composed of an InfoBus for inter-applet communication. The communications links are then interconnected, such that during a subsequent processing of the code applet at a local network site, the code applet may communicate with a code applet maintained at a remote network site, thereby forming a distributed communications link throughout the computer network.
Type:
Grant
Filed:
June 4, 1998
Date of Patent:
November 6, 2001
Assignee:
International Business Machines Corporation
Inventors:
Michael Haden Conner, Bryce Allen Curtis, Jimmy Ming-Der Hsu
Abstract: The present invention is a method and apparatus for preventing the occurrence of deadlocks from the execution of multiply-initiated multiply-sourced variable delay system bus operations. In general, each snooper excepts a given operation at the same time according to an agreed upon condition. In other words, the snooper in a given cache can accept an operation and begin working on it even while retrying the operation. Furthermore, none of the active snoopers release an operation until all the active snoopers are done with the operation. In other words, execution of a given operation is started by the snoopers at the same time and finished by each of the snoopers at the same time. This prevents the ping-pong deadlock by keeping any one cache from finishing the operation before any of the others.
Type:
Grant
Filed:
January 7, 1998
Date of Patent:
November 6, 2001
Assignee:
International Business Machines Corporation
Inventors:
Ravi Kumar Arimilli, John Michael Kaiser, Derek Edward Williams
Abstract: An integrated circuit chip having at least one source pin and a plurality of sink pins. A wire segment connects the source pin to at least one of the sink pins and includes at least two segments where one of the segments is larger than the other where electromigration is likely to occur.
Type:
Grant
Filed:
October 6, 1997
Date of Patent:
October 23, 2001
Assignee:
International Business Machines Corporation
Inventors:
David James Hathaway, Douglas Wayne Kemerer, William John Livingstone, Daniel Joseph Mainiero, Joseph Leonard Metz, Jeannie Therese Harrigan Panner
Abstract: A method of making finger capacitors in an integrated circuit comprises forming a plurality of conductive strips in a substrate having a first dielectric constant, removing a portion of the substrate material between the conductive strips to define a space and then filling the space with a material having a second dielectric constant which is greater than the first dielectric constant. By selecting the proportion of the high and low dielectric constant materials, the capacitance of the finger capacitors can be selected to have any value from a minimum, in which very little of the original, first dielectric constant material is removed and replaced by the second dielectric constant material, to a maximum, in which all of the first dielectric constant material between the conductive strips is removed and replaced with the second dielectric constant material.
Type:
Grant
Filed:
February 25, 2000
Date of Patent:
October 16, 2001
Assignee:
International Business Machines Corporation
Inventors:
Wilbur David Pricer, Anthony Kendall Stamper
Abstract: An apparatus comprising a clock for providing a clock signal, means for providing a delayed version of the clock signal, two transparent latches having clock inputs controlled by opposite polarities of the delayed clock signal, a multiplexer having (i) inputs fed by outputs of the latches, and (ii) a select input fed by the clock signal, and means for providing a select signal for selecting the latch whose clock is inactive. Preferably, each of the latches has a scan input gate and a scan output gate, and the scan output of the first latch is applied to the scan input of the second latch to form a scannable latch pair. Also, preferably, the apparatus further comprises a data port for applying data to the first and second latches, and an exclusive OR gate at the data port, whereby the apparatus produces a gated clock signal. Also disclosed is a method of operating this apparatus.
Type:
Grant
Filed:
July 14, 2000
Date of Patent:
October 9, 2001
Assignee:
International Business Machines Corporation
Inventors:
Roger Paul Gregor, David James Hathaway, David E. Lackey, Steven Frederick Oakland
Abstract: An analog phase lock loop circuit having derivative control. The phase lock loop includes a phase detection circuit, main charge pump, a low pass filter, and a voltage controlled oscillator. The derivative control receives error signals from the phase detection circuit and outputs a derivative voltage to the voltage controlled oscillator to be included with the proportional and integral control of the low pass filter.
Type:
Grant
Filed:
December 22, 1999
Date of Patent:
October 9, 2001
Assignee:
International Business Machines Corporation
Abstract: A computer controlled user interactive display system with an implementation for displaying within a defined display space a plurality of objects having dimensions proportionally representative of physical parameters of elements respectively represented by said objects, but this system is provided with a further implementation for nonlinearly modulating at least one dimension of at least one of said displayed objects so as to conform the object dimension to the dimensional limitations of the defined display space without affecting the dimensional status of the object with said modulated dimension relative to the other objects.
Type:
Grant
Filed:
December 3, 1998
Date of Patent:
September 25, 2001
Assignee:
International Business Machines
Inventors:
Scott Anthony Morgan, John Martin Mullaly, Craig Ardner Swearingen, Alan Richard Tannenbaum
Abstract: A method and system for supporting multiple language sets in a data processing system, where each character of the language set is a pen based input character. A language set is designated among multiple language sets with which a pen-based character is associated within a data processing system in response to a user input. A pen based input character is penned into said data processing system. The pen based input character is identified within only said designated language set. The pen based input character is translated into a graphically displayed iconic representation of the pen based input character represented in a designated language set.
Type:
Grant
Filed:
January 29, 1999
Date of Patent:
September 11, 2001
Assignee:
International Business Machines Corporation
Abstract: A multi-port memory is provided that includes means for receiving synchronous memory requests, means for receiving asynchronous memory requests, and means for processing the received synchronous and asynchronous memory requests simultaneously. Systems and methods that employ the multi-port memory are also provided.
Type:
Grant
Filed:
March 13, 2000
Date of Patent:
August 28, 2001
Assignee:
International Business Machines Corporation
Inventors:
Kevin A. Batson, Garrett S. Koch, Sebastian T. Ventrone
Abstract: A method and apparatus are disclosed for moving one or more objects from and returning them to a user visible portion of a work plane, which includes but is larger than the visible portion, by interpreting a single user input action and in response thereto changing the position of the objects. Objects remain in the work plane in either the user visible or non-user visible portions. In one embodiment, a smaller than actual representation of the entire work plane is displayed with that portion of the work plane currently in focus by the user.
Type:
Grant
Filed:
June 29, 1998
Date of Patent:
August 28, 2001
Assignee:
International Business Machines Corporation
Inventors:
Richard Edmond Berry, Scott Harlan Isensee
Abstract: An apparatus and method for determining rates chargeable to advertisers based upon the actual viewing time for which their advertisements were seen by a given user. This is accomplished through the use of a advertisement control plug in combination with a file used during times in which the user is not connected to the Internet or other applicable network.
Type:
Grant
Filed:
May 15, 1998
Date of Patent:
August 21, 2001
Assignee:
International Business Machines Corporation
Abstract: An apparatus and method are presented for determining actual viewing times electronic advertisements were seen by a user of a Web browser or the like while viewing documents containing advertisements. A timing manager JAVA application in combination with JAVA scripts or other dynamic HTML and cookies are used in this determination.
Type:
Grant
Filed:
May 15, 1998
Date of Patent:
August 14, 2001
Assignee:
International Business Machines Corporation
Abstract: A method and system in a distributed shared-memory data processing system are disclosed for determining a utilization of each of a plurality of coupled processing nodes by one of a plurality of executed threads. The system includes a single operating system being executing simultaneously by a plurality of processors included within each of the processing nodes. The operating system processes one of the plurality of threads utilizing one of the plurality of nodes. During the processing, for each of the nodes, a quantity of times the one of the plurality of threads accesses a shared-memory included with each of the plurality of nodes is determined.
Type:
Grant
Filed:
September 4, 1998
Date of Patent:
July 24, 2001
Assignee:
International Business Machines Corporation
Inventors:
Philippe L. de Backer, Mark E. Dean, Ronald Lynn Rockhold
Abstract: A network for small businesses is provided which is easy to install, configure and operate and still provides users of the client computers in the network with the same degree of flexibility in configuring graphical user interfaces to operating systems and application programs as do present stand alone personal computers. All of the software to be used by the client computers: operating systems and application programs is stored on the network server computer. The graphical user interfaces to the operating systems and application programs are customized in the conventional manner by the users of the client computers, usually at the client computer through a conventional interactive display. In the customization of a program, the data representative of an initial user interface is stored.
Type:
Grant
Filed:
July 17, 1998
Date of Patent:
July 17, 2001
Assignee:
International Business Machines Corporation