Patents Represented by Attorney, Agent or Law Firm Sawyer & Associates
  • Patent number: 5983368
    Abstract: System and method aspects for testing a hierarchical storage management (HSM) system extension of a data processing system are provided. In a system aspect, the system for testing includes a script file mechanism for providing serialized system calls from processes of at least a pseudo device driver of the data processing system, and a compiled test engine means for performing the serialized system calls of the script file. The system calls from processes further include parallel processes of a file system and a pseudo device driver. In a method aspect, the method includes providing a test engine compiled for at least one operating system platform of the data processing system, and performing a test script with the test engine for serializing system calls from parallel processes of the file system and pseudo device driver.
    Type: Grant
    Filed: August 26, 1997
    Date of Patent: November 9, 1999
    Assignee: International Business Machines Corporation
    Inventor: Douglas Stephen Noddings
  • Patent number: 5981364
    Abstract: Disclosed herein is a method of forming a silicon gate stack onto a silicon substrate for a silicon device. The method of forming the silicon gate stack comprises the steps of growing an oxide layer onto the silicon substrate, depositing a thin layer of silicon to form a thin layer of silicon over the oxide layer, depositing a thick layer of silicon over the thin layer of silicon, and introducing impurities into only the thick layer of silicon to form a silicon gate whereby the silicon gate includes the thin layer of silicon and the thick layer of silicon having the impurities. The impurities being introduced with a concentration, the impurities concentration and the thick layer thickness impeding an encroachment by the oxide layer into the silicon gate during application of a protective screen oxide layer around the silicon gate stack.
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: November 9, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Mark T. Ramsbey, Hsingya Arthur Wang, Yu Sun
  • Patent number: 5981994
    Abstract: A method for maintaining a high field threshold voltage in a plurality of transistors of reduced size in a periphery region of a Flash EPROM semiconductor circuit includes forming a first polysilicon layer as a floating poly in a predetermined number of transistors of the plurality of transistors in the periphery region, and forming a second polysilicon layer as a common gate line in the plurality of transistors, wherein the predetermined number of transistors prevent breakdown of the plurality of transistors below a predetermined field threshold voltage. In one aspect, the field oxide layer has a thickness of about 2500 angstroms.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: November 9, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David K. Y. Liu, Jian Chen, Ming Sang Kwan
  • Patent number: 5983279
    Abstract: The present invention allocates a buffer within a buffer pool to each connection to an application or to each application. By managing the user of the buffers in this manner, the present invention avoids the conventional problems of the possibility of a dominant application monopolizing virtually all of the available buffer space and forcing the other applications to wait for space to become available. Additionally, because each application has its own buffer space allocated to it, it minimizes the risk of the problems of one application contaminating other applications. A method according to the present invention for buffer management for transferring data in a processing system comprises the steps of opening a virtual circuit, allocating a buffer for the virtual circuit, utilizing the buffer, and returning control of the buffer to an owner after utilization of the buffer.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: November 9, 1999
    Assignee: Apple Computer, Inc.
    Inventors: Mengjou Lin, Alagu Periyannan
  • Patent number: 5978272
    Abstract: A nonvolatile memory structure is disclosed. The nonvolatile memory structure includes a substrate, a heavily doped drain junction disposed in the substrate, and a lightly doped source junction disposed in the substrate. The source junction is diffused more deeply than the drain junction. The nonvolatile memory structure also includes a gate structure. The gate structure has a floating gate capacitively coupled to the substrate and a control gate capacitively coupled to the floating gate. The heavily doped drain junction has a central portion proximate to the gate structure. The lightly doped source junction also has a central portion proximate to the gate structure. At least the central portion of the lightly doped source junction is more lightly doped than the central portion of the heavily doped drain junction.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: November 2, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Hao Fang, Sameer Haddad, Nader Radjy
  • Patent number: 5973697
    Abstract: A system and method for utilizing face viewpoints of objects in a 3D environment includes three aspects. In a first aspect, the system and method is directed to defining a plurality of optimized viewpoints of an object referred to hereinafter as face viewpoints. In a second aspect a method and system is disclosed that provides for a preferred face viewpoint of the plurality of face viewpoints. Finally, the third aspect provides for a system and method for determining a navigation path to the preferred face viewpoint.
    Type: Grant
    Filed: January 27, 1997
    Date of Patent: October 26, 1999
    Assignee: International Business Machines Corporation
    Inventors: Richard Edmond Berry, Scott Harlan Isensee, David John Roberts, Didier Daniel Bardon, John Martin Mullaly
  • Patent number: 5973734
    Abstract: A method and system for correcting the aspect ratio of an image captured by a digital camera is disclosed. In one aspect, the method and system include determining if the image requires cropping, decompressing the image, and cropping the image if the image required cropping. The image is then provided to a display. In another aspect, the method and system include cropping an image to a predetermined shape and providing the data to a display buffer.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: October 26, 1999
    Assignee: FlashPoint Technology, Inc.
    Inventor: Eric C. Anderson
  • Patent number: 5970461
    Abstract: A method and system for providing an inverse transform for an audio compression decoding algorithm in software precalculates a plurality of identified values; each of which is computationally intensive. The method and system then performs a pre-inverse transform complex multiply utilizing a first portion of the identified values and an array of input coefficients to provide a plurality of intermediate values. Thereafter, an inverse transform complex multiply and a post inverse transform multiply are combined to provide a combined complex multiply operation. The combined complex multiply operation uses a second portion of the identified values and the intermediate values provides the inverse transform. Accordingly, through the use of the present invention, the number of instructions for implementing the inverse transform can be substantially minimized.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: October 19, 1999
    Assignee: Apple Computer, Inc.
    Inventor: Geoffrey W. Chatterton
  • Patent number: 5969724
    Abstract: A method and system for navigating through an opaque structure via a user on a display in a computer system. The method and system comprises the steps of determining if the opaque structure is within a predetermined distance of the user and changing the opaque structure to a translucent structure when the user is within the predetermined distance of the opaque structure. Accordingly through the use of the method and system, a user can navigate more easily and efficiently through a display, particularly in three-dimensional environments associated with such a display without becoming disoriented.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: October 19, 1999
    Assignee: International Business Machines Corporation
    Inventors: Richard Edmond Berry, Scott Harlan Isensee, David John Roberts
  • Patent number: 5965934
    Abstract: The interconnects in a semiconductor device contacting metal lines comprise a low resistance metal, such as copper, gold, silver, or platinum, and are separated by a material having a low dielectric constant, such as benzocyclobutene or a derivative thereof A tri-layer resist structure is used, together with a lift-off process, to form the interconnects. The low dielectric constant material provides a diffusion barrier to the diffusion of the low resistance metal. The tri-layer resist comprises a first layer of a dissolvable polymer, a second layer of a hard mask material, and a third layer of a resist material. The resulting structure provides an integrated circuit with increased speed and ease of fabrication.
    Type: Grant
    Filed: July 22, 1996
    Date of Patent: October 12, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Robin W. Cheung, Mark S. Chang
  • Patent number: 5966545
    Abstract: A system and method for allowing a network application to interface with both a first transaction protocol and a second transaction protocol. The system and method provides an object-oriented base class for use by the network application. A first subclass is invoked from the base class when the network application interfaces the first protocol, and a second subclass is invoked from the base class when the network application interfaces the second protocol. The network application is made compatible with the first protocol by invoking the first subclass, and made compatible with the second protocol by invoking the second subclass.
    Type: Grant
    Filed: January 25, 1996
    Date of Patent: October 12, 1999
    Assignee: Apple Computer, Inc.
    Inventors: Mohammad Hanif, Kazuhisa Yanagihara
  • Patent number: 5961623
    Abstract: A system and method for avoiding starvation and deadlocks in a split-response-bus multiprocessor computer system. The multiprocessor computer system includes a first node and a second node coupled to the a split-response bus, wherein the first and second nodes communicate by passing request packets over the split-response bus. The method and system includes providing precedence information in the request packets, and then using the precedence information when receiving the request packets to determine which request packets to process and which request packets to reject when a conflict occurs.
    Type: Grant
    Filed: August 29, 1996
    Date of Patent: October 5, 1999
    Assignee: Apple Computer, Inc.
    Inventors: David V. James, Donald N. North, Glen D. Stone
  • Patent number: 5963720
    Abstract: A system and method for expediting data processing in a computer system including a network controller and a driver is disclosed. The method and system first provide a hardware structure. The hardware structure has a first plurality of fields and corresponds to a second structure. The second structure has a second plurality of fields. The first plurality of fields of the hardware structure has at least one field more than the second plurality of fields. The method and system then allow the driver to utilize the at least one extra field for increasing efficiency of data processing.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: October 5, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Leonid Grossman
  • Patent number: 5963686
    Abstract: A system and method providing a wavelength locker is disclosed. The method and system provide a high uniformity, low polarization sensitivity optical coupler. The optical coupler further comprises a first outer fiber and a second outer fiber. The first outer fiber and the second outer fiber each have a first portion. The method and system further provide a filter coupled to the first portion of the first outer fiber. The method and system further provide a first mechanism coupled to the filter for detecting intensity and providing a first resultant. The method and system further provide a second mechanism coupled to the second portion of the second outer fiber. The second mechanism detects intensity and provides a second resultant.
    Type: Grant
    Filed: June 24, 1997
    Date of Patent: October 5, 1999
    Assignee: Oplink Communications, Inc.
    Inventors: Yu Zheng, David Li, Xiaobing Luo
  • Patent number: 5963824
    Abstract: The present invention provides a method of making a semiconductor device with a channel length of approximately 0.05 microns. A method of producing a semiconductor device according to the present invention includes a control gate, a first floating gate located in proximity to the control gate, and a second floating gate located in proximity to the control gate. The present invention allows the threshold voltage of the device to be adjusted to various levels. Additionally, the device according to the present invention can be used as a very effective nonvolatile memory device.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: October 5, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Zoran Krivokapic
  • Patent number: 5963210
    Abstract: A method and system for providing a graphics processor is disclosed. The method and system include providing a transformation processor, providing a rasterizer coupled to the transformation processor, and providing an interpolator coupled to the rasterizer. The transformation processor is for producing a set of transformed data according to a set of instructions from a set of raw data. The set of raw data describes at least one three-dimensional object within a bounded space extending from a display screen. The rasterizer is for identifying portions of the transformed data mapping a pre-defined area of the display screen in parallel and for sequentially rendering the identified portions of the transformed data in a pre-determined refresh order. The refresh order is the order that screen data is provided to the display screen to generate a screen image. The rasterizer further includes processor array. The processor array includes a plurality of primitive processors.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: October 5, 1999
    Assignee: Stellar Semiconductor, Inc.
    Inventors: Michael C. Lewis, Stephen L. Morein
  • Patent number: 5960175
    Abstract: A computer network includes a plurality of servers, each of the plurality of servers operating under one of a plurality of operating systems, and a client workstation including a single boot ROM containing instructions for identifying each of the plurality of servers by address and by type of operating system, and selecting one of the identified servers by address and type for booting on the network.
    Type: Grant
    Filed: April 1, 1996
    Date of Patent: September 28, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Leonid Grossman, Sherman Lee
  • Patent number: 5960108
    Abstract: The present invention provides a method and system for providing a virtual reality environment utilizing images from a lens on a display of a data processing system is disclosed. The method and system comprises providing a plurality of images, each of the plurality of images including a plurality of parameters and optimizing the plurality of parameters for each of the plurality of images in accordance with a radial distortion model. The method and system also including generating the virtual reality environment of the plurality of images based upon the optimization of the plurality of parameters.
    Type: Grant
    Filed: June 12, 1997
    Date of Patent: September 28, 1999
    Assignee: Apple Computer, Inc.
    Inventor: Yalin Xiong
  • Patent number: 5956701
    Abstract: The present invention provides a method and system for processing an image, the method comprising the steps of providing an image and specifying a portion of the image. The present invention also includes utilizing an artificial neural net to associate the portion of the image with an application, wherein a plurality of positions are selected within the specified portion of the image.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: September 21, 1999
    Assignee: International Business Machines Corporation
    Inventor: Paul Robert Habermehl
  • Patent number: 5956610
    Abstract: The present invention provides a method and system for providing electrical insulation for local interconnect in a logic circuit. A system and method according to the present invention for providing electrical installation for local interconnects during manufacturing of a logic circuit comprising the steps of providing a first layer of material over a semiconductor wafer and providing a second layer of material over the first layer. Additionally, a photoresist material is provided over a portion of the logic circuit to be electrically insulated. Portions of the first and second layers which are unprotected by the photoresist material are then etched. At least a third layer is then provided over the first and second layers, and the third layer is etched such that the first layer as an electrical insulation over the portion of the logic circuit.
    Type: Grant
    Filed: May 22, 1997
    Date of Patent: September 21, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: William George En, Sunil Mehta, Fei Wang, Stewart Gordon Logie