Patents Represented by Attorney, Agent or Law Firm Sawyer & Associates
  • Patent number: 5893930
    Abstract: A method for performing predictive translation of a data address in a computer processing system includes organizing a translation lookaside buffer in a set associative manner having each set associated with multiple entries, wherein the multiple entries store consecutively ordered selections. Further, the method includes selecting a set of entries in the translation lookaside buffer in response to a base operand for the predictive translation. The method also includes comparing each entry in the selected set with an input address for determining whether or not the predictive translation failed. The method further includes the step of adding the base operand with an offset operand to produce the effective address. A system in accordance with the present invention includes effective address generation logic, including a base operand register to hold a base operand, and a translation lookaside buffer, translation lookaside buffer.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: April 13, 1999
    Assignee: International Business Machines Corporation
    Inventor: Seungyoon Peter Song
  • Patent number: 5894419
    Abstract: A system and method according to the present invention for mapping a clocking scheme to determine robust clocking schemes in a logic circuit is disclosed. The circuit can be represented by a clocking graph, the clocking graph having at least one loop including a plurality of vertices, wherein two vertices represent each relevant signal, one for a rising edge and one for a falling edge. Additionally, a plurality of constraints of the logic circuit propagate through circuit delays.
    Type: Grant
    Filed: April 21, 1997
    Date of Patent: April 13, 1999
    Assignee: International Business Machines Corporation
    Inventors: Tiberiu Carol Galambos, Robert Paul Masleid, Israel Abraham Wagner
  • Patent number: 5892535
    Abstract: A flexible and configurable system for distributing media (or programming) to one or more distribution networks. The system includes a media server, at least one server interface unit, a first communications path coupling the media server and a server interface unit, distribution network interface unit(s), and a second communications path coupling a server interface unit and the distribution network interface unit(s). The media server stores files of encoded (e.g., compressed) media data and files of scheduling information. Each of the distribution network interface unit(s) conditions received media data for transmission over the distribution network(s) which may be analog and/or digital distribution networks.
    Type: Grant
    Filed: December 13, 1996
    Date of Patent: April 6, 1999
    Assignee: Digital Video Systems, Inc.
    Inventors: Philip M. Allen, Joseph W. Davis, Michael J. Maslaney, Khanh Mai, Howard L. Paulk, Ken Thompson
  • Patent number: 5889962
    Abstract: A system and method for increasing the number of entities that can be serviced by a file server. The file server includes a plurality of server session sockets (SSSs), and means for assigning an entity identification number and one of the plurality of SSSs to a request from one of the number of entities, wherein each SSS can support a plurality of entities.
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: March 30, 1999
    Assignee: Apple Computer, Inc.
    Inventors: Mohammad Hanif, Kevin Stinson, Kazuhisa Yanagihara
  • Patent number: 5890017
    Abstract: Method and system aspects output a single audio stream from a plurality of audio streams provided by at least one application program running on a computer system with an audio device. Production of the single audio stream includes forming a server process in the computer system, emulating the audio device with the server process to allow any combination of audio stream formats, and manipulating the plurality of audio streams with the server process to form the single audio stream for maintaining transparency to the at least one application program.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: March 30, 1999
    Assignee: International Business Machines Corporation
    Inventors: Michael C. Tulkoff, Ravinder P. Wadehra
  • Patent number: 5888867
    Abstract: Aspects for forming a Flash EPROM cell with an adjustable threshold voltage are described. In a method aspect, the method includes forming a substrate structure to establish a foundation for cell formation, and forming a gate structure with a floating gate layer comprising polysilicon-germanium (poly-SiGe) of a non-uniform Ge concentration on the substrate structure. The method further includes forming source and drain regions within the substrate structure, the drain region having a different threshold voltage than the source region. In a further aspect, a Flash EPROM cell with an adjustable threshold voltage includes a substrate structure as a foundation for the cell. The cell further includes a gate structure on the substrate structure, the gate structure comprising a floating gate layer of polysilicon-germanium (poly-SiGe) of non-uniform Ge concentration.
    Type: Grant
    Filed: February 13, 1998
    Date of Patent: March 30, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Janet Wang, Scott D. Luning, Vei-Han Chan, Nicholas H. Tripsas
  • Patent number: 5881245
    Abstract: A method and device for communicating encoded data (such as MPEG encoded data for example) from a server to a decoder via a buffer. The rate at which the server provides the encoded data are adjusted based on a state of the buffer such that the buffer does not overflow or run dry, even when the communication of the data is subject to drift. Specifically, when the buffer is below a predetermined level, the rate at which the server provides the encoded data is increased. On the other hand, when the buffer is above a predetermined level, the rate at which the server provides the encoded data is decreased.
    Type: Grant
    Filed: September 10, 1996
    Date of Patent: March 9, 1999
    Assignee: Digital Video Systems, Inc.
    Inventor: Kenneth M. Thompson
  • Patent number: 5880983
    Abstract: A method and system for an infinite precision split multiply and add operation which has increased speed. The method and system for providing a split multiply and add of a plurality of operands include a multiplier and an adder means. The multiplier multiplies a first portion of the plurality of operands, thereby providing a product. The adder, which combines the remaining operands and the product, comprise at least one pair of data paths. Each pair of data paths comprises a first data path and a second data path. The first data path comprises a first aligner, a first adder, and a first normalizer capable of shifting a mantissa by a substantially fewer number digits than the aligner. The second data path comprises a second aligner, a second adder, and a second normalizer capable of shifting a mantissa by a substantially larger number of digits than the aligner. Accordingly, the present invention includes split multiply and add data paths which, individually, are faster than a fused multiply and add.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: March 9, 1999
    Assignee: International Business Machines Corporation
    Inventors: Timothy Alan Elliott, Robert Thaddeus Golla, Christopher Hans Olson, Terence Matthew Potter
  • Patent number: 5881222
    Abstract: A method and apparatus is provided that measures end-user perceived performance in a computer having a windowed graphic display. The method and apparatus provides for a performance survey application which allows for detecting whether performance of the computer system has degraded. An indication is provided on the display. Also provided on the display is a button that when clicked by the user generates a record indicating that performance is poor. The status of the system is updated in response to user clicks. This in turn causes appropriate updates in the display. Finally, the record associated with the user's click is written to the appropriate memory location. In so doing, a system is provided that allows for continuous indication of the performance of the computer system.
    Type: Grant
    Filed: January 23, 1995
    Date of Patent: March 9, 1999
    Assignee: International Business Machines Corporation
    Inventors: Robert Francis Berry, Joseph Hellerstein
  • Patent number: 5880372
    Abstract: The present invention provides a pressure sensor device which is media compatible and very inexpensive.A medium compatible device according to the present invention for sensing pressure comprising means for sensing pressure; means for providing an output in response to the pressure sensing means; and means for packaging the pressure sensing means and the output means, the packaging means including a non-adhesive means for combining the pressure sensing means and the output means.
    Type: Grant
    Filed: January 10, 1997
    Date of Patent: March 9, 1999
    Assignee: Integrated Sensor Solutions
    Inventor: Steven Saeed Nasiri
  • Patent number: 5877500
    Abstract: The present invention comprises a system and method for detecting multiple wavelength bands of infrared radiation. The present invention incorporates an optical concentrator or "optical funnel" to increase the energy density on the detection elements and discrete filters mounted in the funnels and a mounting structure for individual detector elements. An apparatus in accordance with the present invention is an advance over conventional infrared detector assemblies in several areas. The apparatus in accordance with the present invention provides a unified means for mounting detectors, optical concentrators and infrared filters. It also provides an efficient means for electrical connection to the detector elements. The present invention provides a mounting structure for the detectors bonding them directly to the body of the optical funnel and passing light into them from the "backside" of the detector elements.
    Type: Grant
    Filed: March 13, 1997
    Date of Patent: March 2, 1999
    Assignee: Optiscan Biomedical Corporation
    Inventors: James R. Braig, Arthur M. Shulenberger
  • Patent number: 5877776
    Abstract: A method and system for allowing scalers to support multiple font formats in a graphics system that processes data having a specified font format. The method and system includes actively registering each of the scalers with a font scaler manager by specifying a primary font format and one or more secondary font formats that are supported by each of the scalers. The font scaler manager then selects one of the scalers to process the data by finding a match between the specified font format and the primary font formats registered by the scalers. If a match is not found, then one of the scalers is selected by finding a match between the specified font format and the secondary font formats registered by the scalers.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: March 2, 1999
    Assignee: Apple Computer, Inc.
    Inventors: Alexander B. Beaman, Michael R. Reed
  • Patent number: 5877972
    Abstract: A high-speed incrementer array for incrementing a data input value by a binary one, wherein the data input value comprises a plurality of input bit values. The incrementer array includes a plurality of word lines, bit-line pairs, and sense amplifiers. The input bit values are received as a plurality of complement input signals and a plurality of true input signals. The complement input signals are transmitted on the plurality of word lines that form the rows of the array. Each one of plurality of bit-line pairs is located in a respective column of the array and is coupled to particular ones of the word lines in the rows of the array. Each one of the plurality of sense amplifiers is coupled to a respective bit-line pair for sensing a voltage difference between the bit-line pair, such that the bit-line pair and the sense amplifier perform a logical NOR of the complement input signals to produce a NOR output.
    Type: Grant
    Filed: January 15, 1997
    Date of Patent: March 2, 1999
    Assignee: International Business Machines Corporation
    Inventors: Naoaki Aoki, Osamu Takahashi, Joel Abraham Silberman, Sang Hoo Dhong
  • Patent number: 5878242
    Abstract: A system and method for forwarding a first instruction into a second instruction in a processor is disclosed. The processor comprises an execution unit and providing a plurality of instructions. The first instruction depends upon execution of the second instruction but does not otherwise require execution by the execution unit. The method first searches for the second instruction. The method then forwards the first instruction via the second instruction by appending a tag to the second instruction, the tag identifying the first instruction.One aspect of the method and system forwards a store instruction into a floating point instruction in a processor. The store instruction has a source address and the floating point instruction has a target address. The processor provides a plurality of instructions. The method searches for the floating point instruction that is provided before the store instruction. The method then determines if the source address is equal to the target address.
    Type: Grant
    Filed: April 21, 1997
    Date of Patent: March 2, 1999
    Assignee: International Business Machines Corporation
    Inventors: Christopher Hans Olson, Jeffrey Scott Brooks
  • Patent number: 5873111
    Abstract: According to the system and method disclosed herein, the present invention provides a system and method for organizing information to perform accurate and efficient collation for information such as languages of various nationalities and regions. This invention provides a number of improvements over the existing string comparison routines: portability, improved performance, ability to handle Unicode, and improved linguistic capability.
    Type: Grant
    Filed: May 10, 1996
    Date of Patent: February 16, 1999
    Assignee: Apple Computer, Inc.
    Inventor: Peter Edberg
  • Patent number: 5873121
    Abstract: The present invention provides a method and apparatus for storing additional information, such as HOLE information, within a buffer while minimizing the overhead.A method according to the present invention for efficiently storing additional information in a memory, the memory including at least one address, the memory for storing at least a portion of a packet to be transferred by a network system, the method comprising the steps of determining whether the at least a portion of a packet ends at a boundary of the at least one address; encoding a portion of the packet to indicate that the packet ends at the address boundary if the packet ends at the address boundary; and encoding a portion of the at least one address to indicate that the packet does not end at the address boundary, if the packet does not end at the address boundary.
    Type: Grant
    Filed: November 19, 1996
    Date of Patent: February 16, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Shashank Merchant, Alok Singh, Gopal Krishna
  • Patent number: 5870554
    Abstract: A method for choosing a particular server on a network and performing a remote boot by a client, the network including a plurality of servers operating in accordance with a plurality of network operating systems, includes identifying each of the plurality of servers by address and by type of operating system, and selecting one of the identified servers by address and type for booting on the network. Identifying further includes sending a FIND frame from the client to the network, and receiving a FOUND frame from each of the plurality of servers. A remote program load protocol followed by the server according to the FOUND frame is determined.
    Type: Grant
    Filed: April 1, 1996
    Date of Patent: February 9, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Leonid Grossman, Sherman Lee
  • Patent number: 5867010
    Abstract: Circuit and method aspects for translating acceptable voltage levels from an external device to acceptable voltage levels of an internal device are provided. These aspects include coupling an input receiver between the external device and the internal device, the input receiver including a clamp device, and coupling a bias generator to the input receiver at the clamp device, wherein the bias generator ensures proper translation of a high level input signal from the external device by the input receiver. The bias generator further ensures that a predetermined maximum device voltage of the clamp device is not exceeded.
    Type: Grant
    Filed: June 6, 1997
    Date of Patent: February 2, 1999
    Assignee: International Business Machines Corporation
    Inventors: Fahd Hinedi, Moises Cases, Satyajit Dutta, Robert Heath Dennard
  • Patent number: 5864620
    Abstract: A system and method and system for controlling distribution of software to an user in a multitiered distribution chain. The system includes at least one entity that distributes the software in a locked software container, and includes means for receiving a request from the user to use the software. The method and system further includes a license clearing house for controlling usage rights of the software. The license clearing house includes means for receiving the request from the at least one entity, means for validating the request, means for generating a unique authentication certificate if the request was validated, and means for sending a reply to the user. The reply includes the authentication certificate and a master key, where the master key unlocks the software container and enables the user to use the software, and the authentication certificate identifies the user as an authorized user of the software.
    Type: Grant
    Filed: April 24, 1996
    Date of Patent: January 26, 1999
    Assignee: Cybersource Corporation
    Inventor: John Philip Pettitt
  • Patent number: 5861338
    Abstract: The present invention is a semiconductor device and a method of providing such a semiconductor device which allows a high junction breakdown voltage and a high field turn on voltage, while allowing the field oxide thickness to be limited and being independent of a misalignment of the mask. A method in accordance with the present invention for providing a semiconductor device including a field oxide, the field oxide including a field oxide boundary wherein the field oxide is located within the boundary, the method comprising the step of implanting a first implant area into the substrate, including areas proximate indistance to a junction area, the first area being implanted with a first implant concentration and implanting a second implant area distal to the junction area, the second implant area being implanted with a second implant concentration, wherein the depth of the implant is controlled by the energy level, wherein the implant of the second implant area is independent of a misalignment of a mask.
    Type: Grant
    Filed: January 21, 1997
    Date of Patent: January 19, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Chung-You Hu