Abstract: A split-gate MOS transistor includes two separate but partially overlapping gates to reduce the electric field near the drain-channel interface region and, thereby, has an increased gated-diode breakdown voltage.

Abstract: A probability analysis technique is performed on magnetically obtained current data to detect short circuit defects in a plate structure (10) in which a group of first electrical conductors (32) are nominally electrically insulated from and cross a group of second electrical conductors (48). In particular, a magnetic current-sensing operation is performed on at least part of the conductors to produce current data indicative of how much, if any, current flows through each of at least part of the conductors. A short circuit defect probability analysis is then applied to the current data in order to select a location where one of the first conductors crosses one of the second conductors as being most probable of having a short circuit defect.

Abstract: Molecular Complexes, comprising of S-(+)-adenosylmethionine and 3'-azido-2',3'-dideoxy nucleosides are prepared, and shown to have synergistic inhibitory effects on the replication of human-immunodeficiency virus 1 & 2 in vitro and in vivo, particularly on the reverse transcriptase, and having a high therapeutic index.

Abstract: A molded plastic package incorporates a lead frame which includes a plurality of leads radially aligned around a central opening. A die is mounted in the central opening and is electrically connected to the leads by wire bonding. A molded plastic casing is formed over the die, wiring and lead frame to encapsulate the package. The lower surfaces of the die and lead frame are exposed through the package. A method for making the molded plastic package includes mounting the die and lead frame onto an adhesive tape, electrically connecting the die to the leads by wire bonding, forming a molded plastic casing over the die, wire bonding and lead frame, and then removing the adhesive tape to expose the lower surfaces of the die and the lead frame.

Abstract: A structure and method for holding a susceptor in a single-wafer RF heated CVD reactor allows the center portion of the susceptor to be heated and prevents susceptor and reactor damage due to overdriving and the susceptor from losing contact with a rotatable rod during thermal expansion. A plug, located on the bottom surface of the susceptor, heated by RF energy subsequently heats the center portion of the susceptor, thereby providing constant temperature gradients across the susceptor. The plug is connected to a rod which is contained in an upper tube and extends into a lower tube. The upper tube is connected to the susceptor via a locking mechanism. An upper spring in the upper tube applies a downward force on the upper tube such that an upward force on the bottom of the susceptor compresses the upper spring, thereby relieving stress on the susceptor and preventing damage due to overdriving.

Abstract: A voltage supply circuit for an LCD driver employs two voltage dividers. A low current voltage divider includes resistive elements having a high resistance, thus providing a bias voltage with a low current. A high current voltage divider includes resistive elements having low resistances, thus providing a bias voltage with a high current. The high current voltage divider provides bias voltage levels with high current at the beginning of each time phase change. Thus, the liquid crystal display receives a high current when updating the bias voltage levels on the LCD, thereby producing a fast settling time. When the bias voltage levels are held constant, however, only the low current voltage divider provides the bias voltage levels to reduce power consumption. A halt mode prevents the liquid crystal display and driver from consuming any power by disconnecting both voltage dividers from the voltage source when in sleep mode.

Abstract: A method for decreasing the size of a root partition on a computer system operating under control of a UNIX type operating system without reinstalling the operating system. The computer system includes a first storage device. The first storage device includes the root partition which has a first size. The root partition includes a root file system. The method includes backing up the root file system to a backup file system, booting the computer system to a maintenance mode, deactivating the root partition, activating the root partition at a second size smaller than the first size, and restoring the root file system from the backup file system.

Abstract: Reduction in the net charge at the interface of a dielectric and a semiconductor material is achieved by placing atomic species in the dielectric near the interface. Preferably, these species are selected from the group of alkaline earth metals. The presence of these atoms results in a redistribution of the electronic density near the interface. The placement of the atoms is effected by ion implantation followed by multiple annealing steps at alternating low and high temperatures.

Abstract: This invention provides methods for modulating gene expression at the transcriptional level. In particular, the methods involve tethering a transcriptional coactivator to a DNA binding domain that is specific for a target nucleic acid sequence and contacting the coactivator with a transcription factor. The transcription factor triggers or represses transcription mediated by the coactivator. Methods for identifying compounds that are able to modulate gene expression are also provided.

Abstract: Data are pushed from a source to a destination via an intermediate computer system. If the intermediate computer system is unable to forward the pushed data to the destination for a predetermined length of time, the intermediate system deletes the pushed data and never forwards the data to the destination. According to another aspect, the intermediate system receives a command, e.g. from a server originating the data, to delete the data if the data has not yet been forwarded to the destination. According to another aspect, the intermediate system receives data whose identifier (e.g. source URL) matches an identifier of data pushed earlier to the same destination but not yet forwarded. The intermediate system deletes the earlier pushed data and never forwards the earlier pushed data.

Abstract: In a programmable integrated circuit, by providing a static random access memory (SRAM) cell in each electrically erasable (E.sup.2) non-volatile memory cell, testing time of circuits configured by the E.sup.2 non-volatile memory cells can be reduced substantially. In one embodiment, the SRAM cell can be included by providing a small number of transistors to recirculate the output value of an inverting buffer. During testing, a logic value is written into the SRAM cell in place of the logic value in the non-volatile storage of the E.sup.2 non-volatile memory cell. In one embodiment, the E.sup.2 non-volatile memory cell can be used in conjunction with a 1-bit shift-register. Multiple 1-bit shift registers can be used as a scan chain to scan into the SRAM cells of multiple E.sup.2 non-volatile memory cells.

Abstract: A vehicle masking material and method of use. The masking material in one embodiment includes a dextrin, a plasticizer, and water. The masking material may additionally include a surfactant. The masking material is applied to a surface which is to be protected from paint overspray or other coating processes, allowed to dry, and the surface is coated (e.g. with paint). After drying of the paint, or other coating, the masking material is removed by water washing.

Abstract: A memory system including a memory array, an input circuit and a logic circuit is presented. The input circuit is coupled to receive a memory address and a set of individual write controls for each byte of data word. During a write operation, the input circuit also receives the corresponding write data to be written into the SRAM. The logic circuit causes the write data and write control information to be stored in the input circuit for the duration of any sequential read operations immediately following the write operation and then to be read into memory during a subsequent write operation. During the read operation, data which is stored in the write data storage registers prior to being read into the memory can be read out from the memory system should the address of one or more read operations equal the address of the data to be written into the memory while temporarily stored in the write data storage registers.

Abstract: A circuit and method are provided for disabling a defective normal element using a flip-flop. The flip-flop has two states. In a first state, to which the flip-flop can be set on application of power, the flip-flop enables a normal decoder, corresponding to the normal element, to respond to a respective address for the normal element. In a second state, to which the flip-flop can be set only upon coincident selection of a defective normal element and a programmed redundant element during an initialization routine, the flip-flop disables the normal decoder from responding to any address.

Abstract: A 100Base-TX detection system is presented which takes advantage of the form of the frequency response of the channel to provide a simplified filter for producing an output signal with reduced distortion. Utilizing the nature of the frequency response function of category-5 twisted pair cabling, a finite impulse response linear equalizer or an infinite impulse response decision feedback equalizer having as few as two multipliers is implemented.

Abstract: A component (10 or 12) of a flat-panel display is cleaned with a fluid having a mole-fraction dominant constituent. The cleaning operation is performed by subjecting the component to the cleaning fluid while its absolute pressure exceeds the absolute pressure at the triple point of the dominant constituent and is at least 20% of the absolute pressure value at the critical point of the dominant constituent. The temperature and pressure of the cleaning fluid are typically controlled in a direction toward the supercritical state of the dominant constituent.

Abstract: A radio frequency synthesizer receives a relatively low frequency input signal and synthesizes from it a high frequency output signal whose frequency can be programmed to change in fine steps, for use e.g. in cordless telephone. The frequency synthesizer includes three linked phase locked loops with a single side band mixer in one embodiment coupling two of the phase locked loops together. This provides an output signal free of in-band frequency spurs within the spacing of two channels. The synthesizer can be integrated in a single chip with a narrowband FM modulation circuit. In spite of using a novel synthesizer to achieve monolithic integration, the user programming interface and control value equations are the industry standard format.

Abstract: Disclosed is a method for providing an insulation trench on a semiconductor substrate. The method includes the steps of depositing a pad oxide layer and a nitride layer on a semiconductor substrate; etching the nitride layer and the pad oxide layer and depositing a first insulating layer; forming spacers along sidewalls of the pad oxide layer and the nitride layer by anisotropic etching the first insulating layer; forming trenches by etching the semiconductor substrate; forming a trench insulating layer pattern by depositing a second insulating layer and etching the same; and polishing the trench insulating layer pattern.

Abstract: A polysilicon-based floating gate is formed so as to be resistant to oxidation that occurs during multiple thermo-cycles in fabrication. Accordingly, edge erase times in NOR-type memory devices may be minimized. Additionally, manufacture of oxidation resistant floating gates reduces variations in edge erase times among multiple NOR-type memory devices. A layer of amorphous silicon is deposited over a silicon substrate by directing a mixture of silane and a phosphene-helium gas mixture at the surface of the silicon substrate. Later, N+ ions are implanted into the amorphous silicon. The amorphous silicon layer is then etched so as to overlap slightly with regions that will later correspond to the source and drain regions. Next, a lower oxide layer of an ONO dielectric is deposited and the device is heated. A thermo-cycle is eliminated by heating the amorphous silicon during formation of the oxide layer rather than immediately following its deposition.