Patents Represented by Attorney, Agent or Law Firm Steven R. Biren
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Patent number: 6177715Abstract: An integrated circuit comprising at least one level of metallization, the level of metallization being provided with tracks and comprising metal portions having at least two different thicknesses. The level of metallization comprises at the same time at least one inductor and at least one track, the track being formed on a portion of small thickness, and the inductor being formed on a portion of large thickness.Type: GrantFiled: February 22, 2000Date of Patent: January 23, 2001Assignees: U.S. Philips Corporation, STMicroelectronics SAInventors: Stephan Louwers, Michel Marty
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Patent number: 6178252Abstract: An electroacoustic transducer (1) having a voice coil (17) and having a diaphragm (19) with an annular intermediate zone (22) for securing the voice coil (17), the intermediate zone (22) having angularly spaced-apart trough portions (29) which are each bounded by a trough bottom wall (30) and two trough side walls (31, 32), and the voice coil (17) being secured to the trough bottom walls (30).Type: GrantFiled: February 12, 1999Date of Patent: January 23, 2001Assignee: U.S. Philips CorporationInventors: Ewald Frasl, Erich Klein
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Patent number: 6174759Abstract: In the manufacture of integrated circuits with an embedded non-volatile memory, it is known to first provide the greater part of the memory and subsequently provide the CMOS logic in a second series of steps of a standard CMOS process. By virtue of this separation of process steps, it is possible to optimize the non-volatile memory substantially without degrading the logic. According to the invention, this process is further optimized in that, particularly for the periphery of the memory, and simultaneously with the memory transistors (21, 24, 27), transistors are manufactured which can cope with a higher voltage than the transistors of the logic. In the case of an EEPROM, each cell of the memory is provided with such a high-voltage transistor as a selection transistor (22, 24).Type: GrantFiled: May 3, 1999Date of Patent: January 16, 2001Assignee: U.S. Philips CorporationInventors: Robertus D. J. Verhaar, Joachim C. H. Garbe, Guido J. M. Dormans
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Patent number: 6175577Abstract: In an MPEG-2 transmission system a plurality of programs each consisting of a plurality of elementary streams are multiplexed on a transport stream by a multiplexer (8). The transport stream is transmitted by the transmitting means (10) via a transmission medium (16) to a receiver (18). In the receiver (10) the signal is demodulated by the receiving means (12) and demultiplexed by the demultiplexer (14). In order to be able to find the different elementary streams which form a program several tables are used. Said tables which can change over time, are updated by information present in the transport stream. The tables are identified by a version number in order to be able to distinguish different versions of them. The version numbers are not necessarily subsequent numbers. In a prior art transmission system filtering has to be performed on all possible version numbers to find updates of a table.Type: GrantFiled: February 26, 1998Date of Patent: January 16, 2001Assignee: U.S. Philips CorporationInventor: Sebastiaan A. F. A. Van Den Heuvel
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Patent number: 6175225Abstract: A dc—dc converter comprises first (5) and second (6) transistor switches connected in series between a dc input (1) and ground (4). The converter includes an inductor connecting the junction (8) of the two switches to a dc output and also a capacitor connecting the dc output to ground. The switches are closed alternately in response to a switching signal applied to a switching signal input (3), thereby alternately charging the capacitor from the dc input through the first switch and the inductor and discharging the energy stored in the inductor into the capacitor via the second switch. The coupling (12) from the switching signal input to the control input (25) of the second switch is provided with a threshold-responsive disable signal input (13) which is connected to the junction (8) between the two switches, for preventing the second switch from being controlled to a closed state at any time that the voltage on the junction is above a predetermined threshold.Type: GrantFiled: June 29, 2000Date of Patent: January 16, 2001Assignee: U.S. Philips CorporationInventor: Leonardus A. De Groot
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Patent number: 6171912Abstract: The invention relates to a method of manufacturing a field effect transistor, in particular a discrete field effect transistor, comprising a source region (1) and a drain region (2) and, between said regions, a channel region (4) above which a gate region (3) is located. The gate region (3) is formed by applying an insulating layer (5) to the semiconductor body and providing this insulating layer with a stepped portion (6) in the thickness direction, whereafter a conductive layer (30) is applied to the surface of the semiconductor body (10), which layer is substantially removed again by etching, so that a part (3A) of the conductive layer (30), which part forms part of the gate region (3) and which lies against the stepped portion (6), remains intact.Type: GrantFiled: November 19, 1998Date of Patent: January 9, 2001Assignee: U.S. Philips CorporationInventor: Louis Praamsma
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Patent number: 6173116Abstract: A Method (1) for Rapid Thermal Processing of a wafer (7), wherein the wafer (7) is heated by lamps (9), and the heat radiation is reflected by an optical switching device (15,17) which is in the reflecting state during the heating stage. During the cooling stage of the wafer (7), the heat is absorbed by the switching device (15,17), which is in the heat-absorbing state. The switching device includes a switching film of a trivalent metal, such as gadolinium, which is capable of forming hydrides by an exchange of hydrogen. Dependent on the hydrogen concentration of the hydrides, the film reflects or absorbs heat. The hydrogen content in the switching film can be changed by varying the partial pressure of hydrogen, or, preferably, by varying the potential of the switching film forming part of a stack of layers in an electrochemical cell.Type: GrantFiled: February 17, 2000Date of Patent: January 9, 2001Assignee: U.S. Philips CorporationInventors: Freddy Roozeboom, Peter A. Duine, Paul Van Der Sluis
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Patent number: 6169585Abstract: In a circuit arrangement for demodulating an intermediate-frequency video signal generated while using a Nyquist edge, having a phase-locked loop (1) including a phase detector (3), a loop filter (4) and a voltage-controlled oscillator (5), and a video demodulator (2), the intermediate-frequency video signal being applied to the phase detector (3) and the output signal of the phase-locked loop (1) being applied to the video demodulator (2), which converts the intermediate-frequency video signal into a baseband video signal, phase fluctuations contained in the carrier of the intermediate-frequency video signal due to its generation while using a Nyquist edge are compensated in that the phase comparator (3) operates, by approximation, independently of modulation in the control range of the intermediate-frequency video signal, in that the baseband video signal is present in an inverted form with respect to the intermediate-frequency video signal, and in that a correction signal is derived from the baseband videoType: GrantFiled: February 23, 1999Date of Patent: January 2, 2001Assignee: U.S. Philips CorporationInventor: Thomas Hafemeister
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Patent number: 6163207Abstract: For varying the filter frequencies in an integrator-filter circuit for filtering a push-pull signal by at least two integrator signal filters (31, 32, 33) having integrator elements (1), whose filter frequencies are adjustable by control currents (I.sub.n,1, I.sub.n,2) applied to the integrator elements (1), the integrator-filter circuit includes a reference integrator filter (38) having at least two integrator elements (1) constructed in an identical technique as the other integrator elements (1). This reference integrator filter, when tuned to the frequency of a test signal applied thereto, shifts the phase of the test signal by a defined value, and is arranged subsequent to a phase comparator (39) which also receives the test signal, so that a correction signal is derived from the output signal of the phase comparator (39), in dependence upon this correction signal. The control currents (I.sub.n,1, I.sub.Type: GrantFiled: January 6, 1999Date of Patent: December 19, 2000Assignee: U.S. Philips CorporationInventors: Axel Kattner, Holger Gehrt
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Patent number: 6163182Abstract: A frequency divider DIV/4 composed of memory cells (DL1 . . . DL4) realized in ECL technology, whose data paths constitute a loop, the data output Q4 of the last memory cell DL4 being cross-connected to the data input D1 of the first memory cell DL1. The clock inputs Ck of the memory cells DL1, DL3 of the odd rank are connected to the input IN of the frequency divider circuit DIV/4, while the others are cross-connected to said input. Such a frequency divider generates a noise having a unique frequency which is twice the frequency of the input signal, irrespective of the division ratio obtained.Type: GrantFiled: April 14, 1998Date of Patent: December 19, 2000Assignee: U.S. Philips CorporationInventors: David Canard, Vincent Fillatre
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Patent number: 6160897Abstract: An apparatus (1) is constructed for operation in an on-ear mode and an off-ear mode and includes a housing wall (6) having passages (15) to allow useful sound waves to pass through, and additional passages (16) to allow the passage of sound waves which are in phase opposition to the useful sound waves and includes, behind the housing wall (6), an electroacoustic transducer (7) having a diaphragm (12), the transducer (7) being accommodated in an acoustically substantially impervious holder compartment (17). Sound-pressure frequency response influencing structures (18, 19) are arranged both in the sound path between the frontside (13) of the diaphragm (12) and the passages (15), and in the sound path between the rearside (14) of the diaphragm (12) and the additional passages (16).Type: GrantFiled: May 11, 1999Date of Patent: December 12, 2000Assignee: U.S. Philips CorporationInventor: Erich Klein
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Patent number: 6160304Abstract: The invention relates to a half-bridge circuit comprising two series-connected n-channel DMOS transistors, in which the source of the one transistor, the low-side transistor T.sub.1, is connected to a low-voltage terminal V.sub.ss, and the drain of the other transistor, the high-side transistor T.sub.2, is connected to a high-voltage terminal V.sub.dd. The drain of the low-side transistor and the source of the high-side transistor are connected to the output terminal (4). The circuit is arranged in a semiconductor body having an n-type or p-type epitaxial layer (11) which is applied to a p-type substrate (10). In the epitaxial layer, two n-type regions are defined for the transistors, each of said regions forming a drift region of one of the transistors and being surrounded by a cup-shaped n-type zone in the semiconductor body. Within the n-type cup-shaped zone (12) of the low-side transistor T.sub.1, there is provided a p-type cup-shaped zone which isolates the drift region (15) of T.sub.Type: GrantFiled: October 27, 1998Date of Patent: December 12, 2000Assignee: U. S. Phillips CorporationInventor: Adrianus W. Ludikhuize
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Patent number: 6151221Abstract: A printed circuit board is provided with at least one component having one or more leads which are secured to contact faces of the printed circuit board. The leads of the component are secured to the printed circuit board via wire clamps soldered onto the surface of the contact faces. The formation of through-holes in the printed circuit board is rendered superfluous by the wire clamps. For the leaded components use can be made of resistors and capacitors, but also of a single electroconductive wire. Also described is a method of manufacturing the invented printed circuit board.Type: GrantFiled: June 30, 1998Date of Patent: November 21, 2000Assignee: U.S. Philips CorporationInventor: Steven J. W. Van Lerberghe
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Patent number: 6150224Abstract: The invention relates to the manufacture of a so-called differential bipolar transistor comprising a base (1A), an emitter (2) and a collector (3), the base (1A) being formed by applying a doped semiconducting layer (1) which locally borders on a monocrystalline part (3) of the semiconductor body (10) where it forms the (monocrystalline) base (1A), and which semiconducting layer (1) borders, outside said monocrystalline part, on a non-monocrystalline part (4, 8) of the semiconductor body (10) where it forms a (non-monocrystalline) connecting region (1B) of the base (1A). The non-monocrystalline part (4, 8) of the semiconductor body (10) is obtained by covering the semiconductor body (10) with a mask (20) and replacing on either side thereof a part (8) of the semiconductor body (10) by an electrically insulating region (8) and by providing this, prior to the application of the semiconducting layer (1) with a polycrystalline semiconducting layer (4).Type: GrantFiled: September 10, 1999Date of Patent: November 21, 2000Assignee: U.S. Philips CorporationInventors: Doede Terpstra, Catharina H. H. Emons
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Patent number: 6144156Abstract: The invention relates to the manufacture of electroluminescent elements on the basis of a so-called planar electrode arrangement (8a, 8b), whereby the modifications in accordance with the invention enable a substantial increase of the luminous power to be attained. To strengthen the electric field and hence increase the brightness, a special multilayer technology is employed. The electric field may be further strengthened by a film having a high dielectric constant. Preferably, a customary printed circuit board is used as the supporting board, so that the process in which the electroluminescent element is manufactured can be directly integrated in the printed-circuit-board manufacturing process. A further advantage of the invention is that the printed circuit boards provided with the optical components in accordance with the invention can be soldered by means of customary solder processes.Type: GrantFiled: April 14, 1998Date of Patent: November 7, 2000Assignee: U.S. Philips CorporationInventors: Ferdinand Lutschounig, Andreas Starzacher
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Patent number: 6144085Abstract: A power transistor device, for example a MOSFET or an IGBT, comprises a semiconductor body (10) which accommodates an array (11) of parallel device cells (1a) in which heat is generated in operation of the device. A hot-location temperature sensor (Mh) is located inside the array (11), and a cool-location temperature sensor (Mc) is located outside the array (11). These sensors each comprises at least one sensor cell (1b; 1c) which is of the same transistor type as the device cells (1a). The sensor cells (1b; 1c) have a cellular region structure (12,13,14,15) similar to that of the device cells (1a), but each sensor (Mh; Mc) has a respective output electrode (31; 32) separate from electrodes (22,23,25) of the device cells (1a).Type: GrantFiled: August 19, 1999Date of Patent: November 7, 2000Assignee: U.S. Philips CorporationInventor: Richard J. Barker
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Patent number: 6144843Abstract: In a tuning method, a commanded-tuning loop (CTL) tunes a receiver (REC) on the basis of a tuning command (TC) and a self-tuning loop (STL) tunes the receiver on the basis of a reception signal. To resolve a tuning conflict between the loops, one of the loops (CTL or STL) is calibrated (CAL) with respect to the other loop (STL or JKR CTL). Preferably, the commanded-tuning loop (CTL) is in an active state when the self-tuning loop (STL) is in-lock. This allows good reception under dynamic reception conditions.Type: GrantFiled: September 23, 1997Date of Patent: November 7, 2000Assignee: U.S. Philips CorporationInventors: Kaveh Kianush, Johannes C. M. Meeuwis
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Patent number: 6140889Abstract: A splitter for passband signals up to several GHz has symmetrical transformer windings that are connected together at input ends and extend to output ends. An input resistor connects between an input terminal of the splitter and the connected input ends of the windings. A respective output resistor connects between each output end of the windings and a respective output terminal of the splitter. A respective shunt resistor connects between each output end of the windings and ground. A resistor and capacitor in series connect between two of the output ends of the windings.Type: GrantFiled: March 11, 1999Date of Patent: October 31, 2000Assignee: U.S. Philips CorporationInventor: Pierre Chanteau
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Patent number: 6131510Abstract: The system comprises two oppositely working scraping blades (8, 9) fixed to a blade support (6, 7) for depositing a silk-screen printing product (18) via a screen (17) on a support (21) to be coated. According to the invention, each extremity of the blade support comprises means (28, 29) for fixing a cheek for confinement of the product. The cheek (24, 25) is a plate of flexible material which engages the screen (17) by means of its free edge, with a small spacing being saved between the blade and the plate. The plate is oriented in such a way that the silk-screen printing product (26, 27), which passes beyond the extremity of the blade during its passage under pressure on the screen, is brought back to within the screen in the work zone of the blade.Type: GrantFiled: November 12, 1998Date of Patent: October 17, 2000Assignee: U.S. Philips CorporationInventor: Edouard Gasquez
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Patent number: 6133591Abstract: A silicon-on-insulator (SOI) hybrid transistor device structure includes a substrate, a buried insulating layer on the substrate, and a hybrid transistor device structure formed in a semiconductor surface layer on the buried insulating layer. The hybrid transistor device structure may advantageously include at least one MOS transistor structure and at least one conductivity modulation transistor structure electrically connected in parallel. In a particularly advantageous configuration, the MOS transistor structure may be an LDMOS transistor structure and the conductivity modulation transistor structure may be an LIGB transistor structure, with the hybrid transistor device being formed in a closed geometry configuration. This closed geometry configuration may have both substantially curved segments and substantially straight segments, with MOS structures being formed in the curved segments and conductivity modulation transistor structures being formed in the straight segments.Type: GrantFiled: July 24, 1998Date of Patent: October 17, 2000Assignee: Philips Electronics North America CorporationInventors: Theodore Letavic, Satyen Mukherjee, Arno Emmerik, J. Van Zwol