Abstract: In important applications of circuits comprising transistors of the lateral DMOST type, such as (half) bridges, the voltage on the output may become higher or lower than the supply voltage or earth in the case of an inductive load. The injection of charge carriers into the substrate can be prevented by screening the drain (18) of the Low-Side transistor from the substrate by means of a p-type buried layer (13) and an n-type buried layer (14) below said p-type buried layer. In order to avoid parasitic npn-action between the n-type buried layer (14) and the n-type drain (18), not only the back-gate regions (16a, 16c) at the edge of the transistor, but also the back-gate regions (16b) in the center of the transistor, are connected to the p-type buried layer, for example by means of a p-type well. As a result, throughout the relatively high-ohmic buried layer, the potential is well defined, so that said npn-action is prevented.

Abstract: The present invention relates to a converting device for converting an analog input signal Vin into a digital output signal OUT, whose gain is equal to the ratio between the values of the output and input signals, comprising: a resistor ladder LAD intended to generate reference voltages, and a plurality of amplifiers A, intended to compare the input signal Vin with the reference voltages. According to the invention, the converting device includes adjusting means for making the gain of the amplifiers and the gain of the converting device proportional to each other. The invention enables to ensure that the differential non-linearity of the converting device remains constant and thus that its behavior does not change when its gain varies.

Abstract: Methods and arrangements are provided to significantly reduce the processing burden in a data storage device and streamline the transfer of frames of data from the storage device to an external device, by taking into account certain known or otherwise determinable characteristics about the data recorded on the storage medium and selectively applying tag data to each frame of data. The tag data is then used to determine the disposition of each frame of data, and what actions if any are required to process the frame of data within the storage device. Since this “tagging”, which can be logical or physical, can occur at an early stage in the circuitry of the storage device, the amount of subsequent processing is significantly reduced. Consequently, the latency associated with the storage device is also reduced.

Abstract: A transistor amplifier is described having a first transistor pair, which comprises a first and a second transistor, and having a second transistor pair, which comprises a third and a fourth transistor, in which the transistors of each pair have their emitter electrodes coupled to each other and to an associated constant current source, the first transistor has its base electrode and its collector electrode coupled to the corresponding electrodes of the third transistor, and the second transistor has its base electrode and its collector electrode coupled to the corresponding electrodes of the fourth transistor, the base electrodes of the first and the third transistor, on the one hand, and the base electrodes of the second and the fourth transistor, on the other hand, being arranged to receive an input signal and an output signal being derivable from the collector electrodes of the transistors, and having a first, a second, a third and a fourth negative-feedback circuit each included in the coupling to the as

Abstract: An EUV radiation source unit (10) for use in a lithographic projection apparatus to illuminate a mask pattern (22) which is to be projected on a substrate (W) comprises an electron source (12) and a medium in which the electrons of the source generate EUV Cherenkov radiation (PB). The wavelengths of the Cherenkov radiation and the multilayer structure of the mirrors (31-34) of the projection system (30) are adapted to each other, so that these mirrors show a maximum reflectivity. The medium forms part of the mask (MA) so that a mirror condenser system is no longer needed. In this way, an efficient transmission of radiation (PB) from the source to the substrate is obtained.

Abstract: The threshold of a number of storage transistors is shifted in steps. After such a step, a collective current through the main current channels of a number of these storage transistors is sensed. The same gate-source voltage is applied to all these transistors during sensing. The collective current indicates whether the threshold of all transistors has been sufficiently shifted. If not, a further threshold shifting step is applied.

Abstract: A battery charger comprising a converter (CNV) for converting an input voltage (Ui) which is connected between an input terminal (1) and a reference terminal (GND) into a terminal voltage (Vk1) of a rechargeable battery (BT) which is connected between an output terminal (2) and the reference terminal (GND). The converter comprises a first and a second switch (SW1, SW2), a coil (L), a control circuit (CNTRL), a comparator (CMP), a frequency counter (CNT), and an indicator (IND). If the terminal voltage (Vk1) is lower than the reference voltage (VRF), the start signal (ST) delivered by the comparator (CMP) will turn logic high. As a consequence the control circuit (CNTRL) will start an energy transfer cycle for transferring an amount of energy from the input terminal (1) to the rechargeable battery (BT). The frequency of the start signal (ST) decreases as the terminal voltage (Vk1) increases.

Abstract: To obtain a high mobility and a suitable threshold voltage in MOS transistors with channel dimensions in the deep sub-micron range, it is desirable to bury a strongly doped layer (or ground plane) in the channel region below a weakly doped intrinsic surface region, a few tens of nm below the surface. It was found, however, that degradation of the mobility can occur particularly in n-channel transistors owing to diffusion of boron atoms from the strongly doped layer to the surface, for example during the formation of the gate oxide. To prevent this degradation, a thin layer 11 of Si1−xGex inhibiting boron diffusion is provided between the strongly doped layer 10 and the intrinsic surface region 7, for example with x=0.3.

Abstract: A converter for converting a terminal voltage (Vk1) supplied by a battery (BT) which is connected between an input terminal (1) and a reference terminal (GND) into an output voltage (U0) across a load (ZL) which is connected between an output terminal (2) and the reference terminal (GND). The converter comprises a first and a second switch (SW1, SW2), a coil (L), a control circuit (CNTRL), a comparator (CMP), a frequency counter (CNT), and an indicator (IND). If the output voltage (U0) is lower than the reference voltage (VRF), the start signal (ST) will turn logic high. As a consequence the control circuit (CNTRL) will start an energy transfer cycle for transferring an amount of energy from the battery (BT) to the load (ZL). The frequency of the start signal (ST) increases as the terminal voltage (Vk1) decreases. By measuring the frequency of the start signal (ST), the indicator (IND) has the possibility of supplying a battery-low indication signal (BTLW) when the battery (BT) is almost empty.

Abstract: Ordinarily, at least two types of mixer oscillator integrated circuits for tuners have to be used, i.e., one for the symmetrical output mode and one for the asymmetrical output mode. In order to handle both output modes, a tuner includes a switching circuit, whereby, in the asymmetrical mode, one output of the tuner is coupled to ground.

Abstract: A semiconductor memory device using silicon-rich amorphous silicon alloy material memory elements that are electrically programmable by means of current induced conductivity comprises a layer (10) of the alloy material on opposing sides of which sets of input and output contacts (16, 18) are provided, and discrete conductive elements (20) within the layer which serve as nodes and define programmable conductive paths between input and output contacts to create a three dimensional memory network. The conductive elements can be arranged at one or more levels within the thickness of the alloy layer and preferably are of defined shape forming a predetermined 2D array at each level.

Abstract: A converter for the conversion of an input voltage between a first supply terminal and a second supply terminal into an output voltage, including a switching means which in operation are turned on and off alternatively under control of a control signal, an inductive element which together with the switching means forms a series arrangement coupled between the firs supply terminal and the second supply terminal, a control circuit for supplying the control signal, and evaluation means for evaluating a voltage across the switching means, which voltage exhibits ringing, and for supplying an evaluation signal to the control circuit. The frequency of the control signal is approximately constant and is determined by an oscillator.

Abstract: A trench-gate power device, for example a MOSFET, has a semiconductor body (10), for example of monocrystalline silicon, comprising a plurality of side-by-side body regions (3) which accommodate parallel conduction channels (12) adjacent the trench-gate structure (33,23,20) of the device. The channels (12) are connected in parallel between a first main electrode (21) which is common to side-by-side source regions (1) and a second region (2) which is common to the side-by-side body regions (3). The side-by-side source regions (1) comprise a layer (11) of narrow-bandgap semiconductor material (SixGe(1−x)) which is deposited on a major surface (10a) of the body (10) to form a source p-n heterojunction (31) with the side-by-side body regions (3) of the body (10). This narrow-bandgap semiconductor material (SixGe(1−x)) serves to suppress second breakdown of the power device, so improving its ruggedness.

Abstract: A mirror projection system for use in a step-and-scan lithographic projection apparatus, in which a mask pattern is repetitively scan-imaged on a number of areas of a substrate by means of a beam of EUV radiation, and having a cross-section shaped as a segment of a ring, has six imaging mirrors. The design is such that an intermediate image is formed between the fourth and the firth mirror from the object side, and the system has a relatively large working distance.

Abstract: In the known process for manufacturing a semiconductor device, in particular an integrated circuit, in a silicon body, a surface of said silicon body is provided with an alignment grating formed in accordance with a pattern of strips of adjacent elevations and valleys, and with a partially recessed oxide pattern at the location of a semiconductor device by subsequently providing the surface of the silicon body with a masking layer of anti-oxidation material having apertures at the location of the semiconductor device and subjecting the silicon body to an oxidation treatment. The process is simplified considerably by applying the alignment pattern (7) simultaneously with the partially recessed oxide pattern (12) of the semiconductor device (5).

Abstract: An optical scanning device is described which can scan a record carrier by a radiation beam. A dividing element directs radiation reflected from the record carrier to a detection system. The detection system includes at least three detectors. The dividing element has at least three gratings, each forming a sub-beam directed to one of the detectors. The longest dimension of each detector is substantially perpendicular to the bisector of the appertaining sector.

Abstract: In the manufacture of a semiconductor power device such as a trench-gate power MOSFET, a source region (13) is formed using a sidewall extension (30) of an upstanding insulated-gate structure (11,21,22). The sidewall extension (30) forms a step with an adjacent surface area (10a′) of a body region (15) of a first conductivity type and comprises doped semiconductor material (13a) of opposite, second conductivity type which is separated from the gate (11) by insulating material (22). The body region (15) provides a channel-accommodating portion (15a) adjacent to the gate structure (11,21,22) and also comprises a localised high-doped portion (15b) which extends to a greater depth in the semiconductor body (10) than the shallow p-n junction between the source region (13) and the channel-accommodating portion (15a), and preferably deeper even than the bottom of the trench (20) of a trench-gate device.

Abstract: In a studio camera (SC), comprising an image pickup unit (PUU) for converting a scene into image signals, and a viewfinder (VF) for displaying the image signals on a viewfinder display (D), the viewfinder (VF) having a position adjustment mechanism (PAM) for allowing a camera operator (CO) to have an optimal view on the viewfinder display (D), the position adjustment mechanism (PAM) is automatically controlled so as to direct the viewfinder display (D) to the camera operator (CO).

Abstract: In a method of manufacturing a semiconductor device comprising a field-effect transistor and a non-volatile memory element at a surface of a semiconductor body, a first and a second active region of a first conductivity type are defined at the surface of the semiconductor body for the transistor and the memory element, respectively. The surface of the semiconductor body is subsequently coated with a first insulating layer providing a sacrificial gate dielectric of the transistor and a floating gate dielectric of the memory element, which first insulating layer is then covered by a silicon-containing layer providing a sacrificial gate of the transistor and a floating gate of the memory element. After formation of the sacrificial gate and the floating gate, the transistor and the memory element are provided with source and drain zones of a second conductivity type.

Abstract: The invention relates to a semiconductor device including a preferably discrete bipolar transistor with a collector region, a base region, and an emitter region which are provided with connection conductors. A known means of preventing a saturation of the transistor is that the latter is provided with a Schottky clamping diode. The latter is formed in that case in that the connection conductor of the base region is also put into contact with the collector region. In a device according to the invention, the second connection conductor is exclusively connected to the base region, and a partial region of that portion of the base region which lies outside the emitter region, as seen in projection, lying below the second connection conductor is given a smaller flux of dopant atoms. The bipolar transistor in a device according to the invention is provided with a pn clamping diode which is formed between the partial region and the collector region.