Patents Represented by Attorney, Agent or Law Firm Steven R. Biren
  • Patent number: 6252796
    Abstract: A sensor or a memory element comprises a fixed or free ferromagnetic layer. To increase the ease of writting the free layer (for memories) or the fixed layer (for sensors) the layer to be written or switched comprises multilayer configuration comprising two ferromagnetic sublayers separated by a non-magnetic spacer layer, the two ferromagnetic sublayers being magnetically coupled in such manner that their magnetization directions are anti-parallel and the device comprises means for directing a in-plane switching or re-setting current through the multilayered configuration, the current direction being transverse to the magnetization directions of the magnetically coupled sub-layers.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: June 26, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Kars-Michiel Hubert H. Lenssen, Hans Willem W. Van Kesteren
  • Patent number: 6249323
    Abstract: In a white balance control, correction signals are added to input chrominance signals (Uin, Vin) to obtain output chrominance signals (Uout, Vout). Chrominance sum signals are derived from the input and output chrominance signals (Uin, Vin ; Uout, Vout) and reference chrominance signals (Uref, Vref). Exponential signals are derived from the chrominance sum signals, and the reference chrominance signals (Uref, Vref) are multiplied by the exponential signals to obtain the correction signals.
    Type: Grant
    Filed: May 18, 1998
    Date of Patent: June 19, 2001
    Assignee: U.S. Philips Corporation
    Inventor: Victor H. J. Van Der Voort
  • Patent number: 6248486
    Abstract: Aberrations of an imaging system can be detected in an accurate and reliable way by imaging, by means of the imaging system, a circular phase structure on a photoresist, developing the resist and scanning it with a scanning detection device which is coupled to an image processor. The circular phase structure is imaged in a ring structure and each of several possible aberrations, like coma, astigmatism, three-point aberration, etc. causes a specific change in the shape of the inner contour and the outer contour of the ring and/or a change in the distance between these contours, so that the aberrations can be detected independently of each other. The new method may be used for measuring a projection system for a lithographic projection apparatus.
    Type: Grant
    Filed: September 29, 1999
    Date of Patent: June 19, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Peter Dirksen, Casparus A. H. Juffermans
  • Patent number: 6246984
    Abstract: A device is provided, which, ancillary to functionality means (used in normal operation) comprises message reproduction means. The message reproduction means as they are used for example in providing on line help information or in rendering annotations to visually displayed information render in speech form a message which elaborates an aspect current in the functionality means. In order to reduce the time needed to locate a desired passage in the message, the device allows the user selectively to activate the message reproduction means for rendering said message in speech form at least either according to a first standard velocity or to a second, time saving velocity.
    Type: Grant
    Filed: April 25, 1995
    Date of Patent: June 12, 2001
    Assignee: U.S. Philips Corporation
    Inventor: Josephus H. Eggen
  • Patent number: 6240621
    Abstract: A method of manufacturing a plurality of thin-film, surface-mountable, electronic components, comprising the following successive steps: providing a substantially planar, ceramic substrate having a first and second major surface which are mutually parallel, the substrate containing a series of mutually parallel slots which extend from the first major surface through to the second major surface, such slots serving to subdivide the substrate into elongated segments extending parallel to the slots and located between consecutive pairs thereof, each segment having two oppositely located walls extending along the edges of the adjacent slots, each segment carrying a thin-film electrode structure on at least one of its first and second major surfaces; with the aid of a three-dimensional lithographic technique, providing electrical contacts which extend along both walls of each segment and which make electrical contact with the electrode structure on each segment; severing the segments into individual block-shaped co
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: June 5, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Antonius J. M. Nellissen, Erik C. E. van Grunsven
  • Patent number: 6242270
    Abstract: Visible defects are detected on a process semiconductor wafer. Defects are classified according to appearance and an association is kept between classes and apparatuses. When the density of defects in a given class exceeds a control limit the associated apparatus is switched off-line. In an embodiment, the same wafer is inspected repeatedly, each time after a different processing steps and information about the location of detected defects is kept. Defects which occur at a location where defects have already been detected in a previous inspection after an earlier processing step are eliminated from the density which is compared to the control limit.
    Type: Grant
    Filed: February 9, 1999
    Date of Patent: June 5, 2001
    Assignee: U.S. Phillips Corporation
    Inventors: Venkat R. Nagaswami, Johannes G. Van Gessel, Dries A. Van Wezep
  • Patent number: 6242762
    Abstract: A semiconductor device with a tunnel diode (23) is particularly suitable for various applications. Such a device comprises two mutually adjoining semiconductor regions (2, 3) of opposed conductivity types and having doping concentrations which are so high that breakdown between them leads to conduction by means of tunnelling. A disadvantage of the known device is that the current-voltage characteristic is not yet steep enough for some applications. In a device according to the invention, the portions (2A, 3A) of the semiconductor regions (2, 3) adjoining the junction (23) comprise a mixed crystal of silicon and germanium. It is surprisingly found that the doping concentration of both phosphorus and boron are substantially increased, given the same amount of dopants being offered as during the formation of the remainder of the regions (2, 3).
    Type: Grant
    Filed: May 13, 1998
    Date of Patent: June 5, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Adam R. Brown, Godefridus A. M. Hurkx, Wiebe B. De Boer, Jan W. Slotboom
  • Patent number: 6243771
    Abstract: A communication channel is operated in a mixed master/slave subscriber environment by a dynamical closing/opening operation. In particular, a separate handshaking between each subscriber and a central communication module is undertaken. The latter first asserts a first halt command to every master for assuming a first halt state. Upon finding universal prevalence of the first halt state a second halt command is asserted to every slave for assuming a second halt state. Upon detecting universal prevalence of the second halt state a “communications switched off” mode is provided. For resuming, a reverse sequence is executed.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: June 5, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Theodrikus H.I.E. Van Gasteren, Ferry Huberts
  • Patent number: 6239772
    Abstract: A display monitor operating under the raster scanning system repeats the line scanning of an electron beam by moving the resulting scanning lines in a direction substantially perpendicular to the line direction. In a cathode ray tube (CRT), the dot pitch of the fluorescent material on the display screen (DS) of the cathode ray tube (CRT) that can emit a fluorescence is determined by the aperture pitch of the shadow mask. Thus, in case of displaying a video pattern (f1h) in which consecutive pixels in a line repeat in an ON and OFF sequence an interference with the aperture pitch of the shadow mask may occur, thereby causing a moiré.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: May 29, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Christaan Hentschel, Leendert Vriens
  • Patent number: 6235601
    Abstract: A process is set forth for providing a self-aligned, vertical bipolar transistor. A controlled technique is provided for providing the base and emitter features of the transistor with appropriate dimensions and properties to be useful in high frequency microwave applications. A microwave transistor is provided by this technique.
    Type: Grant
    Filed: September 19, 1997
    Date of Patent: May 22, 2001
    Assignee: Philips Electronics North America Corporation
    Inventor: Manjin J. Kim
  • Patent number: 6236052
    Abstract: According to a known projection lithography method an object is imaged on an imaging surface by means of a telescopic system of rotationally symmetrical electron lenses. The throughput during the production of integrated circuits by means of projection lithography is determined by the amount of current in the imaging electron beam; this current is limited by the resolution-limiting interaction of the electrons (Coulomb interaction). The invention allows for a larger beam current in that areas with a high current concentration are avoided. To this end, the imaging system includes five mutually perpendicular quadrupoles, so that the electrons are concentrated in line-shaped focal spots instead of a (small) circular cross-over (18). The system is telescopic and the imaging is stigmatic with equal magnifications in the x-z plane and the y-z plane.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: May 22, 2001
    Assignee: U.S. Philips Corporation
    Inventor: Marcellinus P. C. M. Krijn
  • Patent number: 6232636
    Abstract: A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a lateral MOS device on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first. A lateral drift region of a first conductivity type is provided adjacent the body region, and a drain region of the first conductivity type is provided laterally spaced apart from the body region by the drift region. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and over at least a part of the lateral drift region adjacent the body region, with the gate electrode being insulated from the body region and drift region by an insulation region.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: May 15, 2001
    Assignee: Philips Electronics North America Corporation
    Inventors: Mark Simpson, Theodore Letavic
  • Patent number: 6233209
    Abstract: An optical recording medium having a number of adjacent tracks for storing digital optical information extending in a first direction. The tracks are separated by a pitch amount in a second direction and each track has a servo field comprising at least one synchronization mark and at least one tracking mark in one of at least three positions on the track. The tracking marks of tracks adjacent in the second direction to a first track are in different positions from each other and from the position of the tracking mark on the first track. The track marks extend in the second direction to give rise to cross-talk from the tracking marks of adjacent tracks when the first track is being read.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: May 15, 2001
    Assignee: Philips Electronics North America Corporation
    Inventor: Johannes Jacobus Verboom
  • Patent number: 6232754
    Abstract: In a power converter for supplying a controlled output from an input supply, a plurality of transfer devices is used to selectively couple the input supply to a distribution of storage devices. In a high-current mode, each of the transfer devices and associated storage device is used to couple the input supply to the controlled output. In a minimal-current mode, each of the transfer devices and associated storage device is selectively disabled until only one transfer device and storage device is utilized, and this remaining device may also be selectively disabled. Because the storage devices are distributed, each storage device can be smaller than that required for the high-current operation, thereby minimizing the losses associated with high-current switching converters during low-current operation. In another aspect of this invention, the plurality of transfer devices is operated at different phases to one another, thereby reducing the ripple associated with high-current operation.
    Type: Grant
    Filed: August 15, 1999
    Date of Patent: May 15, 2001
    Assignee: Philips Electronics North America Corporation
    Inventors: Jerome Edgar Liebler, Alma Stephenson Anderson
  • Patent number: 6229221
    Abstract: An integrated circuit device comprises an active circuit 4 provided in an active circuit area at a surface 5 of a semiconductor body 6, a plurality of bond pads 3 disposed substantially over the active circuit area and electrical connections between the bond pads 3 and the active circuit 4. Each one of the bond pads 3 has a wire-bonding region 23 for bonding a wire 24 and a circuit-connecting region 22 for the electrical connection with the active circuit 4. The active circuit 4 comprises active circuit devices 7, an interconnect structure comprising at least one patterned metal layer disposed in overlying relationship relative to the active circuit devices 7 and a layer 20 of passivating material disposed atop the interconnect structure, through which the electrical connections pass. The layer 20 of passivating material substantially consists of inorganic material and is substantially free from interruptions beneath the wire-bonding region 23 of the bond pads 3.
    Type: Grant
    Filed: December 6, 1999
    Date of Patent: May 8, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Hendrik K. Kloen, Lodewijk P. Huiskamp
  • Patent number: 6228698
    Abstract: The manufacture of a semiconductor device, for example a MOSFET of the trench-gate type or an IGBT, includes the steps of: forming at a surface (10a) of a semiconductor body (10) a first mask (53) having a window (53a), forming a localized region (15b) to improve the blocking/breakdown characteristics by introducing dopant (62) into a first area of the body via the window (53a), and thermally diffusing the localized region (15b) to a greater depth than the channel-accommodating region (15a) before providing a source region (13). A second mask (51) of complementary window pattern to the first mask (53) is formed by providing a differently-etchable material (51′) in the first window (53a) and then etch-removing the first mask (53) while leaving the second mask (51) at the first area where the localized region (15b) is present.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: May 8, 2001
    Assignee: U.S. Philips Corporation
    Inventor: JiKui Luo
  • Patent number: 6229182
    Abstract: To improve the robustness of a protection against ESD, a transistor structure is proposed in which breakdown does not occur at the surface of the silicon body but in the bulk of the silicon at a distance from the surface. To this end, the drain of the transistor is partly provided in a well, on a side remote from the channel, which well is of the same conductivity type as the silicon body but has a higher doping level than said body. Due to the higher doping level, breakdown will occur in the bulk at the bend of the pn-junction. In an important embodiment, the transistor forms an output transistor of the circuit. Since a transistor is not necessary to ensure a uniform current distribution, a compact structure and possibly a lower ground bounce may be achieved.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: May 8, 2001
    Assignee: U.S. Philips Corporation
    Inventor: Henricus A. L. Van Lieverloo
  • Patent number: 6221737
    Abstract: A method of making a semiconductor device such as a diode or MOSFET provided in a thin semiconductor film on a thin buried oxide is disclosed, in which the lateral semiconductor device structure includes at least two semiconductor regions separated by a lateral drift region. A top oxide insulating layer is provided over the thin semiconductor film and a conductive field plate is provided on the top oxide insulating layer. In order to provide enhanced device performance, a portion of the top oxide layer increases in thickness in a substantially continuous manner, while a portion of the lateral drift region beneath the top oxide layer decreases in thickness in a substantially continuous manner, both over a distance which is at least about a factor of five greater than the maximum thickness of the thin semiconductor film.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: April 24, 2001
    Assignee: Philips Electronics North America Corporation
    Inventors: Theodore Letavic, Mark Simpson
  • Patent number: 6222417
    Abstract: An output stage for an amplifier AMP includes a first transistor T1 and a second transistor T2 having their main current paths arranged between two power supply terminals VCC and GND, the bias terminal of the first transistor T1 being connected to the output of the amplifier AMP and the bias terminal of the second transistor T2 being connected to the input of the amplifier AMP via a bias circuit BC. The bias circuit includes a detection module intended to signal the instant when the second transistor T2 enters the state of saturation, and an impedance matching module intended, when activated, to attribute a high impedance to the bias terminal of the second transistor T2 when the transistor becomes saturated. The circuit limits the value of a parasitic current injected into the substrate via a parasitic transistor PT2 which appears when the second transistor T2 is saturated.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: April 24, 2001
    Assignee: U.S. Philips Corporation
    Inventor: Gilles Chevallier
  • Patent number: 6218222
    Abstract: Devices with Schottky junctions are manufactured in that a semiconductor body with a substrate is provided with a first, for example n-type semiconductor region in the form of an epitaxial layer. A Schottky metal is locally provided thereon. A second semiconductor region is advantageously formed directly below the Schottky metal, with the purpose of adjusting the level of the Schottky barrier. Around this, a third semiconductor region is formed in the first region at at least two sides, which third region is then of the p-conductivity type and, when it entirely surrounds the second region, forms a so-called guard ring. A disadvantage of the above known method is that the devices obtained thereby have a (forward) current-voltage characteristic which is not very well controllable and reproducible. This hampers mass manufacture.
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: April 17, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Adam R. Brown, Wiebe B. De Boer