Abstract: In a Darlington circuit with integrated speed-up diode the parasitic four-layer effect (p-n-p-n), which is detrimental to the circuit, is removed by giving the diode a divided configuration. The width of the sub-regions is chosen to be so small that the short-circuited p-n junction between the cathode of the diode and the base of the control transistor cannot or substantially can not be biased in the forward direction in the inner part of the semiconductor device.

Abstract: A semiconductor device includes a silicon substrate having an insulating layer with a window. A silicon layer is deposited on the insulating layer and on the silicon substrate surface in the window. This silicon layer has n-type and p-type conductive layer parts which adjoin each other within the window and which each serve as both a connection conductor and an electrode of an active zone of the device. Semiconductor devices in accordance with the invention feature very small surface areas, and are thus particularly suitable for high frequency operation.

Abstract: In bulk channel charge coupled devices the nonlinearity in the input characteristic caused by varactor effects is removed by moving the potential well in which the charge packets are generated below the input electrode to the surface where the center of electrical charge is substantially independent of the value of the charge. Said shift can be obtained by external means, for example an extra d.c. voltage at the input electrode, or by internal means, for example a thicker oxide below the input electrode.

Abstract: An inset oxide isolated integrated circuit, with multiple levels of inset oxide, polycrystalline regions, and channel stops.

Abstract: An electroluminescent semiconductor device includes a monocrystalline substrate, an n-type gallium nitride layer on the substrate, an active gallium nitride layer on the n-type layer which is doped to at least full compensation of the natural donor impurities with acceptor impurities, a surface electrode for contacting the active layer and means for contacting the n-type layer. A part of the n-type layer, which extends parallel to the active layer and adjoins the active layer, is doped to less than full compensation by means of the acceptor impurities, and the net concentration of donor impurities is smaller than the concentration of natural impurities and is substantially homogeneous in the layer portion. Electroluminescent semiconductor devices in accordance with the invention feature improved efficiency as well as better reproducibility than prior art devices.

Abstract: A semiconductor device includes at least one pair of complementary vertical bipolar transistors formed on a plate having a substrate formed of two adjacent portions of opposite conductivity type forming a p-n junction therebetween. The two adjacent portions form, respectively, the collector region of a first of the transistors and the emitter region of a second of the transistors. An electrode is provided on the lower face of the substrate to connect together the two adjacent portions of the substrate. The invention is particularly applicable to mixed Darlington amplifier structures and push-pull amplifiers composed of such structures.

Abstract: A charge coupled circuit arrangement uses a punch-through charge introduction effect to convert electromagnetic radiation into electrical signals. The invention is particularly, but not exclusively, adapted to convert electromagnetic radiation in the infra-red wavelength band into electrical signals. A charge coupled device using the punch-through charge introduction effect is also disclosed.

Abstract: A bipolar transistor includes an integrated resistive emitter zone of closed geometric configuration which divides the emitter region of the transistor into two sub-regions. The integrated resistive emitter zone serves to improve the secondary breakdown characteristics of the transistor, so that transistors in accordance with the invention are particularly suited for use in power transistors.

Abstract: A method of manufacturing a microminiature solid-state device includes first and second exposure steps in which radiation-sensitive material on a solid-state substrate is exposed radiation through a mask pattern to define locations for localized processing. A local processing step between the first and second exposure steps causes an undesired dimensional distortion of the substrate surface in the plane of the substrate surface. This dimensional distortion is then reduced by adjusting the relative sizes of the area of the substrate surface and the area of the mask used in the second exposure step in an substantially uniform manner prior to the second exposure step. By adjusting the relative sizes of the substrate surface and mask areas in such a way as to compensate for the planar dimensional distortion induced in the first exposure step, such dimensional distortion can be substantially reduced.

Abstract: A semiconductor device includes a bipolar transistor having at least two emitter zones. One of the emitter zones is divided into two separate sub-zones, which are separated by a conductive channel which connects the base zone to an adjoining resistive zone. Two substantially identical transistors of the type disclosed may be interconnected in a cross-coupled arrangement to form an ECL memory cell.

Abstract: A semiconductor device having an integrated circuit of which a region of one conductivity type is charged by supplying charge carriers from a zone of the opposite conductivity type to an inversion layer formed in the said region below a field electrode at which a voltage is set up. When the voltage is switched off, a part of the charge carriers recombine in the said region. According to the invention, the charge carriers are supplied from a supply conductor and an electronic switch is present between said conductor and the inversion layer, which switch prevents the flow back of charge carriers to the supply conductor when the inversion layer disappears.

Abstract: A read-only memory in which each memory cell is formed by two back-to-back diodes across which a connection can be formed by means of punch-through. Since cross-talk between adjacent cells is impossible, the packing density may be very large. Additionally, the cycle time of the memory is low due to the very short reverse recovery time of the invented structure.

Abstract: A capacitance diode includes an epitaxial layer of a first conductivity type provided on a substrate in which a doping profile is formed in the epitaxial layer by controlled doping during the epitaxial layer growth, and a surface zone of the second conductivity type which forms a p-n junction with the epitaxial layer. According to the invention, the doping profile in the epitaxial layer varies according to the equation ##EQU1## wherein x is the distance from the p-n junction in .mu.m, x.sub.o is the width of the barrier layer in .mu.m at a voltage -U.sub.D across the p-n junction, U.sub.D is the diffusion voltage of the p-n junction, and k, n and .beta. are constants. As a result of this doping profile, a very low frequency deviation is obtained which does not change sign.

Abstract: A photosensitive element and a photosensitive device arrangement using the element include a charge transfer structure having an electrode layer extending over a photosensitive area of a semiconductor body. In operation, a bias potential is applied to the electrode layer to form a depletion layer in the underlying body portion, and a drift field is produced in the depletion layer which extends in the direction of an edge portion of the electrode layer to permit photogenerated charge carriers to be transmitted towards the edge portion. A preferred structure for producing the desired drift field includes a resistive electrode having first and second connections for applying a potential difference along the resistive electrode. The photosensitive device arrangement further includes a localized charge-storage zone adjacent the edge portion of the electrode layer for collecting the photogenerated charge carriers and a detector circuit for measuring the charge state of the charge-storage zone.

Abstract: A method of forming a contact on the surface of a semiconductor by a serigraphy treatment in which a doped conductive paste is provided in a first deposition, and then a second deposition containing no dopant is provided at least partly on the first deposition. Devices made in accordance with the invention are particularly suited for use as photovoltaic converters for solar radiation.

Abstract: An electroluminescent device includes at least one emissive diode emitting in the red. The emissive face of the diode is covered by a filter element which is substantially transparent in the red, and which has a light transmission coefficient in the blue which is significantly higher than its coefficient in the yellow and the green. The resulting device exhibits superior contrast in sunlight, and is thus particularly suitable for use in vehicle and aircraft dashboard displays.

Abstract: A method of manufacturing semiconductor devices using laser beam cutting is disclosed in which the surface debris or pollution resulting from the laser beam cutting operation is removed by a preferential etching treatment. Since the polluting particles are of nonmonocrystalline semiconductor material, while the underlying material of the semiconductor disc is monocrystalline in nature, the polluting particles may be selectively removed in an effective manner by preferentially etching the nonmonocrystalline material of the particles with respect to the monocrystalline material of the disc. This preferential etching treatment may advantageously be carried out prior to the severing of the semiconductor disc to form the individual semiconductor devices.

Abstract: A semiconductor device having a number of series-arranged photosensitive cells which are provided on a common substrate of a first conductivity type and which are separated by grooves extending down to the substrate. The cells consist of first regions of a first conductivity type which form planar photosensitive junctions with second regions of the second conductivity type. According to the invention, a highly doped layer of the second conductivity type is present between the substrate and the second region and each photosensitive cell is provided, along at least a part of its circumference, with a highly doped semiconductor zone of the second conductivity type which extends along the wall of the groove down to the highly doped layer and is separated from the adjacent cell by the substrate.

Abstract: A method of manufacturing a semiconductor device having a monocrystalline substrate and a plurality of epitaxial layers successively deposited on the substrate is disclosed. The device is manufactured by successively contacting the substrate with solutions which are previously saturated by contact with a plurality of auxiliary substrates, in a process in which the monocrystalline substrate, the auxiliary substrates and the solutions are cooled before the layers are deposited. The method includes the steps of contacting a first auxiliary substrate with a first solution, contacting a second auxiliary substrate with this first solution while simultaneously contacting the first auxiliary substrate with a second solution, contacting the monocrystalline substrate with the first solution to deposit a first layer thereon while simultaneously contacting a second auxiliary substrate with the second solution, and then contacting the monocrystalline with the second solution to deposit a second layer thereon.

Abstract: An integrated logic circuit includes an array of insulated gate field effect transistors formed at the crossings of a plurality of substantially parallel first conductor tracks which form the transistor gate electrodes and a plurality of substantially parallel strip-shaped surface regions which form the source and drain electrode regions of the transistors. The field effect transistors of the device include a first group of transistors having a first threshold voltage and a second group of transistors having a second threshold voltage different from the first. In order to make a more compact, easily-designed and easily-manufactured circuit, the conductor tracks and the strip-shaped surface regions form a nonuniform array in which the track and surface regions need not all be of the same length. Further efficiencies are achieved by branching the strip-shaped surface regions where appropriate to implement the desired logic combination.