Abstract: An amplifier circuit for sensing and refreshing stored information, utilized with a voltage supply. The amplifier is of the type that is capable of assuming first and second conditions in response to signals at first and second input nodes. The circuit comprises first and second cross coupled devices each capable of assuming a high and low conduction state. Restore circuitry means is provided connected between the active devices and the voltage supply for selectively connecting the supply solely to the device assuming a low conduction state. In a dynamic random access memory embodiment means is further provided for alternately precharging the nodes to a predetermined state and applying stored information to the nodes to cause the amplifier to assume first and second conditions in response to stored information.

Abstract: An electron source having good electron emission efficiency comprises a silicon or other semiconductor body (10) having an n-type first region (3) which is separated from an n-type or p-type second region (2) by a barrier. The barrier may be a p-n junction between p-type region (2) and the n-type region (3), or it may be a p-type region (1) forming p-n junctions with the n-type regions (2 and 3). By means of electrode connections (13 and 12) to the first and second regions (3 and 2) a potential difference (V) is applied across the barrier so as to bias the first region (3) positive with respect to the second region (2) and thereby to establish a supply of hot electrons (24) injected from the second region (2) across the barrier into the first region (3). These hot electrons (24) are emitted into free space (20) from a surface area (4) of the body (10) which may have a caesium coating (14) to reduce the electron work function.

Abstract: A semiconductor device, for example a power rectifier, formed in a semiconductor body has a contact area coated with a metal layer of, for example, gold. A metallic member is soldered to the layer with an alloy comprising at least 80% lead, the balance being indium and silver in a ratio of at least 4:1 and at most 10:1. One such solder which has good wetting characteristics for improved bond strength contains approximately 92% lead, 7% indium, and 1% silver.

Abstract: The invention relates to a charge-coupled SPS memory comprising a series input register, a parallel section and a series output register. In order to increase the retention time leakage current drain regions are provided beside the memory. Since the charge collected as a result of leakage current is largest during the transport through the outermost registers of the parallel section, only the sides of the parallel section are screened by the said draining regions which preferably consist of dummy registers. FIG. 1.

Abstract: An accumulation-mode bulk channel CCD converts an electromagnetic radiation pattern into electrical signals. The device body may be of monocrystalline silicon and has a radiation-sensitive region which is of a first conductivity type determined by a dopant (e.g. sulphur, platinum, indium or thallium) having an energy level or levels sufficiently deep in the semiconductor band gap that substantially all of said dopant atoms are un-ionized at the device operating temperature. By this means the region is substantially free of majority charge carriers in the absence of radiation, and majority charge carriers trapped by the dopant atoms can be released upon excitation by the radiation. A first ohmic contact to the region supplies majority charge carriers to the dopant to replace charge carriers released by the incident radiation.

Abstract: A field effect transistor of the V-MOS type has a layer-shaped first region (3) of a first conductivity type, a subjacent second region (2, 1) of the second conductivity type and an island-shaped zone (4) of the second conductivity type. A V-shaped groove extends through the zone (4) and the first region (3) into the second region (2, 1) and is coated with an insulating layer (6) and a gate electrode layer (8). According to the invention, an insulating filler material (7) is present on the lower side of the groove (5) between the gate electrode (8) and the bottom of the groove (5) in order to increase the breakdown voltage.

Abstract: A dynamic amplifier circuit, specifically for switched-capacitor filters, having a current source which supplies an exponentially-decreasing bias current. In addition, a current source is included for supplying an additional bias current in order to define the minimum bias current in the amplifier circuit.

Abstract: A substantially quadratic relationship between the channel current I.sub.DS and the gate voltage V.sub.GS is obtained over a substantial portion of the operating characteristic of a junction field effect transistor by the unique combination of two design features. First, a high-ohmic substrate sub-region is provided adjoining the channel region of the device, and second, the surface-adjoining source region is electrically connected to the underlying substrate. By using these two features, the value of the quantity .beta. is maintained substantially constant over the range of gate-to-source voltages of from zero volts to pinch-off.

Abstract: A programmable read-only memory includes a number of programmable memory cells, each of which is formed in a thin layer of semiconductor material which extends on an insulating layer of a semiconductor body. Each programmable memory cell includes a p-n junction diode and an electrically destructible programmation element which are integrally formed in the thin layer of semiconductor material. The programmation element includes a necked-down portion of the thin layer, and this element may also have a p-n junction. The resulting structure yields a memory cell which is simple, highly compact, and which can be easily and reliably manufactured by known methods.

Abstract: In a dynamic memory cell, the mutual cross-talk is considerably reduced by providing a diffused selection line below a layer of thick oxide (for example, LOCOS). As a result of this the capacitive coupling with other selection lines is considerably reduced, as is the capacity of the selection line with respect to channel stopping regions provided between the memory cells.

Abstract: A lateral junction field effect transister device includes both a surface semiconductor layer located between the gate and drain contact regions of the device and a buried semiconductor layer which extends beneath at least the drain contact region and the surface semiconductor layer of the device. The buried layer may be in the form of a continuous layer extending beneath the gate, source, and drain contact regions of the device as well as the surface semiconductor layer, or it may be provided in annular form with an aperture beneath the source and gate regions. The annular central buried layer configuration may further include an additional buried layer portion extending beneath the source region of the device. Devices having buried and surface layers in accordance with the invention feature improved high-voltage breakdown characteristics, enhanced conductivity in the "on" state, and the ability to operate in the source-follower mode.

Abstract: The channel region and gate region of a junction-type field-effect transistor have substantially the same outline and can be produced by successive implantation through the same mask. A highly doped contact zone ensures an ohmic connection between this gate region and the other portion of the gate formed by the part of the layer situated below the channel region. Such a transistor may have a low threshold voltage while being comparatively easy to manufacture, for example, in an integrated circuit with bipolar transistors. The contact zone may be formed simultaneously with a bipolar transistor emitter zone.

Abstract: A circuit arrangement includes an integrated semiconductor circuit with a plurality of connection leads in which stray capacitances with equal temperature coefficients exist between one connection lead and the two adjacent, second and third, connection leads. A voltage is present between the first and second connection leads, and produces a current through the stray capacitance between these connection leads. In order to cancel the effect of this temperature-dependent current, a compensation voltage is applied between the first and second connection leads, which compensation voltage causes a current which is equal and opposite to the current through the stray capacitance between the first and second connection leads to flow through the stray capacitance between the first and third connection leads.

Abstract: A semiconductor laser device has a semiconductor body in which two or more lasers are provided which can generate substantially parallel radiation beams of preferably different frequencies which are situated close together. According to the invention, the semiconductor body has at least one semiconductor laser of the double hetero-junction type (DH-type) comprising a plurality of semiconductor layers with a radiating p-n junction parallel to the semiconductor layers and at least one semiconductor laser of the TJS ("Transverse Junction Stripe") type, the p-n junction surface of which is transverse to that of the DH-laser. The device comprises a layer structure having at least two active layers, each between two passive layers. One laser is formed in a mesa-shaped part of the body which comprises both active layers, the other in an adjacent part in which the uppermost active layer is absent. The TJS-laser is preferably provided in the last-mentioned part. More than two lasers may also be provided.

Abstract: The invention relates to a semiconductor device having a disk-shaped semiconductor body in which on the side of a first major surface at least one circuit element is formed and in which a second major surface present opposite to the first major surface is covered with an adhesive layer on which at least one metal layer is provided, which metal layer is bonded to a carrier. According to the invention, the adhesive layer is formed of doped amorphous silicon of the same conductivity type as the semiconductor body on the side of the second major surface.

Abstract: A capacitance diode has a substrate of a first conductivity type, an epitaxial layer of the first conductivity type present thereon, a first zone of the first conductivity type diffused therein and a second surface zone of the second opposite conductivity type over said first zone and forming a p-n junction with the first zone. According to the invention, the doping profile in the first zone varies substantially according to the equation N(x)=N.sub.o e.sup.-.beta.x +N.sub.E, where N.sub.o is the doping concentration of the first zone at the p-n junction, N is the doping concentration of the epitaxial layer, and x is the distance from the p-n junction, and where N.sub.o <24 N.sub.E. As a result, a small frequency deviation is obtained, and this frequency deviation does not change sign.

Abstract: In a radiation-sensitive semiconductor element which is divided into a number of sub-elements, the surface potential in the sub-elements varies with incident radiation as a result of charge carriers generated by the radiation. As soon as an adjustable threshold value of this potential is reached in one or more of the sub-elements, a current starts to flow which is signalled by means of a detector and a detection unit. Because the speed of reaching the threshold value depends on the intensity of the radiation, the time measured between the adjustment of the threshold value and the signalling of the current is a measure of the radiation intensity. By means of such a semiconductor element, the associated detection unit and extra electronics, if any, the energy or the cross-section of a beam can be determined and be readjusted, if necessary. Such a semiconductor device can also be used very readily for focusing, for example in VLP apparatus.

Abstract: A CCD includes several juxtaposed channels for hole transport and electron transport. Each channel forms a lateral boundary for an adjacent complementary channel so that high density in combination with a simple structure can be obtained. The CCD channels may include a matrix of photosensitive elements of a solid state image sensor for a camera. The invention may also be used in memory matrices and other CCD devices.

Abstract: The invention relates to an integrated resistor formed in an epitaxial layer and provided with at least one tap. In order to reduce field effect action between the resistor and the epitaxial layer, the voltage on the two ends of the epitaxial layer underneath the resistor tracks the voltage on the two ends of the resistor. Moreover, the epitaxial layer is short-circuited by means of buried layers at the locations where the resistance layer also exhibits a short-circuit, such as underneath the contact area of the tap.

Abstract: An integrated circuit element which is laterally insulated by oxide includes a transistor and a resistor. The resistor is formed by an elongation of the base and includes an emitter of the transistor. A pinching zone is present beneath the emitter and is selectively doped with respect to a pinching zone located beneath a further emitter of the transistor. The integrated circuit element may be combined with another substantially identical element to form a compact memory cell.