Abstract: A direct thermal label and methods of making thereof are provided. In one embodiment, a direct thermal label comprising a first substrate and a thermal barrier coating is provided, wherein the first substrate has a thermally sensitive coating situated over the thermal barrier coating on at least a first side thereof.
Type:
Grant
Filed:
December 23, 2008
Date of Patent:
October 9, 2012
Assignee:
NCR Corporation
Inventors:
Mark E. Keeton, Paul C. Blank, Timothy W. Rawlings, David Jarvis
Abstract: The subject invention relates to a facer which is comprised of a breathable film and a glass mat, wherein the breathable film and the glass mat are bonded together with an adhesive, wherein the breathable film is comprised of a breathable polymeric material selected from the group consisting of polyolefins, nylons, polyesters, and thermoplastic elastomers, and wherein the facer is water resistant. The facers of this invention can be employed in manufacturing construction board, such as polyisocyanurate boards, polystyrene boards, or gypsum boards.
Type:
Grant
Filed:
June 15, 2010
Date of Patent:
October 2, 2012
Assignee:
Building Materials Investment Corporation
Abstract: A method of operating a nonvolatile memory device includes reading data stored in a main cell and a flag cell using a first read voltage, the nonvolatile memory device comprising the main cell for storing data including a least significant bit (LSB) and a most significant bit (MSB), and the flag cell for determining a program state of the main cell, determining a program state of the main cell based on the data read from the flag cell, reading data stored in the main cell and the flag cell using a second read voltage if a MSB page program has been performed on the main cell, and reading data stored in the main cell using a third or a fourth read voltage based on the data read from the flag cell using the second read voltage, if a threshold voltage of the main cell shifts.
Abstract: A multipath detector includes an RF module receiving multiple signals, and a correlator module receiving the signals from the RF module. The correlator module correlates the signals to create a composite ACF, and produces samples of the composite autocorrelation function (ACF). The samples are time delayed relative to each other. The multipath detector also includes a carrier phase processor that receives the samples and estimates carrier phases associated with each of the samples. The carrier phase processor employs the estimated carrier phases to determine if one of the signals is subject to a multipath delay.
Type:
Grant
Filed:
March 24, 2009
Date of Patent:
October 2, 2012
Assignee:
QUALCOMM Incorporated
Inventors:
Dominic Gerard Farmer, Jie Wu, Emilija M. Simic
Abstract: A nonvolatile memory device including a bit line voltage supply unit configured to supply a power source voltage, a second voltage in which a second reference voltage has been subtracted from a third reference voltage, or a third voltage in which a first reference voltage has been subtracted from the third reference voltage according to data stored in a first latch unit, a second latch unit, and a third latch unit included in a page buffer, and a bit line voltage setting unit configured to transfer a voltage of 0 V or an output voltage of the bit line voltage supply unit to a bit line according to the data stored in the first, second, and third latch units.
Abstract: A method for forming a hole pattern includes forming a hard mask layer for a hole pattern over an etch target layer, forming pillar patterns having a gap therebetween over the hard mask layer for a hole pattern, forming spacer patterns on sidewalls of the pillar patterns, removing the pillar patterns between the spacer patterns, and etching the hard mask layer for a hole pattern by using the spacer patterns as etch barriers.
Abstract: The invention relates to new salts of valsartan or crystalline, also partly crystalline and amorphous salts of valsartan, the respective production and usage, and pharmaceutical preparations containing such a salt.
Type:
Grant
Filed:
August 5, 2008
Date of Patent:
October 2, 2012
Assignee:
Novartis AG
Inventors:
Erwin Marti, Hans R Oswald, Peter Bühlmayer, Wolfgang Marterer
Abstract: A semiconductor memory device includes first and second sub-memory-cell areas configured to form a memory cell matrix and include a first bit line and a second bit line respectively to form a data transfer path corresponding to a predetermined memory cell, an additional bit line configured to cross the first sub-memory-cell area and form a data transfer path by being connected with the second bit line and a sensing and amplifying unit configured to sense and amplify data inputted through the additional bit line and the first bit line.
Abstract: An acrylic film including from 70% to 99%, by weight based on the weight of the film, of a certain multi-stage acrylic polymer and from 1% to 20%, by weight based on the weight of the film, pigment is provided. Also provided is a method for forming the acrylic film, a backsheet for a photovoltaic array that includes the acrylic film and a polyester layer, and a method for forming the backsheet.
Type:
Grant
Filed:
December 23, 2009
Date of Patent:
October 2, 2012
Assignee:
Rohm and Haas Company
Inventors:
Hailan Guo, Matthieu Olivier Sonnati, Robert Lee Post, David Elmer Vietti
Abstract: A method of performing a program verification operation in a nonvolatile memory device includes storing program data, programmed into a selected memory cell of a memory cell block, in a page buffer which is coupled to a bit line of the memory cell block via a sense node, controlling a voltage level of the sense node in response to a value of the program data, changing the voltage level of the sense node in response to a program state of the selected memory cell coupled to the bit line, and performing a program verification operation on the selected memory cell by sensing the voltage level of the sense node.
Abstract: A method for forming a device isolation layer of a semiconductor device or a non-volatile memory device is provided. A method for forming a device isolation layer of a semiconductor device includes: forming trenches having a first predetermined depth by etching a substrate; forming a first insulation layer having a second predetermined depth inside the trenches; forming a liner oxide layer having a predetermined thickness on internal walls of the trenches with the first insulation layer formed therein; and forming a second insulation layer for forming a device isolation layer over the substrate with the liner oxide layer formed therein, wherein the second insulation layer has a lower etch rate than that of the first insulation layer.
Type:
Grant
Filed:
May 28, 2009
Date of Patent:
October 2, 2012
Assignee:
Hynix Semiconductor Inc.
Inventors:
Jae-Hyoung Koo, Jin-Woong Kim, Mi-Ri Lee, Chi-Ho Kim, Jin-Ho Bin
Abstract: A cleaning implement comprises a modified open-cell foam with a density in the range from about 5 to about 1,000 kg/m3 and with an average pore diameter in the range from about 1 ?m to about 1 mm, comprising an amount in the range from about 1 to about 2,500% by weight, based on the weight of the unmodified open-cell foam, of at least about one water-insoluble polymer (b), selected from polystyrene, styrene copolymers, polybutadiene, butadiene copolymers, polyvinylesters, polyvinylethers, copolymers from (meth)acrylic acid with at least one (meth)acrylate, and polyurethanes, with the proviso that styrene-acrylonitrile-C1-C10-alkyl (meth)acrylate terpolymers, styrene-butadiene-n-butyl acrylate terpolymers, and styrene-maleic anhydride copolymers are excluded.
Type:
Grant
Filed:
December 19, 2006
Date of Patent:
October 2, 2012
Assignee:
The Procter & Gamble Company
Inventors:
Denis Alfred Gonzales, Iris Bogaerts, Karl Häberle, Wolfgang Schrof, Volker Schwendemann, Stefan Frenzel
Abstract: A wall module for the construction of a housing module comprises two beams, two primary studs, two bracing members, primary reinforcements and a plurality of secondary studs. The two beams are spaced apart and substantially parallel to each other. The two primary studs are perpendicularly connected between different extremities of the two beams so as to define four wall corners. The two bracing members are connected substantially diagonally between two different opposed wall corners. The primary reinforcements are located at the wall corners and are connect one of the two beams to one of the two primary studs and to one of the bracing members. The secondary studs are attached to the two beams and to at least one of the two bracing members. The wall module may further comprise a sheathing attached to the secondary studs and a finishing sheet attached to the sheathing in between the secondary studs.
Abstract: The disclosure herein provides beneficial systems, methods, devices, and apparatuses that enhance and/or analyze images, and that can be configured to provide users an assessment and/or recommendation based on the enhanced and/or analyzed images. In an embodiment related to medicine, the assessment and/or recommendation is based on a patient situation, dimensions of patient organs/lumens, or the like in order to achieve personalized medicine.
Type:
Grant
Filed:
March 5, 2009
Date of Patent:
September 25, 2012
Assignee:
Tyco Healthcare Group LP
Inventors:
Hussain S. Rangwala, Douglas James Duchon
Abstract: A nonvolatile memory device includes first and second registers configured to store parameters received via an input/output (IO) unit, a microcontroller configured to control an operation of the nonvolatile memory device according to the parameter stored in the first register, and a control logic unit configured to, when a parameter is received via the IO unit while the microcontroller performs an internal operation, store the received parameter in the second register.
Abstract: A shaft assembly using spring clips to confine components mounted on the shaft in selected positions. The shaft assembly includes a shaft with components mounted along its length. Each component is confined by a pair of flanking spring clips. Each spring clip has a pair of confronting side panels resiliently coupled together. Holes through the side panels receive the shaft. The side panels are biased to converge toward each other so that a laterally applied force from a confined component acts in the direction of the bias to prevent the clip locked on the shaft from unlocking.
Abstract: A method of communicating qualities to a consumer of a paper towel product where the method involves: providing a paper towel product having one or more qualities, identifying one or more communicative elements having one or more of the same qualities of the paper towel product, selecting a first communicative element by applying one or more selective criteria to the one or more communicative elements, providing a visual representation of the paper towel product and a visual representation of the first communicative element, and using the visual representations of the paper towel product and first communicative element to provide a quality communicative indicium.
Type:
Grant
Filed:
August 10, 2007
Date of Patent:
September 25, 2012
Assignee:
The Procter & Gamble Company
Inventors:
Richard Lee Conner, Laura Kathleen Weber, Jeffrey William Winkle
Abstract: A semiconductor device including an internal voltage generator circuit that provides an internal voltage having a different level depending on the operation speed is provided. The semiconductor device includes an internal voltage generator circuit configured to receive operation speed information to generate an internal voltage having a different level depending on the operation speed; and an internal circuit operated using the internal voltage.
Abstract: A semiconductor device includes a pads for receiving a reference voltage and input signals from an external device, a unit gain buffer for receiving the reference voltage as an input, input buffers for identifying a corresponding one of the input signals based on an internal reference voltage outputted from the unit gain buffer, external electrostatic discharge protectors connected to a transmission path of the reference voltage and transmission paths of input signals, and internal electrostatic discharge protectors connected to the transmission path of the reference voltage and the transmission paths of the input signals.
Abstract: Techniques for generating a differential output voltage between first and second output voltages that is double a differential input voltage between first and second input voltages. In one aspect, first and second capacitors of a constituent voltage doubler are charged to a differential input voltage during a charging phase. During an output phase non-overlapping in time with the charging phase, the first and second capacitors are stacked in series to generate the differential output voltage. The first and second capacitors are both coupled to a single common-mode voltage to provide a predefined common-mode output voltage. Further techniques for providing two or more constituent voltage doublers to extend the output phase are described.