Abstract: A method of sampling one or more respiratory profile characteristics and monitoring a variety of respiratory profile parameters. The sampled respiratory characteristics include respiratory flow rate, respiratory pressure, and partial pressure of at least one constituent of a patient's respiration. The method detects patient breaths, determines whether each breath is a spontaneous breath or a ventilator-induced breath, and calculates various respiratory profile parameters based on the sampled measurements. The method displays the respiratory profile parameters in graphic and numeric forms. Preferably, the method allows a user to select the displayed respiratory profile parameters.

Abstract: An inventive method for sorting integrated circuit (IC) devices of the type having a substantially unique identification (ID) code, such as a fuse ID, includes automatically reading the ID code of each of the IC devices, and sorting the IC devices in accordance with their automatically read ID codes. The inventive method can be used in conjunction with an IC manufacturing process that includes providing semiconductor wafers, fabricating the IC's on each of the wafers, causing each of the IC's to store its ID code, separating each of the IC's from its wafer to form IC dice, assembling the IC dice into IC devices, and testing the IC devices.

Abstract: A polycrystalline diamond layer attached to a cemented metal carbide structure used as a cutter in a drill bit wherein the cutter has improved toughness or fracture resistance during use through the inclusion of boron, beryllium or the like therein.

Abstract: An airway valve for re-breathing, a ventilator circuit including same and a method of operating the airway valve. The airway valve includes a housing having first and second primary passages extending through the wall thereof and mutually directly communicating within the housing through a spring-biased valve assembly in the form of first and second diaphragms respectively and simultaneously movable in tandem within the housing into and out of contact with first and second valve seats on a valve body with which the first primary passage communicates. The valve assembly also controls diversion of air flow between the first primary passage and the second primary passage into and through an enlarged volume defined by a re-breathing loop external to the housing via first and second diversion passages, which also extend through the wall of the housing.

Abstract: A method and resulting structure for reducing refraction and reflection occurring at the interface between adjacent layers of different materials in a semiconductor device, assembly or laminate during an alignment step in a semiconductor device fabrication process. The method comprises forming a first layer of material, having a first index of refraction, over a substrate of the semiconductor device, assembly or laminate. A corrective layer is formed over the first layer and a second layer, having a second index of refraction, is then formed over the corrective layer. The corrective layer is composed of a material having an intermediate index of refraction between the first index of refraction and the second index of refraction. The method can also be modified to include one or more layers of materials and/or intermediate refraction layers interposed between or above any of the aforementioned adjacent layers.

Abstract: An apparatus for rinsing and drying semiconductor wafers. The apparatus includes side walls, end walls and a base. One embodiment of the apparatus includes a rigid side and end walls. In another embodiment of the apparatus, at least a portion of the side wall is collapsible. In yet another embodiment of the apparatus, at least a portion of the wall has a tambour configuration, facilitating bending or rolling of the wall beneath the base. The apparatus includes an assembly for injecting a rinse liquid into the chamber. The side walls, end walls, and base form a chamber configured to receive at least one semiconductor wafer. Rinse liquid can be directed into the chamber, over each semiconductor wafer therein to rinse each semiconductor wafer. At least a portion of a side wall can be lowered substantially vertically to permit rinse liquid to flow out of the chamber. The apparatus also includes an assembly for injecting a drying fluid into the chamber.

Abstract: A first adhesively coated tape material length is supplied to a first die associated with a cutting and application mechanism. A second length of adhesively coated tape material is also provided to a second die of the cutting and application mechanism. A plurality of LOC leadframes is supplied sequentially through the application structure to apply a first decal cut from the first tape material to a first die site at a first location and to apply a second decal cut from the second tape material to a second die site at a second location.

Abstract: A semiconductor device, such as an integrated circuit die, includes a plurality of bond pads on an active surface thereof electrically connected to internal circuitry of the semiconductor device, and a plurality of jumper pads on the active surface which are electrically isolated from internal circuitry of the die. The jumper pads effectively provide stepping stones for wire bonds to be made across the active surface between bond pads. The jumper pads may be formed directly on the semiconductor device or on a non-conductive support structure that is attached to the semiconductor device.

Abstract: This invention is a process for forming an effective titanium nitride barrier layer between the upper surface of a polysilicon plug formed in thick dielectric layer and a platinum lower capacitor plate in a dynamic random access memory which is being fabricated on a silicon wafer. The barrier layer process begins by etching the upper surface of the polysilicon plug using a selective polysilicon etch until it is recessed at least 1000 .ANG. below the upper surface of the thick dielectric layer. Using a collimated sputter source, a titanium layer having a thickness of 100-500 .ANG. is deposited over the surface of the in-process wafer, thus covering the upper surfaces of the polysilicon plugs. A layer of amorphous titanium carbonitride having a thickness of 100-300 .ANG. is then deposited via low-pressure chemical vapor deposition. This is followed by the deposition of a reactively sputtered titanium nitride layer having a thickness of 1000-2000 .ANG..

Abstract: A modular bare die socket assembly 10 for attaching a plurality of miniature semiconductor dice 18 to a substrate. The socket assembly 10 is comprised of a plurality of two-sided plates 14 joined vertically in a horizontal stack, wherein each plate 14 has a die socket 22 for the removable insertion of a bare semiconductor die 18. A multi-layer interconnect lead tape 50 has a plurality of lithographically formed leads bent on one end to form nodes 88 for attachment to bond pads 90 on the removably inserted semiconductor die 18, and having opposing ends 92 connectable to the substrate.

Abstract: A method of manufacturing a drill bit or other drilling-related structure used for drilling into subterranean formations is herein disclosed where a blank is formed by placing a ferrous metal powder such as steel into a mold, sintering the ferrous metal powder to form a preformed blank, packing an abrasion- and erosion-resistant material such as tungsten carbide powder around the preformed blank, and infiltrating the preformed blank and tungsten carbide with a common binder such as a copperbased binder. For some materials, during sintering, the preformed blank may shrink in size relative to the mold enough to provide space between the mold and the preformed blank for a layer of abrasion- and erosion-resistant material. With other materials, a separate blank mold may be used to form the sintered blank which can then be inserted into the mold for infiltration.

Abstract: A conductive plastic lead frame and method of manufacturing same suitable for use in IC packaging. In a preferred embodiment, the lead frame is constructed of a plastic or polymer based lead frame structure with an intrinsic conductive polymer coating. In a second embodiment the lead frame is a composite plastic or polymeric material intermixed with an intrinsic conductive polymer coating.

Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical testing, it is possible to establish interconnection between the single die or separate and package dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.

Abstract: A semiconductor integrated circuit device, and method of manufacturing the same, having a conventional-type lead frame with the die paddle removed. In particular, the die paddle is replaced with a section of tape that is supported by the ends of the lead fingers. The semiconductor die is attached to the tape so that it may be wire bonded to the lead fingers. The tape contains at least one slot to allow for expansion and/or contraction of the tape due to various temperatures experienced during the manufacturing process so that the tape does not wrinkle or warp to alter the position of the die.

Abstract: A semiconductor device including bond pads disposed proximate an edge thereof, and an overcoat layer. The overcoat layer defines notches around each of the bond pads. The overcoat layer may be formed from a photoimageable material such as a photoimageable epoxy. The invention also includes an alignment device that secures the semiconductor device perpendicularly upon a carrier substrate. The alignment device includes intermediate conductive elements which correspond to the bond pads of the semiconductor device. Upon insertion of the semiconductor device into the alignment device, the notches facilitate alignment of the bond pads with their corresponding intermediate conductive elements. The intermediate conductive elements establish an electrical connection between the semiconductor device and the carrier substrate.

Abstract: A multi-chip module (MCM) and method of manufacturing is disclosed that provides for attachment of semiconductor dice to both sides of the MCM printed circuit board (PCB). Semiconductor dice attached to the top surface of the PCB may be attached by conventional wire bonding, TAB or flip chip methods whereas those semiconductor dice attached to the bottom surface of the PCB are wire bonded or TAB connected to the top surface through openings in the PCB. The openings provide a lead-over-chip (LOC) arrangement for those semiconductor dice attached to the bottom surface, resulting in shortened wire bonds. The bottom surface of the PCB may be provided with die recesses into which the openings extend to receive the dice and bring their active surfaces even closer to the top surface of the PCB for wire bonding.

Abstract: An LOC die assembly is disclosed including a die dielectrically adhered to the underside of a lead frame. An underfill material is introduced between each lead finger and semiconductor die, extending from the bonding location of the die and the edge of the die, in order to prevent filler particles from lodging between the leads and the active surface of the die during transfer molding of a plastic encapsulant. The seal created by the underfill material reduces point stresses on the active surface of the die usually caused by the filler particles. The decreased flexure in the leads further enhances the locking of the leads in position with respect to the die.

Abstract: Multi-chip module systems and method of fabrication thereof wherein the equivalent of a failed die of a multi-chip module (MCM) is added to the module in a vacancy position previously constructed with appropriate electrical connections. A variety of different dice may be attached to the same vacancy position of an MCM by means of adapters, wherein each adapter has the same footprint, but different adapters are capable of accommodating different numbers and types of dice.

Abstract: A socket that secures bare and minimally packaged semiconductor devices substantially perpendicularly relative to a carrier substrate. The socket includes intermediate conductive elements and a member which moves the intermediate conductive elements between an insertion position and a biased position. After placement of the intermediate conductive elements into an insertion position, a semiconductor device may be inserted into a receptacle of the socket with minimal insertion force. Movement of the member to a biased position facilitates biasing of the intermediate conductive elements against a bond pad of the semiconductor device. The intermediate conductive elements establish an electrical connection between the semiconductor device and the carrier substrate. A first embodiment of the socket includes a member which moves transversely relative to the remainder of the socket. In a second embodiment of the socket, the member moves vertically relative to the socket body.

Abstract: A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical test equipment. A rigid substrate has conductors thereon which establish electrical contact with the wafer. The test fixture need not be opened until the burn-in and electrical test are completed. After burn-in stress and electrical testing, it is possible to establish interconnection between the single die or separate and package dice into discrete parts, arrays or clusters, either as singulated parts or as arrays.