Patents Represented by Attorney, Agent or Law Firm Werner H. Stemer
  • Patent number: 6824949
    Abstract: There are disclosed polybenzoxazole precursors which can be processed by centrifugal techniques, which can be cyclized to polybenzoxazoles on substrates without difficulty, and which after cyclization to polybenzoxazoles exhibit a high temperature stability. In particular, these precursors and the polybenzoxazoles prepared from them possess high resistance against the diffusion of metals.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: November 30, 2004
    Assignee: Infineon Technologies AG
    Inventors: Jörg Haussmann, Gerhard Maier, Günter Schmid, Recai Sezi
  • Patent number: 6825079
    Abstract: In order to form an oxide cover on a conductive filling in a trench in a semiconductor substrate an HDP oxide is deposited on the conductive filling using a PECVD method. In this case, the layer thickness on the horizontal surface of the conductive material is greater than the layer thickness on the sidewalls of the trench. Furthermore, the layer thickness is limited in such a way that the surface of the HDP oxide within the trench has a depth with respect to the surface of the semiconductor substrate surrounding the trench, or a layer disposed thereon. In a subsequent CMP step, the HDP oxide is removed from the surrounding surface. In an isotropic etching step, the HDP oxide is removed from the sidewalls. The result is a horizontal insulation layer with a layer thickness that varies only to a slight extent over the semiconductor substrate.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: November 30, 2004
    Assignee: Infineon Technologies AG
    Inventor: Martin Popp
  • Patent number: 6823777
    Abstract: An apparatus for compressing objects includes a base plate, a frame and a ram head guided so as to be displaceable on the frame. Forces may occur in the peripheral direction of the ram head during the compression of bulky objects. The ram head is rotatable relative to the frame in order to reduce the forces introduced into the frame.
    Type: Grant
    Filed: October 22, 2001
    Date of Patent: November 30, 2004
    Assignee: Framatome ANP GmbH
    Inventors: Klaus Blinn, Manfred Klapper, Viktor Gliha
  • Patent number: 6826190
    Abstract: A method for controlling a network node and a network having several nodes and terminals. The network node has a plurality of interfaces. One incoming data stream is forwarded from the network node to one of a further network node and a terminal, the network node maintains and stores a connection data stock with connection-related information used to control existing connections to other network nodes, and the connection data stock indicates a data stream designator for an interface and a data stream that is incoming or outgoing at the interface and a data stream direction. Another method uses one terminal as a data source and one as a datasink, each network node forwarding one incoming data stream to one of another network node and a terminal and maintaining a connection data stock with information used to control existing connections to other network nodes, including a data stream designator and a network node interface.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: November 30, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventor: Bernhard Petri
  • Patent number: 6825116
    Abstract: A method for removing structures from a substrate is described. The method includes providing a substrate that has the structures that must be removed, applying a sacrifice layer, and removing the structures and the sacrifice layer in a polishing step. The method has the advantage that the sacrifice layer surrounds the structures that must be removed and stabilizes them, so that the structures can be eroded slowly and successively in the subsequent polishing step without breaking off. This prevents a smearing of the material of the structures such as occurs given direct polishing without a sacrifice layer.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: November 30, 2004
    Assignee: Infineon Technologies AG
    Inventors: Gerhard Beitel, Mattias Ahlstedt, Walter Hartner, Günther Schindler, Marcus Kastner, Volker Weinrich
  • Patent number: 6826075
    Abstract: A memory matrix has at least one cell array including column lines and row lines. Memory elements are situated at points where the row lines and column lines intersect one another. In each case two adjacent lines are guided such that they cross one another in such a way that the two lines change their spatial configurations in sections along the direction in which they run. Thus an overcoupling of signals between the lines is minimized.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: November 30, 2004
    Assignee: Infineon Technologies AG
    Inventors: Dietmar Gogl, Thomas Röhr, Heinz Hönigschmid
  • Patent number: 6824456
    Abstract: A polish head for Chemical Mechanical Polishing includes a backing film of silicone on a rigid support element, preferably, of amorphous ceramic. The silicone backing film is fabricated by molding, thereby enabling an appropriate cross-sectional shape for specific polishing needs. The head provides a uniform polishing of a semiconductor wafer.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: November 30, 2004
    Assignee: Infineon Technologies SC300 GmbH & Co. KG
    Inventors: Katrin Ebner, Walter Glashauser
  • Patent number: 6825549
    Abstract: An electronic component with external flat conductors and a method producing the component includes placing the external flat conductors as waveguides with a defined characteristic impedance on an underside of a dielectric body. The external flat conductors on the underside are surrounded in a coplanar manner by an electrically conductive layer, and a closed, electrically conductive covering layer is disposed on an opposite upper side of the dielectric body.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: November 30, 2004
    Assignee: Infineon Technologies AG
    Inventor: Gerold Gründler
  • Patent number: 6823792
    Abstract: A multi-motor drive for a printing press having a plurality of printing unit groups, includes at least one motor provided for each of the printing unit groups, and gear trains via which the printing unit groups are synchronously driven. The gear trains are mechanically separated from one another during a printing operation. The at least one motor is assigned to a respective separation location between the printing unit groups. A method for driving a printing press is also provided.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: November 30, 2004
    Assignee: Heidelberger Druckmaschinen AG
    Inventors: Bertold Grützmacher, Stefan Maier, Matthias Nöll
  • Patent number: 6825682
    Abstract: A test configuration for the functional testing of a semiconductor chip is described. The semiconductor chip, which can be subjected to a functional test for the purpose of checking the functionality of the semiconductor chip, is disposed on a support material. The semiconductor chip contains a self-test unit for generating test information and for carrying out the functional test. An energy source serves for providing an electrical energy supply from energy that is fed in contactlessly. The energy source is disposed on the support material and is connected to the semiconductor chip for the purpose of providing an energy supply on the semiconductor chip. The test configuration makes it possible to carry out a contactless functional test and to reduce the test costs by virtue of high parallelism during the functional test of a plurality of semiconductor chips.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: November 30, 2004
    Assignee: Infineon Technologies AG
    Inventors: Dieter Kantz, Jochen Müller
  • Patent number: 6824451
    Abstract: A process is described for the chemical mechanical machining of semiconductor wafers. A plurality of surfaces are successively subjected to a polishing step, in which they are brought into contact with a polishing device. The polishing device contains a polishing-grain carrier with polishing grains, and the surfaces are moved relative to the polishing device. Material is removed from the surface by the polishing grains, which are fixed in the polishing-grain carrier and may become partially detached from the carrier material during the polishing operation. In each case one or more polishing steps is preceded by a conditioning step for regeneration of the polishing device. The polishing device and a conditioning surface of strong structure are brought into contact with one another and moved relative to one another, with the result that starting states of the polishing-device surface at a beginning of the individual polishing steps are comparable with one another.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: November 30, 2004
    Assignee: Infineon Technologies AG
    Inventors: Mark Hollatz, Andreas Römer
  • Patent number: 6821863
    Abstract: A semiconductor component has a cavity formed in a monocrystalline silicon substrate. The wall of the cavity is covered by a cover layer, at least in an upper collar region, and a covering layer is then applied to the surface of the silicon substrate using a selective epitaxial growth method. The cavity is thereby covered in the process. The method is physically simple and can be carried out cost-effectively. In particular, the described method can be used in order to cover a trench prior to high-temperature processes during the production of a DRAM memory, and to open the trench once again after the high-temperature processes, in order to provide a trench capacitor.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: November 23, 2004
    Assignee: Infineon Technologies AG
    Inventors: Martin Popp, Dietmar Temmler, Kristin Schupke, Uwe Schilling, Kerstin Pomplun
  • Patent number: 6822923
    Abstract: A RAM memory circuit and method for controlling the same includes memory cells disposed in a matrix of rows and columns each addressed for writing in/reading out a datum by activation of a word line assigned to a relevant row and connection of a sense amplifier assigned to a relevant column to a data path. A control device can be set by an immediate-write command, commanding the write operation, to initiate connection of the sense amplifiers selected by the column addresses provided to the data path at an instant ta+Tw, where ta is the instant of activation of the word line selected by a row address provided and Tw is less than a charging time Tc specific to the memory circuit and is necessary, starting from a word line activation, to transfer the datum stored in a memory cell of the relevant row to the respectively selected sense amplifier and amplify it there.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: November 23, 2004
    Assignee: Infineon Technologies AG
    Inventors: Johann Pfeiffer, Helmut Fischer
  • Patent number: 6822916
    Abstract: As a consequence of DRAM memory cell miniaturization, the available space for read/write amplifiers decreases in width from hitherto 4 bit line grids to 2 bit lines grids. Conventionally previously known read/write amplifiers cannot be accommodated on this reduced, still available space. Therefore, it has not been possible hitherto to provide read/write amplifiers arranged beside one another which would manage with the novel DRAM memory cell spacings. The principle underlying the invention is based on replacing at least some of the transistors of conventional design which are usually used for read/write circuits by “vertical transistors” in which the differently doped regions are arranged one above the other or practically one above the other. Compared with the use of conventional transistors, the use of vertical transistors saves enough space to ensure an arrangement of a read/write circuit in the grid even with a reduced grid width.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: November 23, 2004
    Assignee: Infineon Technologies AG
    Inventors: Alexander Frey, Werner Weber, Till Schlösser
  • Patent number: 6822399
    Abstract: A half-bridge circuit includes: a vertically designed n-conducting first MOS transistor that is integrated in a first semiconductor body having a front side and a rear side; and a vertically designed p-conducting second MOS transistor that is integrated in a second semiconductor body having a front side and a rear side. The first and second transistors are connected in series between a first connection terminal and a second connection terminal. The half-bridge circuit also includes a drive circuit for driving the first and second transistors. The first and second transistors are applied to a common connection plate.
    Type: Grant
    Filed: January 24, 2002
    Date of Patent: November 23, 2004
    Assignee: Infineon Technologies AG
    Inventors: Martin Feldtkeller, Andreas Kiep
  • Patent number: 6822669
    Abstract: A method and a multibeam scanning device for ablation of a surface on a rotating drum by laser engraving with a multi-spot array includes simultaneously emitting laser beams from fiber exits disposed beside one another, dividing up each of the beams, after emerging from the exit in an AOM array having a number of AOMs corresponding to the number of exits, into two or more partial beams modulated independently of one another, imaging the exits with an optical system on the surface, and moving the exits, the AOM array, and the optical system together in a drum axial direction while the surface is scanned by the multi-spot array in a drum circumferential direction to make possible, without increasing the number of fiber lasers, an increase in the number of scanning points of the multi-spot array and a reduction of the space required by the scanning device.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: November 23, 2004
    Assignee: Heidelberger Druckmaschinen AG
    Inventors: Jörg-Achim Fischer, Axel Gebhardt, Thomas Jacobsen, Peter Ressel, Dirk Steinke
  • Patent number: 6822559
    Abstract: A security system for a motor vehicle is described. The security system has at least one sensor for sensing a status variable of the motor vehicle, a security device for disabling or enabling use of the motor vehicle, and a control unit, connected at the input end to the sensor and at the output end to the security device. The control unit disables activation of the security device as a function of the status variable, in order to prevent incorrect operation. The control unit has a logic circuit that not only blocks the security device preventing activation, as a function of the status variable, but also activates the security device as a function of the status variable, independently of a user intervention.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: November 23, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventors: Klaus Hofbeck, Wolfgang Piesch
  • Patent number: 6821693
    Abstract: A method for adjusting (aligning) a multilevel phase-shifting mask or a multilevel phase-shifting reticle with the aid of at least one alignment mark provided on the mask or the reticle includes the steps of applying or introducing at least two alignment marks onto or into the substrate of the mask or of the reticle in a first step before the first exposure step of the mask or of the reticle, in a second step, coating at least the alignment marks produced in the first step and the regions immediately surrounding them with a thin conducting layer, and, for all following alignment steps of the plurality of mask levels, raster-scanning these alignment marks applied in the first step with an uncharged or charged particle or photon beam.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: November 23, 2004
    Assignee: Infineon Technologies AG
    Inventors: Gernot Goedl, Dirk Loeffelmacher, Timo Wandel
  • Patent number: 6822941
    Abstract: An explanation is given of a method for operating a telecommunications network in which a network element at a network node of a telecommunications network is controlled by a switching computer. Event messages containing details about events occurring during the operation of the computer are generated in the computer. In the course of relaying the event messages, a sequence of destinations is used in which each destination occurs only once. Conditions for the destinations are tested using the details in the event messages in the order prescribed by the sequence.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: November 23, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventor: Michael Frank
  • Patent number: D498972
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: November 30, 2004
    Assignee: BSH Bosch und Siemens Hausgerate GmbH
    Inventor: Rolf Feil