Abstract: A tile (10) having a plurality of grooves (22). An array of tiles (10) is assembled by placing at least two tiles (10) in generally opposing relationship to one another, with the grooves (22) substantially juxtaposed to define wells (38). When intended for incorporation into a device (40), such as a display device, a conductive interconnect (36) is formed in the wells (38). Devices include a base substrate (40), a first plate (46) and a second plate (48). A first member (50) may be employed to separate the base substrate (40) from the first plate (46). A second member (52) may be employed to separate the first plate (46) from the second plate (48).

Abstract: A high quality epitaxial layer of monocrystalline Pb(Mg,Nb)O3—PbTiO3 or Pb(Mg1−xNbx)O3—PbTiO3 can be grown overlying large silicon wafers by first growing an strontium titanate layer on a silicon wafer. The strontium titanate layer is a monocrystalline layer spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide.

Abstract: An enhanced conductive probe that facilitates the gathering of data and a method of fabricating the probe. The probe includes an amplifier fabricated to define the probe tip. More particularly, the probe structure is defined by an amplifier formed as one of a metal oxide semiconductor (MOS) transistor, a bipolar amplifier, or a metal semiconductor field effect transistor (MESFET), thereby providing for the amplification of the input signal and improved signal to noise ratio during operation of the probe tip.

Abstract: A method of fabricating a field effect transistor including doping a continuous blanket layer in a semiconductor substrate structure adjacent the surface to include a source area and a drain area spaced from the source area. A high dielectric constant insulator layer is positioned on the surface of the semiconductor substrate structure overlying the continuous blanket layer to define a gate area between the source and drain areas. A gate contact on the insulator layer is selected to provide a work function difference that depletes the doped layer beneath the insulator layer. Further, the doped layer depth and dosage are designed such that the doped layer is depleted beneath the insulator layer by the selected work function difference of the gate contact and the semiconductor substrate.

Abstract: An improved and novel magnetic element and fabrication method. The magnetic element (10;30) including a bottom pinned ferromagnetic layer (12;32) and a top pinned ferromagnetic layer (20;40) fabricated antiparallel to one another. The magnetic element (10;30) further including a bottom tunnel barrier layer (14;34), a free ferromagnetic layer (16;46 and 48) and a top tunnel barrier layer (18;38) formed between the bottom pinned ferromagnetic layer (12;32) and the top pinned ferromagnetic layer (20;40). The structure is defined as including two (2) tunnel barrier layers in which one tunnel barrier layer is normal (18) and one is reversed (14), or a structure in which the two tunnel barrier layers are of the same type (34; 38) with the structure further includes a SAF structure (36) to allow for consistently changing magnetoresistance ratios across both tunnel barriers. The magnetic element (10;30) having an improved magnetoresistance ratio and a decrease in voltage dependence.

Abstract: A fuel cell array apparatus and method of forming the fuel cell array apparatus including a base portion, formed of a singular body, and having a major surface. At least two spaced apart membrane electrode assemblies formed on the major surface of the base portion. A fluid supply channel is defined in the base portion and equally communicating with each of the at least two spaced apart membrane electrode assemblies for supplying a fuel-bearing fluid to each of membrane electrode assemblies. An exhaust channel is defined in the base portion and equally communicating with each of the membrane electrode assemblies. Each of membrane electrode assemblies and the cooperating fluid supply channel and cooperating exhaust channel forms a single fuel cell assembly.

Abstract: A method of fabricating a high vacuum display with flat form factor, and the display, include an envelope with two major, parallel spaced apart glass sides and a continuous edge therebetween. An opening is formed through one of the glass sides of the envelope. A plate is provided with an area larger than the opening in the envelope. A button with an area slightly smaller than the opening may be formed on one side of the plate. A low temperature melting material is positioned on the plate around the button and the envelope is positioned in a substantial vacuum. The button is placed in the opening with the plate abutting the glass side outside of the envelope and the low temperature melting material is melted using heat and/or pressure to sealingly engage the button within the opening.

Abstract: A microelectromechanical system (MEMS) switch assembly (10) and a method of forming the MEMBS switch assembly (10) is provided that includes a switching member (12) having a first portion (34) that is at least partially formed with a first material having a first dielectric constant and a second portion (36) that is at least partially formed with a second material having a second dielectric constant. Furthermore, the switching member (12) further includes a first lead (14) spaced apart from a second lead (16) for contacting the switching member (12). In operation, the switching member (12) is configured for movement such that the first portion (34) and second portion (36) of the switching member (12) can provide variable electrical connections between the first lead (14) and second lead (16).

Abstract: A non-volatile, bistable magnetic tunnel junction cache memory including a cache tag array and a cache data array. The cache tag array includes non-volatile magnetic memory tag cells arranged in rows and columns. Each row of the tag array includes a word line and a digit line associated with each tag cell in the row. The cache data array includes non-volatile magnetic memory data cells arranged in rows and columns. The rows of the data array correspond with the rows of the tag array and each row of the data array is magnetically associated with the word line and the digit line associated with each corresponding row of the tag array.

Abstract: A high power SAW device includes an electrode positioned on a piezoelectric substrate. The electrode includes a bonding layer of material deposited on and bonding with the substrate and a conductive structure, of at least one layer of material, overlying the bonding layer and fixedly bonded to the substrate by the bonding layer. The conductive structure includes aluminum and an alloy metal with the alloy metal being in a range from approximately 1% by weight to a percent providing for a fravorable trade-off of resistivity versus mechanical properties. The alloy metal is selected from elements in one of the IV and VI columns of the periodic table, e.g. titanium, molybdenum, chromium, and tungsten.

Abstract: A sparse-carrier device including a crystal structure (10) formed of a first material and having a crystallographic facet (26) with a width (w) and a length and quantum dots (30) formed of a second material and positioned in at least one row on the crystallographic facet (26). The at least one row of quantum dots (30) extends along the length of the crystallographic facet (26) and is at least one quantum dot (30) wide (w) and a plurality of quantum dots long. The number of quantum dot rows determined by the width (w) of the crystallographic facet (26). The row of quantum dots (30) form a building block for circuits based on sparse or single electron devices.

Abstract: The MRAM architecture includes a data column of memory cells and a reference column, including a midpoint generator, positioned adjacent the data column on a substrate. The memory cells and the midpoint generator include similar magnetoresistive memory elements, e.g. MTJ elements. The MTJ elements of the generator are each set to one of Rmax and Rmin and connected together to provide a total resistance of a midpoint between Rmax and Rmin. A differential read-out circuit is coupled to the data column and to the reference column for differentially comparing a data voltage to a reference voltage.

Abstract: A field emission display (100) includes a cathode assembly (102), an anode plate (104), and a spacer (108), which extends between the cathode assembly (102) and the anode plate (104). The spacer (108) is comprised of a spacer material having a dielectric constant less than 100. A discharging period neutralizes positive electrical charge (244) and renders the spacer (108) invisible to a viewer of the field emission display (100). Operating a field emission display (100) to render a spacer (108) invisible by providing a cathode, assembly (102), an anode plate (104), and a spacer (108) comprised of a spacer material with a dielectric constant less than 100 and neutralizing positive electrical charge (244) on spacer (108).

Abstract: Method and apparatus rejecting out-of-class inputs for pattern classification including a list of patterns with at least one in-context pattern and a rank tolerance. An input pattern is used to generate a classifier score for each pattern in the list and the classifier scores are ranked in decreasing order. The highest ranking score for an in-context pattern is determined and if the highest ranking score is 1 the in-context pattern is selected. If the highest ranking score is not 1 it is compared to the rank tolerance. When the highest ranking score is less than the rank tolerance the in-context pattern is selected and when the highest ranking score is greater than the rank tolerance the in-context pattern is rejected. Cohorts of the highest ranking pattern are removed from the list prior to the comparison.

Abstract: Methods and apparatus (40) of amplifying a telecommunication signal (41) are provided in accordance with the present invention. The apparatus (40) comprises an input transmission line (48) configured to receive the telecommunication signal (41), an output transmission line (50) configured to provide an amplified output of the telecommunication signal (41) and N amplifier sections (42, 44, 45, 46) having a transistor (52) connected to the input transmission line (48) and the output transmission line (50). The apparatus (40) further comprises a waveform controller (84) connected to the transistor 52 and also configured to identify a signal level of the telecommunication signal 41.

Abstract: A high quality epitaxial layer of monocrystalline Pb(Zr,Ti)O3 can be grown overlying large silicon wafers by first growing an strontium titanate layer on a silicon wafer. The strontium titanate layer is a monocrystalline layer spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide.

Abstract: A magneto-electronic component includes an electrically conductive layer (310, 410) for generating a magnetic field and having a length (301, 401) and a width (302, 402) substantially perpendicular to and substantially smaller than the length. The magneto-electronic component also includes a ferromagnetic cladding layer (320, 420) located adjacent to the electrically conductive layer. The ferromagnetic cladding layer has a shape anisotropy substantially parallel to the length of the electrically conductive layer and also has an induced anisotropy that is non-parallel to the shape anisotropy.

Abstract: A magneto-electronic component includes an electrically conductive layer for generating a magnetic field, a ferromagnetic cladding layer adjacent to the electrically conductive layer, and an antiferromagnetic layer adjacent to the ferromagnetic cladding layer.

Abstract: An integrated filter circuit and a method of fabrication are disclosed, wherein the integrated filter has an input and an output parasitic shunt impedance. Input and output electrical components are coupled to the input and output terminals, respectively, to reduce the input and output parasitic shunt impedances. The input and output electrical components each include one of a coil, a section of transmission line, a coil and tuneable capacitance connected in a series tuned circuit, or a coil and tuneable capacitance connected in a parallel tuned circuit.

Abstract: A field emission device (100) includes a cathode (110) and a ballast resistor (112) connected to cathode (110). Ballast resistor (112) includes a thin metallic layer (113) and a protective layer (114) disposed on metallic layer (113). Metallic layer (113) is made from chromium and has a thickness of about 40 angstroms. Protective layer (114) is made from sputtered silicon and has a thickness of about 500 angstroms. A portion of metallic layer (113) makes physical contact with cathode (110) and is sandwiched between cathode (110) and protective layer (114). Protective layer (114) is positioned to shield metallic layer (113) from high transient voltages.