Abstract: A semiconductor device package having a substrate, one or more semiconductor devices mounted on the top surface of the substrate, a heat sink having a surface in opposed spaced parallel relation to the top surface of the substrate, and at least one deformable heat transfer member positioned between a device mounted on the top surface of the substrate, and the surface of the heat sink. The heat transfer member is comprised of a porous block of material, and a heat conductive non-volatile liquid retained within the block of material by a surface tension. The heat transfer member being operative to transfer heat from the device to the heat sink.

Abstract: A sensing apparatus for determining the precise location of a conductive feature on an insulating substrate which has a base, a plurality of flexible flat elongated contact blade elements having end portions for contacting and establishing electrical contact to a conductive surface feature, insulating means between the blade elements, and a base member for supporting the blade elements in a bowed condition with the end portions arranged in a plane parallel to the plane of the top surface of the insulating substrate.

Abstract: In a high density solenoid operated multiple punch apparatus, having a punch head provided with the plurality of closely-spaced large bores arranged in column and rows that extend partially through the punch head from the top side, solenoid elements mounted in the large bores, a plurality of holes with a diameter smaller than the large bores aligned with the large bores and extending the remaining distance through the punch head to the bottom side, push rod elements slidably disposed in the holes actuated by the solenoid elements, the improvement beingA cooling system for the punch head which includes a plurality of small bores arranged in rows in the bottom of the punch head terminating short of the top surface and positioned in the area between the plurality of large bores, a plurality of elongated grooves in the bottom surface of the head located between rows of the plurality of holes and forming a recessed chamber connecting a row of the small bores, a plate seated in each of the elongated grooves with ea

Abstract: A liftoff process for selectively depositing additional metal layers on an existing metallurgy pattern supported on a dielectric substrate which includes the steps of (1) depositing a melt material on the dielectric substrate which material, after melting, has the characteristic of wetting the substrate surface, but not the existing metallurgy pattern, (2) heating the melt material to convert it to a liquid wherein the material is distributed to cover the dielectric substrate surface, but not the metallurgy pattern, (3) cooling the liquid material to solidify it, (4) depositing a blanket layer of metal over the solidified material and the metallurgy pattern, and (5) dissolving the solidified material in a suitable solvent thereby removing the material and the overlying metal layer portions.

Abstract: A method of fabricating a semiconductor device mounting element embodying a wire fan-out wherein the ends of a plurality of insulated wires are supported in a spatial parallel arrangement of columns and rows between two spaced apertured die elements, the spacing of the wires is reduced at a first location between the die elements while maintaining the spatial arrangement of columns and rows, forming an enclosure about the wire portions positioned adjacent one of the die elements and the location where the spacing of the wires is reduced, injecting an organic hardenable resin material into the enclosure thereby encapsulating the wires positioned within, severing the wires, and removing the die.

Abstract: A high performance package for integrated circuit semiconductor devices in which decoupling capacitors are provided in close proximity to the integrated circuit devices for reducing voltage variations in the power driver lines, and/or a ground plate overlying the stripe metallurgy on the surface of the substrate for reducing cross-talk between signal lines. The decoupling capacitors are each comprised of a conductive layer on the inside of a via hole, a concentric dielectric layer on the conductive layer, and an electrically conductive plug in physical contact with the dielectric layer that is associated with the driver line circuitry of the package.

Abstract: An improved field effect transistor device in a monocrystalline semiconductor body provided with source and drain regions and a gate electrode disposed over the channel between the source and drain regions wherein at least the drain region is formed of a first region where the impurity concentration increases with depth with the peak concentration being spaced inwardly from the major surface, and a second region located within the first region having a peak impurity concentration at the major surface. The drain region structure in operation promotes the current flow between the source and drain to flow deeper in the channel region and spaced from the gate dielectric layer.In the method for forming the field effect transistor, an impurity is introduced into the semiconductor body underlying at least the ultimate drain region, an epitaxial semiconductor layer deposited, and a second impurity region formed over the first region to form the drain contact.

Abstract: A method of sensitizing surfaces which at least include areas of copper for subsequent electroless plating wherein the surface to be sensitized is processed with a sensitizing bath which includes precious metal ions, stannous ions in stoichiometric surplus, a haloid acid, and a complex forming compound for copper ions.

Abstract: A method of improving the adherence of conductive metallic lines to a polyimide resin layer by incompletely curing the polyimide resin prior to deposition of the metal layer, and subsequently completely curing the polyimide resin layer after the metal layer is deposited.

Abstract: A process for fabricating devices having overlapping heavily doped impurity regions of opposite conductivity wherein the formation of crystallographic faults emanating from the overlapping regions is eliminated. It has been discovered that crystallographic faults can be avoided by limiting the total N and P impurity concentrations in the overlapped regions. The process includes forming in the semiconductor substrate a first arsenic doped region having a maximum impurity concentration in the range of 5.times.10.sup.20 to 3.times.10.sup.21 atoms/cc, and forming in the silicon substrate a second adjacent boron doped region in partial overlapping relation to the first region having a maximum impurity concentration in the range of 5.times.10.sup.19 to 3.times.10.sup.20 atoms/cc.

Abstract: In this process of producing a bipolar transistor, all the regions of the device except the emitter region are formed by ion implantation through an inorganic dielectric layer of uniform thickness. Subsequently, all the contact openings to the emitter, base and collector are formed and the emitter is implanted through the emitter contact opening. This unique combination of process steps permits the use of a surface insulating dielectric layer of uniform thickness, wherein all capacitances are uniform and controllable while still permitting direct implantation of the emitter, which, because of its shallow depth is difficult to implant through an oxide.

Abstract: An improved field effect transistor device in a monocrystalline semiconductor body provided with source and drain regions and a gate electrode disposed over the channel between the source and drain regions wherein at least the drain region is formed of a first region where the impurity concentration increases with depth with the peak concentration being spaced inwardly from the major surface, and a second region located within the first region having a peak impurity concentration at the major surface. The drain region structure in operation promotes the current flow between the source and drain to flow deeper in the channel region and spaced from the gate dielectric layer.In the method for forming the field effect transistor, an impurity is introduced into the semiconductor body underlying at least the ultimate drain region, an epitaxial semiconductor layer deposited, and a second impurity region formed over the first region to form the drain contact.

Abstract: An apparatus for printing a paste pattern on a ceramic green sheet having a loading station, a printing station, a stencil mask at the printing station, a carrier for supporting a green sheet, a means to align a green sheet in a given reference position on the carrier, a means to move the carrier horizontally from the loading station to a position beneath the printing station and vertically to a position to be printed beneath the stencil mask, and back to the loading station in the reverse movement order, extruding means at the printing station to print a pattern of paste material through the stencil mask on the surface of a green sheet.

Abstract: A connector for forming a plurality of electrical wiring connections having a first mateable coupling member with a flat surface and a plurality of openings arranged in a predetermined configuration, a plurality of headed elements disposed in the openings, a second mateable coupling member provided with a flat surface, a set of elongated axially flexible metal buckling beam elements supported on the mateable coupling member and arranged in a predetermined configuration, corresponding to the headed elements on the first member, a means for supporting the buckling beam elements in a position generally perpendicular to the flat surface on the second member, with the ends of the buckling beam elements protruding slightly beyond the flat surface, a means for aligning the first and second members in mateable relation with the respective flat surfaces in opposed relation, and means for securing and maintaining the first and second members in mateable relation with the ends of the beam elements in a flexed position a

Abstract: A device for removing contaminant impurities, particularly contaminants existing at very low levels, from a liquid, including a heating element at least partially immersible in the liquid, a confinement means at least partially immersible in the liquid for maintaining a pulsating bubble of vapor of the liquid, the heating element located within the confining means, openings in the confining means to allow periodic partial escape of the vapor bubble and ingress of liquid.

Abstract: The device structure is a bi-polar transistor having a region of inert atoms located in the collector adjacent to the base-collector junction. Another embodiment of the invention is a complementary insulated gate field effect transistor (IGFET) structure having N and P channel IGFETs with regions of implanted ions beneath the source and drain of one or both transistors, and/or annular regions projecting inwardly from the surface that surround or separate the different types of IGFETs.

Abstract: An improved field effect transistor device in a monocrystalline semiconductor body provided with source and drain regions and a gate electrode disposed over the channel between the source and drain regions wherein at least the drain region is formed of a first region where the impurity concentration increases with depth with the peak concentration being spaced inwardly from the major surface, and a second region located within the first region having a peak impurity concentration at the major surface. The drain region structure in operation promotes the current flow between the source and drain to flow deeper in the channel region and spaced from the gate dielectric layer.In the method for forming the field effect transistor, an impurity is introduced into the semiconductor body underlying at least the ultimate drain region, an epitaxial semiconductor layer deposited, and a second impurity region formed over the first region to form the drain contact.

Abstract: A method for forming monocrystalline silicon carbide on a silicon substrate by converting a portion of the monocrystalline silicon substrate into a porous silicon substance by anodic treatment carried out in an aqueous solution of hydrofluoric acid, heating the resultant substrate to a temperature in the range of 1050.degree. C to 1250.degree. C in an atmosphere that includes a hydrocarbon gas for a time sufficient to react the porous silicon and the gas, thereby forming a layer of monocrystalline silicon carbide on the silicon substrate.

Abstract: A charge-coupled random access memory cell is formed in a semiconductor body divided into three adjacent regions. The first region has an impurity diffused therein and serves alternately as a source and a drain for charge carriers. The second or gate region has a threshold voltage determined by an impurity imparted thereto by either diffusion or ion implantation. The third or storage region has a lower threshold voltage than the gate region. A single unitary metal electrode extends in superimposed relation to the second and third regions. Upon the application of potentials to the first region and the electrode, charge carriers may be stored in or removed from the third region so as to write a "1" or a "0" in the cell.

Abstract: A charge-coupled random access memory cell is formed in a semiconductor body divided into three adjacent regions. The first region has an impurity diffused therein and serves alternately as a source and a drain for charge carriers. The second or gate region has a predetermined threshold voltage and the third or storage region has a lower threshold voltage. A single unitary metal electrode extends in superimposed relation to the second and third regions. Upon the application of potentials to the first region and the electrode, charge carriers may be stored in or removed from the third region so as to write a "1" or a "0" in the cell.