Patents Assigned to 1
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Patent number: 9543451Abstract: The present invention discloses a high voltage JFET. The high voltage JFET includes a second conductivity type drift region located on the first conductivity type epitaxial layer; a second conductivity type drain heavily doped region located in the second conductivity type drift region; a drain terminal oxygen region located on the second conductivity type drift region and at a side of the second conductivity type drain heavily doped region; a first conductivity type well region located at a side of the second conductivity type drift region; a second conductivity type source heavily doped region and a first conductivity type gate heavily doped region located on the first conductivity type well region, and a gate source terminal oxygen region; a second conductivity type channel layer located between the second conductivity type source heavily doped region and the second conductivity type drift region; a dielectric layer and a field electrode plate located on the second conductivity type channel layer.Type: GrantFiled: June 10, 2013Date of Patent: January 10, 2017Assignee: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventor: Guangtao Han
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Patent number: 9544044Abstract: The present invention provides systems and methods for parallel interference suppression. In one embodiment of the invention, a processing engine is used to substantially cancel a plurality of interfering signals within a received signal. The processing engine includes a plurality of matrix generators that are used to generate matrices, each matrix comprising elements of a unique interfering signal selected for cancellation. The processing engine also includes one or more processors that use the matrices to generate cancellation operators. A plurality of applicators applies the cancellation operators to parallel but not necessarily unique input signals to substantially cancel the interfering signals from the input signals. These input signals may include received signals, interference cancelled signals and/or PN codes.Type: GrantFiled: December 13, 2010Date of Patent: January 10, 2017Assignee: III Holdings 1, LLCInventors: Anand P. Narayan, Eric S. Olson, John K. Thomas
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Patent number: 9544663Abstract: A computer system comprising one or more processors and computer-readable media operatively connected thereto, having stored thereon instructions for carrying out the steps of: maintaining one or more databases comprising first electronic data comprising digitally created reference compact electronic representations for each of a plurality of reference electronic works and second electronic data associated with the reference electronic works and related to action information corresponding thereto; obtaining a first digitally created compact electronic representation comprising one or more extracted feature vectors of a first electronic work; identifying a matching reference electronic work by comparing the first digitally created compact electronic representation of the first electronic work with the first electronic data using a sub-linear search of the first electronic data; determining the action information corresponding to the matching reference electronic work based on the second electronic data; and asType: GrantFiled: December 28, 2015Date of Patent: January 10, 2017Assignee: NETWORK-1 TECHNOLOGIES, INC.Inventor: Ingemar J. Cox
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Patent number: 9540166Abstract: The invention relates to a method of packaging wine in a container essentially consisting of a plastics material glass closed by a lid, wherein a lid is sealed to the rim of the glass and, while sealing the lid, the container is deformed to reduce the volume of the head space.Type: GrantFiled: May 11, 2015Date of Patent: January 10, 2017Assignee: 1/4 VINInventors: Pascal Carvin, Christian Mura
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Patent number: 9542416Abstract: A method for validating data changes made to a database is disclosed. The changes are made in the context of a transaction, and validation is performed using a rules database storing a plurality of rules. The method includes identifying a set of data entities affected by one or more data changes made in the context of the transaction. In response to an instruction to commit the transaction, data entities in the set of affected data entities are validated using rules from the rules database. The transaction is committed in dependence on the outcome of the validation.Type: GrantFiled: January 11, 2016Date of Patent: January 10, 2017Assignee: 1Spatial Group LimitedInventors: Paul James Watson, Adrian Cuthbert, Jonathan Mark Billing
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Publication number: 20170002629Abstract: A method for adjusting, to a pre-determined value, the level of a mineral deposition or corrosion inhibitor injected into a gas or oil well. Using of the time-resolved fluorescence method for detecting and quantifying a mineral deposition or corrosion inhibitor in a fluid from an oil or gas production well.Type: ApplicationFiled: December 19, 2014Publication date: January 5, 2017Applicants: TOTAL SA, UNIVERSITE LYON 1, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE -CNRS -Inventors: Christian HURTEVENT, Salima BARAKA-LOKMANE, John-Richard ORDONEZ-VARELA, Olivier TILLEMENT, Thomas BRICHART, Matteo MARTINI
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Publication number: 20170002125Abstract: A polymer consisting of a regio-regular polymer backbone basing on asymmetric fluorine-substituted 2,1,3-benzothiadiazole units (FBT) having a Formula 1MP0: where. R1 is any alkyl group of 1-30 carbons; R2 is any alkyl group of 1-30 carbons: n is any number greater than 6; D is an aryl moiety.Type: ApplicationFiled: June 30, 2015Publication date: January 5, 2017Applicant: 1-Material IncInventors: Steven Shuyong Xiao, Yali Yang
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Patent number: 9537953Abstract: The present disclosure provides methods, systems, and media for allowing access to quantum computers in a distributed computing environment (e.g., the cloud). Such methods and systems may provide optimization and computational services on the cloud. Methods and systems of the present disclosure may enable quantum computing to be relatively and readily scaled across various types of quantum computers and users at various locations, in some cases without the need for users to have a deep understanding of the resources, implementation or the knowledge that may be required for solving optimization problems using a quantum computer. Systems provided herein may include user interfaces that enable users to perform data analysis in a distributed computing environment while taking advantage of quantum technology in the backend.Type: GrantFiled: June 13, 2016Date of Patent: January 3, 2017Assignee: 1QB INFORMATION TECHNOLOGIES INC.Inventors: Majid Dadashikelayeh, Lester Szeto
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Patent number: 9537632Abstract: A radio communication apparatus is disclosed that enables the influence of the feedback information on the channel capacity to be kept to the minimum without reducing the transmission efficiency of information by transmission of pilot symbol. In the apparatus, a delay dispersion measuring section generates a delay profile using the received signal, and measures delay dispersion indicative of dispersion of delayed versions. A moving speed estimating section estimates moving speed of a mobile station apparatus that transmits a pilot symbol based on the variation in reception power of the pilot symbol. An other-cell interference measuring section measures other-cell interference caused by signals transmitted in cells except the cell to which the apparatus belongs.Type: GrantFiled: August 14, 2014Date of Patent: January 3, 2017Assignee: Godo Kaisha IP Bridge 1Inventors: Akihiko Nishio, Atsushi Matsumoto
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Patent number: 9536253Abstract: A method including the steps of: receiving, by a computer system including at least one computer, a first electronic media work uploaded from a first electronic device; extracting one or more features from the first electronic media work; linking the first electronic media work with a reference electronic media work identifier associated with a reference electronic media work to generate correlation information relating the first electronic media work with at least an action associated with the reference electronic media work identifier; storing the correlation information; receiving, from a second electronic device, a query related to the first electronic media work; correlating the query with action information related to an action to be performed based at least in part on the correlation information; generating machine-readable instructions based upon the action information; and providing the machine-readable instructions to the second electronic device to be used in performing the action.Type: GrantFiled: December 28, 2015Date of Patent: January 3, 2017Assignee: NETWORK-1 TECHNOLOGIES, INC.Inventor: Ingemar J. Cox
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Patent number: 9538216Abstract: A computer system comprising one or more electronic communications devices, one or more processors, and one or more computer readable media having stored thereon computer instructions for carrying out the steps of: maintaining one or more databases comprising first electronic data comprising digitally created reference compact electronic representations for each of a plurality of reference electronic works and second electronic data associated with the reference electronic works and related to action information; obtaining a first digitally created compact electronic representation comprising one or more extracted feature vectors of a first electronic work; identifying a matching reference electronic work comparing the first digitally created compact electronic representation of the first electronic work with the first electronic data using an approximate nearest neighbor search; determining the action information corresponding to the matching reference electronic work based on the second electronic data;Type: GrantFiled: December 28, 2015Date of Patent: January 3, 2017Assignee: NETWORK-1 TECHNOLOGIES, INC.Inventor: Ingemar J. Cox
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Publication number: 20160379691Abstract: Embodiments of the invention relate generally to data storage and computer memory, and more particularly, to systems, integrated circuits and methods for accessing memory in multiple layers of memory implementing, for example, third dimension memory technology. In a specific embodiment, an integrated circuit is configured to implement write buffers to access multiple layers of memory. For example, the integrated circuit can include memory cells disposed in multiple layers of memory. In one embodiment, the memory cells can be third dimension memory cells. The integrated circuit can also include read buffers that can be sized differently than the write buffers. In at least one embodiment, write buffers can be sized as a function of a write cycle. Each layer of memory can include a plurality of two-terminal memory elements that retain stored data in the absence of power and store data as a plurality of conductivity profiles.Type: ApplicationFiled: June 13, 2016Publication date: December 29, 2016Applicant: III Holdings 1, LLCInventor: Robert Norman
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Publication number: 20160380071Abstract: An insulated gate bipolar transistor (IGBT) manufacturing method comprises the following steps: providing a semiconductor substrate of a first conducting type, the semiconductor substrate having a first major surface and a second major surface (100); forming a field-stop layer of a second conducting type on the first major surface of the semiconductor substrate (200); growing an oxide layer on the field-stop layer (300); removing the oxide layer from the field-stop layer (400); forming an epitaxial layer on the field-stop layer from which the oxide layer has been removed; and then manufacturing an IGBT on the epitaxial layer (600). Before regular manufacturing of an IGBT, the surface defects of a substrate material are eliminated as many as possible before epitaxy is formed, and the quality of an epitaxial layer is improved, thereby improving the quality of the whole IGBT.Type: ApplicationFiled: July 29, 2014Publication date: December 29, 2016Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Xiaoshe DENG, Qiang RUI, Shuo ZHANG, Genyi WANG
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Publication number: 20160379974Abstract: A manufacturing method for reverse conducting insulated gate bipolar transistor, the manufacturing method is characterized by the use of polysilicon for filling in grooves on the back of a reverse conducting insulated gate bipolar transistor. The parameters of reverse conducting diodes on the back of the reverse conducting insulated gate bipolar transistor can be controlled simply by controlling the doping concentration of the polysilicon accurately, indicating relatively low requirements for process control. The reverse conducting insulated gate bipolar transistor manufacturing method is relatively low in requirements for process control and relatively small in manufacturing difficulty.Type: ApplicationFiled: August 19, 2014Publication date: December 29, 2016Applicant: CSMC Technologies FAB1 Co., Ltd.Inventors: Shuo ZHANG, Qiang RUI, Genyi WANG, Xiaoshe DENG
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Patent number: 9532129Abstract: An earphone line control device includes a power supply management unit, a filter unit, a control unit, a first resistance, a first diode, a first switch, a second resistance and a second switch.Type: GrantFiled: September 24, 2014Date of Patent: December 27, 2016Assignee: 1MORE INC.Inventors: Kuan-Hong Hsieh, Boqing Lin, Xiaohong Sun
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Patent number: 9529870Abstract: A method including the steps of: receiving, by a computer system including at least one computer, a first electronic media work uploaded from a first electronic device; extracting one or more features from the first electronic media work; linking the first electronic media work with a reference electronic media work identifier associated with a reference electronic media work to generate correlation information using an approximate nearest neighbor search; storing the correlation information; receiving, from a second electronic device, a query related to the first electronic media work; correlating the query with action information related to an action to be performed and associated with the reference electronic media work identifier based at least in part on the correlation information; generating machine-readable instructions based upon the action information; and providing to the second electronic device, the machine-readable instructions to be used in performing the action.Type: GrantFiled: December 28, 2015Date of Patent: December 27, 2016Assignee: NETWORK-1 TECHNOLOGIES, INC.Inventor: Ingemar J. Cox
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Patent number: 9530139Abstract: One-to-many comparisons of callers' words and/or voice prints with known words and/or voice prints to identify any substantial matches between them. When a customer communicates with a particular entity, such as a customer service center, the system makes a recording of the real-time call including both the customer's and agent's voices. The system segments the recording to extract different words, such as words of anger. The system may also segment at least a portion of the customer's voice to create a tone profile, and it formats the segmented words and tone profiles for network transmission to a server. The server compares the customer's words and/or tone profiles with multiple known words and/or tone profiles stored on a database to determine any substantial matches. The identification of any matches may be used for a variety of purposes, such as providing representative feedback or customer follow-up.Type: GrantFiled: January 7, 2016Date of Patent: December 27, 2016Assignee: III Holdings 1, LLCInventors: Chin H. Khor, Marcel Leyva, Vernon Marshall
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Publication number: 20160369242Abstract: The invention relates to a method for producing induced pluripotent stem cells (iPS) by culturing somatic cells subjected to a cellular reprogramming method, characterised in that the somatic cells are cultured in the presence of netrin-1 or an analogue of netrin-1 at least at the beginning of the cellular reprogramming method.Type: ApplicationFiled: January 13, 2015Publication date: December 22, 2016Applicants: CENTRE LEON BERARD, UNIVERSITE CLAUDE BERNARD LYON 1, INSTITUT NATIONAL DE LA SANTE ET DE LA RECHERCHE M EDICALE (INSERM)Inventors: Fabrice LAVIAL, Patrick MEHLEN, Agnès BERNET
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Publication number: 20160372571Abstract: A reverse conducting insulated gate bipolar transistor (IGBT) manufacturing method, comprising the following steps: providing a substrate having an IGBT structure formed on the front surface thereof; implanting P+ ions onto the back surface of the substrate; forming a channel on the back surface of the substrate through photolithography and etching processes; planarizing the back surface of the substrate through a laser scanning process to form P-type and N-type interval structures; and forming a back surface collector by conducting a back metalizing process on the back surface of the substrate. Laser scanning process can process only the back surface structure requiring annealing, thus solve the problem of the front surface structure of the reverse conducting IGBT restricting back surface annealing to a low temperature, improving the P-type and N-type impurity activation efficiency in the back surface structure of the reverse conducting IGBT, and enhancing the performance of the reverse conducting IGBT.Type: ApplicationFiled: September 2, 2014Publication date: December 22, 2016Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.Inventors: Wanli Wang, Xiaoshe DENG, Genyi WANG, Qiang RUI
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Patent number: D775108Type: GrantFiled: September 18, 2015Date of Patent: December 27, 2016Assignee: 1MORE INC.Inventors: Kuan-Hong Hsieh, Boqing Lin, Zheng Wei, Yingda Chen