Patents Assigned to Advanced Analogic Technologies, Inc.
  • High-voltage extended drain MOSFET
    Patent number: 7812393
    Abstract: All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: October 12, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Richard K. Williams, Donald Ray Disney, Jun-Wei Chen, Wai Tien Chan, HyungSik Ryu
  • Isolation structures for integrated circuits
    Patent number: 7800198
    Abstract: A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: September 21, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • High Efficiency Switching Linear Battery Charger with Low Power Dissipation
    Publication number: 20100231172
    Abstract: A battery charger for a portable electronic device includes a linear charger to generate a substantially constant current for charging the battery and a switching voltage regulator to convert power supplied by an external adapter to a supply voltage for the linear charger. A feedback circuit controls operation of the switching voltage regulator so that the voltage supplied to the linear charger is substantially equal to the combination of the battery voltage and the drain-to-source voltage of the linear charger. In this way, power dissipation by the linear charger is minimized without requiring the use of a high accuracy current limited adapter.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 16, 2010
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventors: Siamak Bastami, David Yen Wai Wong, Thomas Zoki Li
  • Semiconductor Carrier for Multi-Chip Packaging
    Publication number: 20100230790
    Abstract: A power semiconductor product includes a carrier attached to a leadframe. An insulating layer is formed on the carrier and two or more conductive plates are patterned on the insulating layer. A control IC is attached to one of these conductive plates and a power transistor is attached to the other. Bond wires connect the first conductive plate to a pin on the leadframe. Additional bond wires attach the control IC to pins on the leadframe and form connections between the control IC and the power transistor.
    Type: Application
    Filed: March 12, 2009
    Publication date: September 16, 2010
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventor: Donald Disney
  • Method and Apparatus for Over-voltage Protection With Breakdown-Voltage Tracking Sense Element
    Publication number: 20100232081
    Abstract: A power integrated circuit with internal over-voltage protection includes a power transistor monolithically integrated with a sense element and a control circuit. The power transistor is connected to an output terminal that is connected (or is connectable) to an external load. The sense element is connected to the output terminal in parallel with the power transistor. The sense element is constructed to be similar to the power transistor except that the sense element has a lower breakdown voltage. When the voltage of the output terminal exceeds the breakdown voltage of the sense element a breakdown current flows from the gate of the sense element to the control circuit. Inside the control circuit, a comparator or other over-voltage protection circuit monitors this feedback and controls the power transistor accordingly to protect the power integrated circuit from damage.
    Type: Application
    Filed: March 12, 2009
    Publication date: September 16, 2010
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventor: Donald Disney
  • Isolated lateral MOSFET in epi-less substrate
    Patent number: 7795681
    Abstract: A lateral MOSFET formed in a substrate of a first conductivity type includes a gate formed atop a gate dielectric layer over a surface of the substrate, a drain region of a second conductivity type, a source region of a second conductivity type, and a body region of the first conductivity type which extends under the gate. The body region may have a non-monotonic vertical doping profile with a portion located deeper in the substrate having a higher doping concentration than a portion located shallower in the substrate. The lateral MOSFET may be drain-centric, with the source region and an optional dielectric-filled trench surrounding the drain region.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: September 14, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • High-efficiency DC/DC voltage converter including up inductive switching pre-regulator and capacitive switching post-converter
    Patent number: 7786712
    Abstract: A DC/DC converter includes a pre-regulator stage, which may include a boost converter, and a post-converter stage, which may include a charge pump. The duty factor of the pre-regulator stage is controlled by a feedback path that extends from the output terminal of the pre-regulator stage or the post-converter stage. The pre-regulator steps the input DC voltage up by a variable amount depending on the duty factor, and the post-converter steps the voltage at the output of the pre-regulator up or down by an positive or negative integral or fractional value. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: August 31, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • High-efficiency DC/DC voltage converter including down inductive switching pre-regulator and capacitive switching post-converter
    Patent number: 7782027
    Abstract: A DC/DC converter includes a pre-regulator stage, which may include a Buck converter, and a post-converter stage, which may include a charge pump. The duty factor of the pre-regulator stage is controlled by a feedback path that extends from the output terminal of the pre-regulator stage or the post-converter stage. The pre-regulator steps the input DC voltage down by a variable amount depending on the duty factor, and the post-converter steps the voltage at the output of the pre-regulator up or down by an positive or negative integral or fractional value. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: August 24, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • High-efficiency DC/DC voltage converter including capacitive switching pre-converter and down inductive switching post-regulator
    Patent number: 7777459
    Abstract: A DC/DC converter includes a pre-converter stage, which may include a charge pump, and a post-regulator stage, which may include a Buck converter. The duty factor of the post-regulator stage is controlled by a feedback path that extends from the output terminal of the DC/DC converter to an input terminal in the post-regulator stage. The pre-converter steps the input DC voltage up or down by a positive or negative integral or fractional value, and the post-regulator steps the voltage down by a variable amount depending on the duty factor at which the post-regulator is driven. The converter overcomes the problems of noise glitches, poor regulation, and instability, even near unity input-to-output voltage conversion ratios.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: August 17, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Method of forming lateral trench MOSFET with direct trench polysilicon contact
    Patent number: 7759200
    Abstract: A lateral trench MOSFET includes a trench containing a device segment and a gate bus segment. The gate bus segment of the trench is contacted by a conductive plug formed in a dielectric layer overlying the substrate, thereby avoiding the need for the conventional surface polysilicon bridge layer. The conductive plug is formed in a substantially vertical hole in the dielectric layer. The gate bus segment may be wider than the device segment of the trench. A method includes forming a shallow trench isolation (STI) while the conductive material in the trench is etched.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: July 20, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Cho Chiu Ma
  • Lateral trench MOSFET with direct trench polysilicon contact and method of forming the same
    Patent number: 7759731
    Abstract: A lateral trench MOSFET includes a trench containing a device segment and a gate bus segment. The gate bus segment of the trench is contacted by a conductive plug formed in a dielectric layer overlying the substrate, thereby avoiding the need for the conventional surface polysilicon bridge layer. The conductive plug is formed in a substantially vertical hole in the dielectric layer. The gate bus segment may be wider than the device segment of the trench. A method includes forming a shallow trench isolation (STI) while the conductive material in the trench is etched.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: July 20, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Cho Chiu Ma
  • Low-noise DC/DC converter with controlled diode conduction
    Patent number: 7746042
    Abstract: The synchronous rectifier MOSFET in a Buck or boost DC/DC converter is operated as a current source rather than being turned off, thereby reducing undesirable losses in efficiency, the generation of unwanted electrical and radiated noise, and numerous other potential problems, particularly when the converter is operating in a light-load condition.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: June 29, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Richard K. Williams, Kevin P. D'Angelo
  • Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
    Patent number: 7745883
    Abstract: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: June 29, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chen
  • Isolation and termination structures for semiconductor die
    Patent number: 7741661
    Abstract: Various integrated circuit devices, including a lateral DMOS transistor, a quasi-vertical DMOS transistor, a junction field-effect transistor (JFET), a depletion-mode MOSFET, and a diode, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: June 22, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Current Limit Control with Current Limit Detector
    Publication number: 20100149713
    Abstract: Devices, such as mobile devices, may be exposed to short circuit and output overload events. To protect against such events, mobile devices typically include circuitry to limit currents so as not to exceed a pre-programmed current limit. Various embodiments of the present invention include devices and methods for detecting pre-programmed current limits and for limiting currents in response to such detection. In some embodiments, both the current limit detector and the current limit controller circuitry include scaled current switches. The scaling may be substantially similar between the programmed-current limit detector and the current limit controller circuitry.
    Type: Application
    Filed: March 1, 2010
    Publication date: June 17, 2010
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: John So
  • ESD protection for bipolar-CMOS-DMOS integrated circuit devices
    Patent number: 7738224
    Abstract: An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: June 15, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Jun-Wei Chen, Richard K. Williams, HyungSik Ryu, Wai Tien Chan
  • Isolated trench MOSFET in epi-less semiconductor sustrate
    Patent number: 7737526
    Abstract: An isolation structure for a semiconductor device comprises a floor isolation region, a dielectric filled trench above the floor isolation region and a sidewall isolation region extending downward from the bottom of the trench to the floor isolation region. This structure provides a relatively deep isolated pocket in a semiconductor substrate while limiting the depth of the trench that must be etched in the substrate. A MOSFET is formed in the isolated pocket.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: June 15, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Isolated transistor
    Publication number: 20100133611
    Abstract: A transistor is formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench.
    Type: Application
    Filed: February 1, 2010
    Publication date: June 3, 2010
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • High-voltage lateral DMOS device
    Patent number: 7719054
    Abstract: All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: May 18, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Jun-Wei Chen, Wai Tien Chan, HyungSik Ryu
  • Isolation structures for integrated circuits
    Patent number: 7701033
    Abstract: A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: April 20, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan