Patents Assigned to Advanced Analogic Technologies, Inc.
  • Time-Multiplexed Multi-Output DC/DC Converters and Voltage Regulators
    Publication number: 20090040794
    Abstract: A boost switching converter with multiple outputs includes an inductor is connected between an input supply (typically a battery) and a node Vx. A low-side switch connects the node Vx and ground. Two or more output stages are included. Each output stage includes a high-side switch and an output capacitor. Each output stage is connected to deliver electrical current to a respective load. A control circuit is connected to drive the low-side switch and high-side switches in a repeating sequence. The inductor is first charged and then discharged into each output stage. In effect, a series of different switching converters are provided, each with a different output voltage.
    Type: Application
    Filed: August 8, 2007
    Publication date: February 12, 2009
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventor: Richard K. Williams
  • High-voltage lateral DMOS device
    Patent number: 7489007
    Abstract: All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: February 10, 2009
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Richard K. Williams, Donald Ray Disney
  • Trench-constrained isolation diffusion for integrated circuit die
    Patent number: 7489016
    Abstract: A semiconductor substrate includes a pair of trenches filled with a dielectric material. Dopant introduced into the mesa between the trenches is limited from diffusing laterally when the substrate is subjected to thermal processing. Therefore, semiconductor devices can be spaced more closely together on the substrate, and the packing density of the devices can be increased. Also trench constrained doped region diffuse faster and deeper than unconstrained diffusions, thereby reducing the time and temperature needed to complete a desired depth diffusion. The technique may be used for semiconductor devices such as bipolar transistors as well as isolation regions that electrically isolate the devices from each other. In one group of embodiments, a buried layer is formed at an interface between an epitaxial layer and a substrate, at a location generally below the dopant in the mesa.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: February 10, 2009
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • ESD protection for bipolar-CMOS-DMOS integrated circuit devices
    Publication number: 20090034137
    Abstract: An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
    Type: Application
    Filed: September 30, 2008
    Publication date: February 5, 2009
    Applicants: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Jun-Wei Chen, Richard K. Williams, HyungSik Ryu, Wai Tien Chan
  • ESD protection for bipolar-CMOS-DMOS integrated circuit devices
    Publication number: 20090032876
    Abstract: An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
    Type: Application
    Filed: September 30, 2008
    Publication date: February 5, 2009
    Applicants: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Jun-Wei Chen, Richard K. Williams, HyungSik Ryu, Wai Tien Chan
  • ESD protection for bipolar-CMOS-DMOS integrated circuit devices
    Publication number: 20090034136
    Abstract: An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
    Type: Application
    Filed: September 30, 2008
    Publication date: February 5, 2009
    Applicants: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Jun-Wei Chen, Richard K. Williams, HyungSik Ryu, Wai Tien Chan
  • Boost and up-down switching regulator with synchronous freewheeling MOSFET
    Publication number: 20090010035
    Abstract: A freewheeling MOSFET is connected in parallel with the inductor in a switched DC/DC converter. When the freewheeling MOSFET is turned on during the switching operation of the converter, while the low-side and energy transfer MOSFETs are turned off, the inductor current circulates or “freewheels” through the freewheeling MOSFET. The frequency of the converter is thereby made independent of the lengths of the magnetizing and energy transfer stages, allowing far greater flexibility in operating and converter and overcoming numerous problems associated with conventional DC/DC converters. For example, the converter may operate in either step-up or step-down mode and may even transition for one mode to the other as the values of the input voltage and desired output voltage vary.
    Type: Application
    Filed: April 21, 2008
    Publication date: January 8, 2009
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Method of fabricating trench-constrained isolation diffusion for semiconductor devices
    Publication number: 20080293214
    Abstract: A semiconductor substrate includes a pair of trenches filled with a dielectric material. Dopant introduced into the mesa between the trenches is limited from diffusing laterally when the substrate is subjected to thermal processing. Therefore, semiconductor devices can be spaced more closely together on the substrate, and the packing density of the devices can be increased. Also trench constrained doped region diffuse faster and deeper than unconstrained diffusions, thereby reducing the time and temperature needed to complete a desired depth diffusion. The technique may be used for semiconductor devices such as bipolar transistors as well as isolation regions that electrically isolate the devices from each other. In one group of embodiments, a buried layer is formed at an interface between an epitaxial layer and a substrate, at a location generally below the dopant in the mesa.
    Type: Application
    Filed: July 31, 2008
    Publication date: November 27, 2008
    Applicants: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • Isolation structures for integrated circuits
    Publication number: 20080290450
    Abstract: A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
    Type: Application
    Filed: July 30, 2008
    Publication date: November 27, 2008
    Applicants: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Trench-constrained isolation diffusion for integrated circuit die
    Publication number: 20080290452
    Abstract: A semiconductor substrate includes a pair of trenches filled with a dielectric material. Dopant introduced into the mesa between the trenches is limited from diffusing laterally when the substrate is subjected to thermal processing. Therefore, semiconductor devices can be spaced more closely together on the substrate, and the packing density of the devices can be increased. Also trench constrained doped region diffuse faster and deeper than unconstrained diffusions, thereby reducing the time and temperature needed to complete a desired depth diffusion. The technique may be used for semiconductor devices such as bipolar transistors as well as isolation regions that electrically isolate the devices from each other. In one group of embodiments, a buried layer is formed at an interface between an epitaxial layer and a substrate, at a location generally below the dopant in the mesa.
    Type: Application
    Filed: July 31, 2008
    Publication date: November 27, 2008
    Applicants: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • Step-down switching regulator with freewheeling diode
    Publication number: 20080291711
    Abstract: A freewheeling DC/DC step-down converter includes a high-side MOSFET, an inductor and an output capacitor connected between the input voltage and ground. A freewheeling clamp, which includes a freewheeling MOSFET and diode, is connected across the inductor. When the high-side MOSFET is turned off, a current circulates through the inductor and freewheeling clamp rather than to ground, improving the efficiency of the converter. The converter has softer diode recovery and less voltage overshoot and noise than conventional Buck converters and features unique benefits during light-load conditions.
    Type: Application
    Filed: April 21, 2008
    Publication date: November 27, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Isolation structures for integrated circuits
    Publication number: 20080290451
    Abstract: A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
    Type: Application
    Filed: July 30, 2008
    Publication date: November 27, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Richard K. Williams, Donald Ray Disney, Jun-Wei Chen, Wal Tien Chan, HyungSik Ryu
  • MOSFET gate drive with reduced power loss
    Publication number: 20080290911
    Abstract: A gate driver for a power MOSFET in, for example, a DC-DC converter switches the MOSFET between a fully-on condition and a low-current condition instead of switching the MOSFET between fully-on and fully-off conditions. The amount of charge that must be transferred to charge and discharge the gate of the MOSFET is thereby reduced, and the efficiency of the MOSFET is improved. A feedback circuit may be used to assure that the magnitude of current in the power MOSFET in its low-current condition is correct. Alternatively, a trimming process may be used to correct the magnitude of the voltage supplied by the gate driver to the gate of the power MOSFET in the low-current condition.
    Type: Application
    Filed: August 8, 2007
    Publication date: November 27, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Isolation structures for integrated circuits
    Publication number: 20080290449
    Abstract: A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
    Type: Application
    Filed: July 30, 2008
    Publication date: November 27, 2008
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Method of fabricating isolated semiconductor devices in epi-less substrate
    Patent number: 7449380
    Abstract: An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does not diffuse significantly. As a result, the dimensions of the isolation structure are limited and defined, thereby allowing a higher packing density than obtainable using conventional processes which include the growth of an epitaxial layer and diffusion of the dopants. In one group of embodiments, the isolation structure includes a deep layer and a sidewall which together form a cup-shaped structure surrounding an enclosed region in which the isolated semiconductor device may be formed. The sidewalls may be formed by a series of pulsed implants at different energies, thereby creating a stack of overlapping implanted regions.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: November 11, 2008
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • Method of fabricating isolated semiconductor devices in epi-less substrate
    Patent number: 7445979
    Abstract: An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does not diffuse significantly. As a result, the dimensions of the isolation structure are limited and defined, thereby allowing a higher packing density than obtainable using conventional processes which include the growth of an epitaxial layer and diffusion of the dopants. In one group of embodiments, the isolation structure includes a deep layer and a sidewall and which together form a cup-shaped structure surrounding an enclosed region in which the isolated semiconductor device may be formed. The sidewalls may be formed by a series of pulsed implants at different energies, thereby creating a stack of overlapping implanted regions.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: November 4, 2008
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • High Efficiency PWM Switching Mode with High Accuracy Linear Mode Li-Ion Battery Charger
    Publication number: 20080258687
    Abstract: A battery charger includes: a step-down switching converter connected to provide power at a predetermined average current from an input voltage V+ to an output node VOUT; a regulating switch connected to provide power at a predetermined voltage from the input node V+ to the output node VOUT; a mixed mode control circuit configured to charge a battery connected to the output node VOUT in a predetermined sequence that includes: a preconditioning phase where the regulating switch provides power to the battery; and a constant current phase where the switching converter delivers power to the battery.
    Type: Application
    Filed: April 17, 2007
    Publication date: October 23, 2008
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventors: John S.K. So, Kevin D'Angelo
  • Method for Detecting Removal of a Battery from a Battery Charger
    Publication number: 20080258686
    Abstract: A method for detecting removal of a battery from a battery charger includes 1) incrementing an event counter and resetting an interval counter each time the voltage present at the output node exceeds a predetermined voltage; 2) resetting the event counter each time the interval counter exceeds a predetermined maximum time between events; and 3) asserting a signal indicating the absence of a battery connected between the positive and negative output nodes each time event counter exceeds a predetermined number of events.
    Type: Application
    Filed: April 17, 2007
    Publication date: October 23, 2008
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventors: Thomas Li, John S.K. So, David Yen Wai Wong
  • Method for Reducing Body Diode Conduction in NMOS Synchronous Rectifiers
    Publication number: 20080253152
    Abstract: A switching regulator that practices the current invention includes a high-side switch M1 connected between an input voltage and a node Lx. A low-side switch is connected between the node Lx and ground. An inductor L is connected between Lx and an output node (VOUT). A filtering capacitor connects VOUT to ground. The switching regulator has two distinct operational phases. During the first operational phase, the high-side switch is OFF and the low-side switch is ON. During the second operational phase, the high-side switch is ON and the low-side switch acts as a current source. During transitions between the second and first operational phases, the low-side switch is controlled to momentarily decrease the regulated drain-to-source current.
    Type: Application
    Filed: August 8, 2007
    Publication date: October 16, 2008
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventors: Kevin D'Angelo, Robert Wrathall
  • Power-MOSFETs with Improved Efficiency for Multi-channel Class-D Audio Amplifiers and Packaging Thereof
    Publication number: 20080252372
    Abstract: A stereo class-D audio system includes a first die including four monolithically integrated NMOS high-side devices and a second a second die including four monolithically integrated PMOS low-side devices. The audio system also includes a set of electrical contacts for connecting the high and low-side devices to components within the a stereo class-D audio system, the set of electrical contacts including at least one supply contact for connecting the drains of the high-side devices to a supply voltage (Vcc) and at least one ground contact for connecting the drains of the low-side devices to ground, the electrical contacts also including respective contacts for each source of the high and low-side devices allowing the source of each high-side device to be connected to the source of a respective low-side device to form two H-bridge circuits.
    Type: Application
    Filed: October 17, 2007
    Publication date: October 16, 2008
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventor: Richard K. Williams