Patents Assigned to Advanced Analogic Technologies, Inc.
  • SYSTEMS AND METHODS FOR CHARGING A BATTERY WITH A DIGITAL CHARGE REDUCTION LOOP
    Publication number: 20100079114
    Abstract: Exemplary systems and methods for charging a battery with a digital charge reduction loop are described herein. In some embodiments, a system comprises an exemplary digital charge reduction loop which comprises a circuit for determining a charge-current adjustment signal, a counter for generating a digital count value, and a digital-to-analog converter. The circuit for determining a charge-current adjustment signal may base the determination on a source voltage of an input source. The counter may generate a digital count value based on the charge-current adjustment signal. The digital-to-analog converter (DAC) may generate a DAC control signal based on the digital count value of the counter, the DAC control signal being representative of an amount of charge current to be used to charge a battery.
    Type: Application
    Filed: December 4, 2009
    Publication date: April 1, 2010
    Applicant: Advanced Analogic Technologies, Inc.
    Inventors: John Sung Ko So, David Alan Brown
  • Edge termination region for high-voltage bipolar-CMOS-DMOS integrated circuit devices
    Patent number: 7683453
    Abstract: All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: March 23, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Richard K. Williams, Donald Ray Disney
  • High-voltage lateral DMOS device with diode clamp
    Patent number: 7683426
    Abstract: All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: March 23, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Richard K. Williams, Donald Ray Disney
  • Method of forming isolation structure for semiconductor integrated circuit substrate
    Publication number: 20100055864
    Abstract: Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths.
    Type: Application
    Filed: April 30, 2008
    Publication date: March 4, 2010
    Applicant: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Current limit control with current limit detector
    Patent number: 7672107
    Abstract: Devices, such as mobile devices, may be exposed to short circuit and output overload events. To protect against such events, mobile devices typically include circuitry to limit currents so as not to exceed a pre-programmed current limit. Various embodiments of the present invention include devices and methods for detecting pre-programmed current limits and for limiting currents in response to such detection. In some embodiments, both the current limit detector and the current limit controller circuitry include scaled current switches. The scaling may be substantially similar between the programmed-current limit detector and the current limit controller circuitry.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: March 2, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: John So
  • Control Method for DC/DC Converters and Switching Regulators
    Publication number: 20100045245
    Abstract: A circuit for controlling a switching regulator includes a switching control circuit configured to operate one or more switches in a repeating sequence that includes a first state in which an inductor is coupled between an input supply and a load so that an increasing current passes from the input supply through the inductor and a second state in which the inductor is coupled between ground and the load so that a decreasing current passes through the inductor to the load; a circuit configured to cause the switching circuit to select the second state when the magnitude of the increasing current has reached a predetermined level; and a timing circuit configured to cause the switching circuit to select the second state for a predetermined period of time after the initiation of each second first.
    Type: Application
    Filed: August 19, 2008
    Publication date: February 25, 2010
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventor: Stephen W. Hawley
  • Bi-directional Boost-Buck Voltage Converter
    Publication number: 20100045248
    Abstract: A bi-directional Boost-Buck voltage converter includes a controller, a high-voltage capacitor, a lower-voltage battery, a resistive load, an inductor, and three or four switches, and provides a mechanism to efficiently provide power to the resistive load from the battery. It uses two configurations of the switches to configure the battery, the inductor, and the capacitor in a boost converter configuration to charge the capacitor from the battery. It uses two different configurations of the switches to configure the capacitor, the inductor, and the resistive load in a buck converter configuration to discharge the capacitor through the inductor and the resistive load.
    Type: Application
    Filed: August 19, 2008
    Publication date: February 25, 2010
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventor: Stephen W. Hawley
  • Isolated transistor
    Patent number: 7667268
    Abstract: Various integrated circuit devices, in particular a transistor, are formed inside an isolation structure which includes a floor isolation region and a trench extending from the surface of the substrate to the floor isolation region. The trench may be filled with a dielectric material or may have a conductive material in a central portion with a dielectric layer lining the walls of the trench. Various techniques for terminating the isolation structure by extending the floor isolation region beyond the trench, using a guard ring, and a forming a drift region are described.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: February 23, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Methods of fabricating isolation structures in epi-less substrate
    Patent number: 7666756
    Abstract: An structure for electrically isolating a semiconductor device is formed by implanting dopant into a semiconductor substrate that does not include an epitaxial layer. Following the implant the structure is exposed to a very limited thermal budget so that dopant does not diffuse significantly. As a result, the dimensions of the isolation structure are limited and defined, thereby allowing a higher packing density than obtainable using conventional processes which include the growth of an epitaxial layer and diffusion of the dopants. In one group of embodiments, the isolation structure includes a deep layer and a sidewall which together form a cup-shaped structure surrounding an enclosed region in which the isolated semiconductor device may be formed. The sidewalls may be formed by a series of pulsed implants at different energies, thereby creating a stack of overlapping implanted regions.
    Type: Grant
    Filed: August 14, 2004
    Date of Patent: February 23, 2010
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • Battery charger apparatus with a digital charge reduction loop
    Patent number: 7656132
    Abstract: A battery charger apparatus for charging a battery, comprises a charge-current control circuit for receiving a charge-current control signal to control an amount of charge current being drawn from an input source, e.g.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: February 2, 2010
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: John Sung Ko So, David Alan Brown
  • Programmable Step-Up Switching Voltage Regulators with Adaptive Power MOSFETs
    Publication number: 20100001703
    Abstract: A step-up switching voltage regulator includes an inductor connected between an input voltage and a node Vx, M low-side switches connected between the node Vx and a ground voltage and N synchronous rectifiers connected between the node Vx and an output node. An interface circuit that decodes a control signal to identify: 1) a subset (m) of the low-side switches, 2) a subset (n) of the synchronous rectifiers, and 3) a reference voltage Vref. A control circuit drives the synchronous rectifiers and low-side switches in a repeating sequence that includes an inductor charging phase where the low-side switches in the subset m are activated to connect the node Vx to the ground voltage; and an inductor discharging phase where the synchronous rectifiers in the subset n are activated to connect the node Vx to the output node.
    Type: Application
    Filed: July 7, 2008
    Publication date: January 7, 2010
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventor: Richard K. Williams
  • Multiple-Output Dual-Polarity DC/DC Converters and Voltage Regulators
    Publication number: 20100002473
    Abstract: A multi-output dual polarity inductive boost converter includes an inductor, a first output node, a second output node, and a switching network, the switching network configured to provide the following modes of circuit operation: a first mode where the positive electrode of the inductor is connected to an input voltage and the negative electrode of the inductor is connected to ground; 2) a second mode the negative electrode of the inductor is connected to ground and the positive electrode of the inductor is connected in sequence to one or more of the fourth and fifth output nodes; and 3) a third mode where the positive electrode of the inductor is connected to the input voltage and the negative electrode of the inductor is connected in sequence to one or more of the first, second and third output nodes.
    Type: Application
    Filed: July 7, 2008
    Publication date: January 7, 2010
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventor: Richard K. Williams
  • Programmable Step-Down Switching Voltage Regulators with Adaptive Power MOSFETs
    Publication number: 20100001704
    Abstract: A step-down switching voltage regulator includes M high-side switches connected between an input voltage and a node; N synchronous rectifiers connected between the node Vx and a ground voltage and an inductor connected between an input voltage and a node Vx and an inductor connected between the node Vx and an output node. An interface circuit decodes a control signal to identify: 1) a subset (m) of the high-side switches, 2) a subset (n) of the synchronous rectifiers. A control circuit drives the high-side switches and synchronous rectifiers in a repeating sequence that includes an inductor charging phase where the high-side switches in the subset m are activated to connect the node Vx to the input voltage; and an inductor discharging phase where the synchronous rectifiers in the subset n are activated to connect the node Vx to the ground voltage.
    Type: Application
    Filed: July 7, 2008
    Publication date: January 7, 2010
    Applicant: ADVANCED ANALOGIC TECHNOLOGIES, INC.
    Inventor: Richard K. Williams
  • ESD protection for bipolar-CMOS-DMOS integrated circuit devices
    Patent number: 7626243
    Abstract: An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: December 1, 2009
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Donald Ray Disney, Jun-Wei Chen, Richard K. Williams, HyungSik Ryu, Wai Tien Chan
  • Modular CMOS analog integrated circuit and power technology
    Patent number: 7608895
    Abstract: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: October 27, 2009
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chen
  • Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
    Patent number: 7605433
    Abstract: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: October 20, 2009
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chen
  • High-voltage depletion mode MOSFET
    Patent number: 7605428
    Abstract: All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: October 20, 2009
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Richard K. Williams, Donald Ray Disney
  • Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
    Patent number: 7605432
    Abstract: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: October 20, 2009
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chen
  • Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
    Patent number: 7602023
    Abstract: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: October 13, 2009
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chen
  • Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
    Patent number: 7602024
    Abstract: A family of semiconductor devices is formed in a substrate that contains no epitaxial layer. In one embodiment the family includes a 5V CMOS pair, a 12V CMOS pair, a 5V NPN, a 5V PNP, several forms of a lateral trench MOSFET, and a 30V lateral N-channel DMOS. Each of the devices is extremely compact, both laterally and vertically, and can be fully isolated from all other devices in the substrate.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: October 13, 2009
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chen