Patents Assigned to Advanced Semiconductor Engineering
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Patent number: 12136579Abstract: A package structure and a method for manufacturing the same are provided. The package structure includes an electronic device, a heat spreader, an intermediate layer and an encapsulant. The electronic device includes a plurality of electrical contacts. The intermediate layer is interposed between the electronic device and the heat spreader. The intermediate layer includes a sintered material. The encapsulant encapsulates the electronic device. A surface of the encapsulant is substantially coplanar with a plurality of surfaces of the electrical contacts.Type: GrantFiled: July 25, 2023Date of Patent: November 5, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventor: Hsu-Nan Fang
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Patent number: 12131972Abstract: An electronic device is disclosed. The electronic device includes an active component, a power regulating component disposed on the active component, and a patterned conductive element disposed between the active component and the power regulating component. The patterned conductive element is configured to provide one or more heat dissipation paths for the active component and to provide a power path between the active component and the power regulating component.Type: GrantFiled: February 25, 2022Date of Patent: October 29, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Po-Chih Pan, Hung-Chun Kuo
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Patent number: 12132248Abstract: An electronic device is provided. The electronic device includes an antenna array including a plurality of antenna patterns collectively configured to provide a scan-angle coverage. Each of the antenna patterns includes a curved surface.Type: GrantFiled: August 24, 2022Date of Patent: October 29, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Cheng-Yu Ho, Meng-Wei Hsieh, Chih-Pin Hung
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Patent number: 12132006Abstract: A semiconductor package structure is provided. The semiconductor package structure includes an electronic component, and an inductance component. The protection layer encapsulates the electronic component and has a top surface and a bottom surface. The top surface and the bottom surface collectively define a space to accommodate the electronic component. The inductance component outflanks the space from the top surface and the bottom surface of the protection layer.Type: GrantFiled: December 30, 2021Date of Patent: October 29, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Pao-Nan Lee, Chen-Chao Wang, Chang Chi Lee
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Publication number: 20240355763Abstract: An electronic device package and manufacturing method thereof are provided. The electronic device package includes an electronic component including an active surface, a patterned conductive layer disposed on the active surface, an encapsulation layer disposed over the patterned conductive layer, and a buffer layer disposed between the patterned conductive layer and the encapsulation layer. The buffer layer is shaped and sized to alleviate a stress generated due to an interaction between the patterned conductive layer and the encapsulation layer.Type: ApplicationFiled: July 1, 2024Publication date: October 24, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: En Hao HSU, Kuo Hwa TZENG, Chia-Pin CHEN, Chi Long TSAI
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Publication number: 20240357751Abstract: An electronic device is disclosed. The electronic device includes a first circuit structure, a second circuit structure having a surface facing the first circuit structure, and a first electronic component disposed over the first circuit structure and supporting the second circuit structure. The electronic device also includes a second electronic component disposed adjacent to the second circuit structure and having a top surface at an elevation higher than the surface of the second circuit structure with respect to the first circuit structure.Type: ApplicationFiled: April 21, 2023Publication date: October 24, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsin-Yu CHEN, Huei-Shyong CHO, Shih-Wen LU
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Publication number: 20240356197Abstract: The present disclosure provides an electronic device, which includes an encapsulant, an electronic component, an antenna structure, and a first conductive element. The electronic component is disposed in the encapsulant. The antenna structure has an antenna pattern exposed to air and facing the encapsulant, and a first supporting element separating the antenna pattern from the encapsulant. At least a portion of the first conductive element is within the encapsulant, and electrically connects the antenna pattern to the electronic component by the first supporting element.Type: ApplicationFiled: April 20, 2023Publication date: October 24, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yuanhao YU, Weifan WU, Yong-Chang SYU, Chung Ju YU
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Publication number: 20240355793Abstract: A semiconductor package structure and a method of manufacturing a semiconductor package structure is provided. The semiconductor package structure includes a carrier and a component. The carrier includes a first part and a second part separated from the first part. The component is disposed under the first part and electrically connected to the second part. The first part is configured to be electrically connected to a device disposed over the first part.Type: ApplicationFiled: April 20, 2023Publication date: October 24, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Kay Stefan ESSIG, You-Lung YEN, Bernd Karl APPELT, Jean Marc YANNOU
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Patent number: 12127335Abstract: An electronic device is provided. The electronic device includes a carrier, a first electronic component, a second electronic component, and an encapsulant. The first electronic component is disposed at a first side of the carrier. The second electronic component is disposed at a second side of the carrier opposite to the first side. The encapsulant encapsulates the first electronic component and has an uneven thickness. The encapsulant is configured to reduce a warpage of the carrier.Type: GrantFiled: February 24, 2022Date of Patent: October 22, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Jhen Ciou, Jenchun Chen, Chang-Fu Lu, Pai-Sheng Shih
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Publication number: 20240345343Abstract: An electronic device includes a first transducer, a second transducer and a bridging component. The second transducer is spaced apart from the first transducer. The bridging component is configured for lateral optical-signal coupling with the first transducer and the second transducer.Type: ApplicationFiled: April 14, 2023Publication date: October 17, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Jr-Wei LIN, Mei-Ju LU, Wen Chieh YANG
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Publication number: 20240345341Abstract: A package device is provided. The package device includes a first die and a first through via structure. The first die has a first optical I/O. The first through via structure is over the first die. A first region of the first through via structure is configured to dissipate heat from the first die and a second region of the first through via structure is configured to transmit an optical signal to or from the first optical I/O.Type: ApplicationFiled: April 14, 2023Publication date: October 17, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Jung Jui KANG, Shih-Yuan SUN, Chiu-Wen LEE, Chang Chi LEE, Chun-Yen TING, Hung-Chun KUO
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Publication number: 20240347921Abstract: The present disclosure provides an antenna package structure, which includes antenna and a transmitting structure. The transmitting structure includes a first dielectric material and a second dielectric material of different dielectric constants, and a frequency selective surface unit. The first dielectric layer and the second dielectric layer are configured to focus the electromagnetic wave radiated between the antenna and the frequency selective surface unit.Type: ApplicationFiled: April 13, 2023Publication date: October 17, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shao-En HSU, Huei-Shyong CHO, Shih-Wen LU
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Publication number: 20240345315Abstract: An optoelectronic package is provided. The optoelectronic package includes a photonic structure, an alignment component and a light transmission element. The photonic structure includes an optical I/O. The alignment component includes a through hole extending through the alignment component and aligned with the optical I/O of the photonic structure. The light transmission element entirely fills the through hole of the alignment component.Type: ApplicationFiled: April 14, 2023Publication date: October 17, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chun-Yen TING, Hung-Chun KUO, Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN
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Publication number: 20240347909Abstract: The present disclosure provides an antenna package structure, including a first antenna and a first frequency selective surface structure. The first frequency selective surface structure is disposed above the first antenna, and includes a plurality of first patterns and a plurality of second patterns geometrically distinct from the plurality of the first patterns. The plurality of first patterns and the plurality of second patterns are configured to enhance gain and directivity of the first antenna.Type: ApplicationFiled: April 13, 2023Publication date: October 17, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Shao-En HSU, Huei-Shyong CHO, Shih-Wen LU
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Publication number: 20240345337Abstract: An optical device is provided. The optical device includes a first photonic component and a second photonic component. The first photonic component is configured to communicate with the second photonic component through a first optical path or an electrical path depending on a distance between the first photonic component and the second photonic component.Type: ApplicationFiled: April 14, 2023Publication date: October 17, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Tai-Hsiang LIU, Hung-Yi LIN, Wen Chieh YANG
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Patent number: 12119282Abstract: A semiconductor device package includes a carrier and an encapsulant disposed on the carrier. At least one portion of the encapsulant is spaced from the carrier by a space.Type: GrantFiled: July 28, 2022Date of Patent: October 15, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Tun-Ching Pi, Yen-Chi Huang, Hao-Chih Hsieh, Jin Han Shih
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Patent number: 12119312Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.Type: GrantFiled: July 18, 2023Date of Patent: October 15, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Cheng-Nan Lin, Wei-Tung Chang, Jen-Chieh Kao, Huei-Shyong Cho
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Publication number: 20240339383Abstract: An electronic device and a method of manufacturing an electronic device are provided. The electronic device includes an electronic component, a carrier, and a lead. The electronic component has a lateral surface. The carrier supports the electronic component. The lead is electrically connected to the electronic component and disposed adjacent to the lateral surface of the electronic component. The carrier and the lead are configured to block an electromagnetic wave between the electronic component and an external of the electronic device.Type: ApplicationFiled: April 7, 2023Publication date: October 10, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ko-Pu WU, Chih-Hung HSU, Chin Li HUANG, Chieh-Yin LIN, Yuan-Chun CHEN, Kai-Sheng PAI
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Patent number: 12113044Abstract: A semiconductor device package and a fabrication method thereof are disclosed. The semiconductor package comprises: a package component having a first mounting surface and a second mounting surface; and a first electronic component having a first conductive pad signal communicatively mounted on the first mounting surface through a first type connector; wherein the first type connector comprises a first solder composition having a lower melting point layer sandwiched between a pair of higher melting point layers, wherein the lower melting point layer is composed of alloys capable of forming a room temperature eutectic.Type: GrantFiled: February 18, 2022Date of Patent: October 8, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Shan-Bo Wang, Chin-Li Kao, An-Hsuan Hsu
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Patent number: 12112965Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.Type: GrantFiled: February 21, 2023Date of Patent: October 8, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Bo Hua Chen, Yan Ting Shen, Fu Tang Chu, Wen-Pin Huang