Patents Assigned to Advanced Semiconductor Engineering
  • Patent number: 12111114
    Abstract: A heat transfer element, a method for manufacturing the same and a semiconductor structure including the same are provided. The heat transfer element includes a housing, a chamber, a dendritic layer and a working fluid. The chamber is defined by the housing. The dendritic layer is disposed on an inner surface of the housing. The working fluid is located within the chamber.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: October 8, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Hung-Hsien Huang, Shin-Luh Tarng, Ian Hu, Chien-Neng Liao, Jui-Cheng Yu, Po-Cheng Huang
  • Publication number: 20240332274
    Abstract: An optical device package comprises a carrier having a first surface and a second surface recessed with respect to the first surface and a lid disposed on the second surface of the carrier.
    Type: Application
    Filed: June 11, 2024
    Publication date: October 3, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Tsung-Yueh TSAI, Meng-Jen WANG, Yu-Fang TSAI, Meng-Jung CHUANG
  • Publication number: 20240332192
    Abstract: A package structure is provided. The package structure includes a bridge component, a photonic processing unit, and an electrical device. The photonic processing unit is disposed over the bridge component. The electrical device is disposed over the bridge component. The bridge component is configured to optically couple with the photonic processing unit and electrically connect with the electronic component.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 3, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-I WU, Chun-Yen TING, Hung-Chun KUO, Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN
  • Publication number: 20240334586
    Abstract: A package structure is provided. The package structure includes an electronic component, a heat dissipating element, a thermal interfacing unit, and a confining structure. The electronic component has an upper surface. The heat dissipating element is over the upper surface of the electronic component. The thermal interfacing unit is between the upper surface of the electronic component and the heat dissipating element. The thermal interfacing unit includes a thermal interfacing material (TIM). The TIM is attached to the confining structure by capillary force.
    Type: Application
    Filed: March 31, 2023
    Publication date: October 3, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: An-Hsuan HSU, Hung-Hsien HUANG, Chin-Li KAO
  • Publication number: 20240329344
    Abstract: Semiconductor packages and methods for manufacturing the semiconductor packages are provided. The semiconductor package includes a first electronic element disposed over a first substrate; a second electronic element disposed over a second substrate spaced apart from the first substrate; and a first interconnection element connected to the first electronic element and the second electronic element. The first electronic element extends beyond an edge of the first substrate. The second electronic element extends beyond an edge of the second substrate and towards the first electronic element. The first interconnection element is configured to optically transmit a signal between the first electronic element and the second electronic element.
    Type: Application
    Filed: March 31, 2023
    Publication date: October 3, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN, Chang Chi LEE, Hung-Chun KUO, Chun-Yen TING
  • Publication number: 20240329300
    Abstract: A package device and an electronic device are provided. The package device includes a carrier and a die. The die is disposed over the carrier and has a first surface facing the carrier and a second surface opposite to the first surface. The first surface of the die is configured to electrically connect to the carrier and the second surface of the die is configured to optically connect to the carrier.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 3, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Po-I WU, Chun-Yen TING, Hung-Chun KUO, Jung Jui KANG, Chiu-Wen LEE, Shih-Yuan SUN
  • Publication number: 20240329387
    Abstract: An optical package is provided. The optical package includes a first optical device and an optical guiding structure. The first optical device is disposed over a carrier. The optical guiding structure is disposed over the carrier and configured to adjust a first optical transmission path of the first optical device.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 3, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Mei-Ju LU, Chi-Han CHEN, Jr-Wei LIN, Pei-Jung YANG
  • Patent number: 12107074
    Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first processing element, a first I/O element, a second processing element, and a second I/O element. The first processing element is on a substrate. The first I/O element is on the substrate and electrically connected to the first processing element. The second processing element is on the substrate. The second I/O element is on the substrate and electrically connected to the second processing element. The first I/O element is electrically connected to and physically separated from the second I/O element.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: October 1, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chang Chi Lee, Jung Jui Kang, Chiu-Wen Lee, Li Chieh Chen
  • Patent number: 12107056
    Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: October 1, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ya Fang Chan, Yuan-Feng Chiang, Po-Wei Lu
  • Patent number: 12100686
    Abstract: A method for manufacturing a semiconductor package structure and a semiconductor manufacturing apparatus are provided. The method includes: (a) providing a package body disposed on a chuck, wherein the package body includes at least one semiconductor element encapsulated in an encapsulant; and (b) sucking the package body through the chuck to create a plurality of negative pressures on a bottom surface of the package body sequentially from an inner portion to an outer portion of the package body.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: September 24, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Yun Di Hong
  • Patent number: 12100697
    Abstract: A semiconductor package structure and a method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first electronic device and a second electronic device. The first electronic device has an active surface and a lateral surface angled with the active surface, and the lateral surface includes a first portion and a second portion that is non-coplanar with the first portion. The second electronic device is disposed on the active surface of the first electronic device.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: September 24, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chang-Yu Lin, Cheng-Hsuan Wu
  • Patent number: 12094995
    Abstract: An optical device includes a substrate, an electronic component and a lid. The electronic component is disposed on the substrate. The lid is disposed on the substrate. The lid has a first cavity over the electronic component and a second cavity over the first cavity. The sidewall of the second cavity is inclined.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: September 17, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chang Chin Tsai, Yu-Che Huang, Hsun-Wei Chan
  • Patent number: 12094772
    Abstract: An electronic device package and a method for manufacturing the same are provided. The electronic device package includes a substrate, a conductive trace, a passivation layer and an upper wiring. The conductive trace is disposed over the substrate. The conductive trace includes a body portion disposed on the substrate, and a cap portion disposed on the body portion, and the cap portion is wider than the body portion. The passivation layer covers the conductive trace. The upper wiring is disposed on the passivation layer and electrically connected to the cap portion of the conductive trace through an opening of the passivation layer.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: September 17, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Wei Liu, Huei-Siang Wong
  • Publication number: 20240304555
    Abstract: A package structure and a method for manufacturing the package structure are provided. The package structure includes an interposer, a first electronic component over the interposer, and a second electronic component over the interposer. The interposer includes a first interconnector and a second interconnector. The first electronic component and the second electronic component are disposed at a first horizontal level and electrically connected to each other through the first interconnector. The second interconnector is electrically connected to a third electronic component disposed at a second horizontal level different from the first horizontal level.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 12, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Yi LIN, Cheng-Yuan KUNG
  • Publication number: 20240306295
    Abstract: A circuit structure includes a low-density conductive structure, a high-density conductive structure and a plurality of traces. The high-density conductive structure is disposed over the low-density conductive structure, and defines an opening extending from a top surface of the high-density conductive structure to a bottom surface of the high-density conductive structure. The opening exposes a first pad of the low-density conductive structure and a second pad of the low-density conductive structure. The second pad is spaced apart from the first pad. The traces extend from the top surface of the high-density conductive structure into the opening. The traces include a first trace connecting to the first pad of the low-density conductive structure and a second trace connecting to the second pad of the low-density conductive structure.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 12, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wen-Long LU
  • Publication number: 20240302614
    Abstract: An optoelectronic package and a method of manufacturing an optoelectronic package are provided. The optoelectronic package includes a carrier. The carrier includes a first region and a second region. The first region is configured to supply power to a processing unit disposed on the carrier. The second region is for accommodating at least one optoelectronic device electrically coupled to the processing unit.
    Type: Application
    Filed: May 14, 2024
    Publication date: September 12, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jr-Wei LIN, Mei-Ju LU
  • Publication number: 20240304450
    Abstract: An electronic package structure includes a first electronic component, a first thermal conductive structure and a second thermal conductive structure. The first thermal conductive structure is disposed over the first electronic component. The second thermal conductive structure is disposed between the first electronic component and the first thermal conductive structure. A first heat transfer rate of the second thermal conductive structure along a first direction from the first electronic component to the first thermal conductive structure is greater than a second heat transfer rate of the second thermal conductive structure along a second direction nonparallel with the first direction from the first electronic component to an element other than the first thermal conductive structure.
    Type: Application
    Filed: March 7, 2023
    Publication date: September 12, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: An-Hsuan HSU, Chin-Li KAO
  • Publication number: 20240304584
    Abstract: A package structure is provided. The package structure includes a semiconductor substrate. The semiconductor substrate includes a lower portion and an upper portion. The upper portion of the semiconductor substrate defines a high speed signal transmission region. The high speed signal transmission region includes a first region configured to communicate with a first electronic component and a second region configured to communicate with an external device.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 12, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hai-Ming CHEN, Hung-Yi LIN, Cheng-Yuan KUNG
  • Publication number: 20240302589
    Abstract: An optoelectronic package structure is provided. The optoelectronic package structure includes a first photonic component, a second photonic component, and an interposer. The first photonic component is disposed over the second photonic component. The interposer is optically coupled between the first photonic component and the second photonic component. The interposer is configured to define a first signal path therebetween.
    Type: Application
    Filed: March 10, 2023
    Publication date: September 12, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jr-Wei LIN, Mei-Ju LU, Wen Chieh YANG
  • Publication number: 20240304606
    Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first circuit layer, a second circuit layer under the first circuit layer, a first electronic component between the first circuit layer and the second circuit layer and connected to the first circuit layer and a sub-package between the first circuit layer and the second circuit layer and connected to the second circuit layer. The sub package comprises a second electronic component under the first electronic component and a conductive structure configured to dissipate heat generated from the first electronic component.
    Type: Application
    Filed: March 9, 2023
    Publication date: September 12, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Wei-Hao CHANG