Patents Assigned to Analog Devices, Inc.
  • Patent number: 7719362
    Abstract: Programmable-gain amplifier systems are provided that are particularly suited for reducing degrading audio effects such as zipper noise. In one embodiment, these systems switchably couple an electronic potentiometer between an amplifier's inverting input terminal and interleaved tap points along a resistor that is coupled to the amplifier's output terminal. This arrangement introduces a number of fine gain steps between the gain steps that are realized with adjacent ones of the interleaved tap points to substantially reduce or eliminate zipper noise in a audio system that processes the system's output signal. The interleaved tap points facilitate efficient operation of the potentiometer during gain changes. They also permit the potentiometer to be effectively bypassed between gain changes so that distortion effects are substantially eliminated.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: May 18, 2010
    Assignee: Analog Devices, Inc.
    Inventors: David M. Hossack, Rama Thakar, Robert Adams, Joseph Burke
  • Patent number: 7718457
    Abstract: A method of producing a MEMS device provides an apparatus having structure on a first layer that is proximate to a substrate. The apparatus has a space proximate to the structure. The method adds doped material to the space. The doped material dopes at least a portion of the first layer.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: May 18, 2010
    Assignee: Analog Devices, Inc.
    Inventors: Thomas Chen, Michael Judy
  • Publication number: 20100117221
    Abstract: A capped wafer includes a device wafer and an opposing cap wafer with an annular glass frit disposed between the device wafer and the cap wafer. The glass frit and the opposing wafers define a sealed volume that encloses the capped devices, and the glass frit may support the wafer cap during removal of excess wafer cap material from the capped wafer. A method of fabricating a capped wafer includes fabricating an annular intermediate layer between a device wafer and a cap wafer. In an alternate embodiment, a plurality of unsingulated dice each contains bond pads along a single edge and are arranged on a device wafer in an alternating order so that the bond pads of a first die are adjacent to the bond pads of a second die.
    Type: Application
    Filed: November 11, 2008
    Publication date: May 13, 2010
    Applicant: ANALOG DEVICES, INC.
    Inventors: Xue'en Yang, Milind Bhagavat, Erik Tarvin
  • Patent number: 7715406
    Abstract: This invention further features a method of apportioning channels in a programmable multi-source, multi-destination system, the method including determining the source for each channel by: a) computing the sum of the number of channels carried by the current and all preceding sources, b) computing a source identifier for each channel based on the computed sum of the number of channels carried by the current and all preceding sources, determining which section of the source the channel is located based on the computed source identifier, and determining the destination for each channel by: a) computing the sum of the number of channels carried by the current and all preceding destinations, and b) computing a destination identifier of the first channel sent to each destination based on the computed sum of the number of channels carried by the current and all preceding destinations.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: May 11, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Kendrick Owen Daniel Franzen
  • Patent number: 7714563
    Abstract: A low noise voltage reference circuit is described. The reference circuit utilizes a bandgap reference component and may include at least one of a current shunt or filter to reduce high and low noise contributions to the output. Further modifications may include a curvature correction component.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: May 11, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Stefan Marinca
  • Patent number: 7714634
    Abstract: A pseudo-differential active RC integrator is described. The pseudo-differential active RC integrator includes a common-mode feedback sub-circuit to control the common-mode output signal of the integrator. The common-mode feedback subcircuit may be coupled to one or more virtual ground nodes of the pseudo-differential active RC integrator, and may include one or more transconductors.
    Type: Grant
    Filed: January 30, 2008
    Date of Patent: May 11, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Wenhua Yang
  • Publication number: 20100111218
    Abstract: The invention is directed to a digital isolation system including an isolation barrier, a transmitter circuit receiving an input signal and transmitting a positive pulse upon detecting a first type of edge in the input signal and transmitting a negative pulse upon receipt of a second type of edge in the input signal and a receiver circuit receiving the transmitted signals, removing noise in the received signal and reconstructing the input signal using a differential comparator.
    Type: Application
    Filed: August 12, 2009
    Publication date: May 6, 2010
    Applicant: ANALOG DEVICES, INC.
    Inventor: Baoxing Chen, JR.
  • Patent number: 7710198
    Abstract: In one aspect, a resistor process invariant transconductor is provided. The transconductor comprises a voltage input configured to receive at least one voltage signal, a current output configured to provide at least one current signal, wherein a ratio between the at least one voltage signal and the least one current signal forms a total transconductance for the transconductor, and a circuit including at least one integrated resistor connected between the voltage input and the current output, the circuit adapted to maintain the total transconductance substantially constant across variation of the at least one integrated resistor.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: May 4, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Ronald A. Kapusta, Jr.
  • Patent number: 7710152
    Abstract: A multistage dual logic level voltage translator for translating both high and low input logic levels to higher levels, at least one of which levels is above the maximum recommended voltage of transistors implementing the stages, includes an input stage for receiving input logic levels and an output stage including a high voltage converter having at least a pair of cross-coupled converter transistors responsive to the input stage and including a pair of clamping circuit connected one across each of the converter transistors, for providing the shifted low and high output logic levels.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: May 4, 2010
    Assignee: Analog Devices, Inc.
    Inventors: Georges El Bacha, Stuart Patterson, Daniel Boyko
  • Patent number: 7711333
    Abstract: A measurement signal from a detector may have a complementary polarity. For example, an RF power detector may generate an output signal that decreases in magnitude in response to an increasing input signal. In one embodiment, the RF power detector may include a series of transconductance detector cells arranged to progressively turn off as the input signal becomes progressively larger.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: May 4, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Patent number: 7710787
    Abstract: A method for erasing an EEPROM cell which reduces the need for monitoring algorithms. The potential at the erase gate is initially raised and the potential at the control gate is lowered to cause FN tunneling through the erase gate. A subsequent soft programming step is employed to raise the potential at the control gate to a value sufficient to cause FN tunneling to start though the oxide of the transistor. A new memory device structure suitable for practicing this method employs a transistor having a floating gate, where a data value is stored as charged on the floating gate; a control gate; a control gate capacitor coupling the control gate to the floating gate; an erase gate; an erase gate capacitor coupling the erase gate to the floating gate; and an erase control circuit.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: May 4, 2010
    Assignee: Analog Devices, Inc.
    Inventors: Seamus Paul Whiston, Denis J. Doyle, Mike O'Shea, Thomas J. Lawlor
  • Patent number: 7710212
    Abstract: A crystal oscillator with variable gain and variable output impedance inverter system includes an inverter, a variable impedance feedback circuit, connected between the output and input of the inverter, a crystal oscillator system, having a crystal with first and second electrodes connected across the input and output of the inverter; a serial variable impedance circuit connected between the inverter output and an electrode of the crystal and a control circuit for temporarily, during start up mode, increasing the impedance of the feedback circuit and decreasing the impedance of the serial circuit relative to the stationary mode impedances and then returning the feedback impedance to the lower impedance level and the serial circuit to the higher impedance level that promotes high frequency stability of the oscillator in the normal, stationary mode, of operation.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: May 4, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Anatol Seliverstov
  • Patent number: 7703339
    Abstract: A flow sensor has an inlet chamber with a first pressure sensor and an inlet port for receiving fluid, and an outlet chamber with a second pressure sensor and an outlet port. The flow sensor also has an anemometer in fluid communication with at least one of the two chambers.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: April 27, 2010
    Assignee: Analog Devices, Inc.
    Inventors: Robert E. Sulouff, Jr., Craig E. Core
  • Patent number: 7705757
    Abstract: A gain matching method for a single bit gain ranging analog to digital converter including selecting, in response to a gain setting, a number of gain elements to be enabled in a multi-element gain controlled array interconnected between an analog input and an analog to digital converter, and patterning the enablement of the selected number of gain elements among the gain elements for matching the gain of the analog to digital converter for a range of gain settings of the converter to reduce in-band gain error due to gain element mismatch.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: April 27, 2010
    Assignee: Analog Devices, Inc.
    Inventors: John Healy, Colin Lyden
  • Patent number: 7706154
    Abstract: A power converter provides power across an isolation barrier, such as through the use of coils. A coil driver has transistors connected in a positive feedback configuration and is coupled to a supply voltage in a controlled manner by measuring the output power and opening or closing a switch as needed between the power supply and the coil driver. An output circuit, such as a FET driver, can be used with or without isolation to provide power and a logic signal.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: April 27, 2010
    Assignee: Analog Devices, Inc.
    Inventors: Baoxing Chen, Ronn Kliger
  • Patent number: 7707236
    Abstract: The present invention provides an improved technique for performing a near processing path exponent difference in an arithmetic logic unit (ALU) of a microprocessor. In one embodiment, an apparatus having a separate logic circuit for near processing path and far processing path subtraction generates exponent difference signals using only two least significant bits of exponents of the two floating point operands to perform the exponent difference.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: April 27, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Saurbh Srivastava
  • Publication number: 20100097148
    Abstract: A class G headphone amplifier circuit with improved power efficiency and low EMI. It may use an automatic signal level detector to detect the signal level of incoming signals and determine positive and negative power supplies for headphone amplifiers accordingly. A voltage generator may generate pairs of differential output voltages at a plurality of amplitude steps, and supply to headphone amplifiers the pair with the amplitude determined by the automatic signal level detector. As a result, headphone amplifiers are biased according to the input signal level, and the multiple voltage rails may improve power efficiency and avoid clipping.
    Type: Application
    Filed: October 21, 2008
    Publication date: April 22, 2010
    Applicant: ANALOG DEVICES, INC.
    Inventors: Jinghua Ye, Hui Shen, Danny Li
  • Publication number: 20100097256
    Abstract: An analog to digital converter adapted to perform a first, more significant, part of a conversion as a successive approximation conversion, a pipeline conversion or a flash conversion and a second, least significant, part of a conversion as a sigma-delta conversion.
    Type: Application
    Filed: October 21, 2008
    Publication date: April 22, 2010
    Applicant: ANALOG DEVICES, INC
    Inventors: Christopher Peter HURRELL, Colin G. LYDEN
  • Patent number: 7702710
    Abstract: A digital signal processor receives samples of a first digital signal which is to be decimated and samples of a second digital signal which is to be interpolated. A digital signal processing engine performs a decimation function on samples of the first digital signal and an interpolation function on samples of the second digital signal on a time-shared basis. The digital signal processor has a first dual memory space for storing the samples of the first digital signal and a second dual memory space for storing the samples of the second digital signal. Outputs retrieved from a dual memory space are pre-added and applied to a multiplication and accumulation stage which operates on the pre-added outputs and a filter coefficient of a digital filter.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: April 20, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Pablo Ventura Domingo
  • Patent number: 7702059
    Abstract: A digital video interface receiver adjusts a transfer function of a phase-locked loop circuit having a programmable charge pump, a programmable phase-locked loop filter, or a programmable gain voltage controlled oscillator. The digital video interface receiver monitors and detects errors in a data stream associated with the phase-locked loop circuit. Moreover, the digital video interface receiver changes the transfer function of the phase-locked loop circuit, in response to the detected errors, by changing parameters associated with the programmable charge pump, the programmable phase-locked loop filter, or the programmable gain voltage controlled oscillator of the phase-locked loop circuit so as to change the transfer function of the phase-locked loop circuit.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: April 20, 2010
    Assignee: Analog Devices, Inc.
    Inventors: Rodney D. Miller, Ernest T. Stroud, Ted Hecht, Jr., Jinhjiang Yin, Tyre Paul Lanier