Abstract: Low-cost switching converter systems are provided which combine analog generation of a current signal with digital generation of a loop error signal that is realized with a control loop that includes a high-resolution, low-bandwidth sigma-delta modulator and a low-resolution digital-to-analog converter. The current signal and error signal are differenced to provide a control signal to the switching converter. This economical system structure facilitates quick and easy digital alteration of system parameters (e.g., loop compensation and voltage reference). System embodiments add a high-frequency analog feedback path in parallel with the control loop to supplement and enhance its control performance.

Abstract: In an output stage of an operational amplifier, first and second transistors each provide a collector current under quiescent conditions to first and second current sources. A resistor receives a portion of one the collector currents and produces a resistor voltage in response. An output transistor provides a quiescent current having a value calculated as a function of the resistor voltage and a base-emitter voltage of the second transistor.

Abstract: A method for delivering control information together with sampled data between a DSP and an RF/analog front-end in a high speed communication modem, which embeds sampled data and control information in frames to be transferred over one interface. A frame may comprise various fields, each may consist of one or more bytes or octets. The frame may have a data field for carrying the sampled data, and at least one control field for transferring the control information to update RF/analog front-end registers. The control field may include an octet containing a control address, an octet containing a control command, and an octet containing control data. The frame may also provide means of synchronization, e.g., by using a sync field to identify the frame boundary.

Abstract: A receiver architecture for processing spread spectrum signals. The receiver has an RF front end to receive and down convert a broadcast signal to an intermediate frequency carrier. The IF signal is digitized and provided to a processor (which may be a software-driven DSP, an ASIC or other embodiment) for processing. A given IF carrier is removed and the signal is low pass filtered. The signal is provided to a number of channels, each, for example, correspond to a unique transmitter. On each channel the sample rate is reduced to a predetermined fixed rate with timing mismatch compensated. The Doppler frequency shift, as estimated for the channel, is removed succeedingly. A locally generated copy of the spreading code used by the transmitter is applied to the carrier and Doppler removed signal at the predetermined fixed sample rate. The de-spread signal is used to provide estimates of the Doppler shift and for subsequent sample selection.

Abstract: An emulator circuit for forming a signal representative of current flow in an inductor of a switched mode power supply, where the inductor is associated with a switching arrangement operational to connect a first node of the inductor to a first voltage (Vin) or to one of a reference voltage (gnd) or a current flow path, a second node of the inductor to a second voltage (Vout) or to one of a second reference voltage (gnd) or the current flow path, and wherein the emulator circuit forms a emulator output signal representing the integral with respect to time for which the first and second node of the inductor are connected to the first voltage and the second voltage respectively.

Abstract: Disclosed is a micro-electro-mechanical switch, including a substrate having a gate connection, a source connection, a drain connection and a switch structure, coupled to the substrate. The switch structure includes a beam member, an anchor, an anchor beam interface and a hinge. The beam member having a length sufficient to overhang both the gate connection and the drain connection. The anchor coupling the switch structure to the substrate. The anchor beam interface coupling the anchor to the hinge. The hinge coupling the beam member to the anchor at a respective position along the anchor's length, the hinge to flex in response to a voltage differential established between the gate and the beam member. The switch structure having gaps between the substrate and the anchor in regions proximate to the hinges.

Abstract: A voltage generation and power switching apparatus, method and system is described. The apparatus includes a digital media processing chip. The digital media processing chip includes a control unit, a one-time programmable memory, a charge pump and a switching network. The control unit is to receive an operating state. The charge pump is connected to a first voltage and configured to generate a second voltage using the first voltage. The control unit activates the charge pump based upon the received operating state. The one-time programmable memory is connected to the charge pump via a switching network. The switching network is configured by the control unit to provide a voltage required by the received operating state to the one-time programmable memory.

Abstract: An analog-to-digital converter includes a delta circuit, a sigma circuit, and a quantizer circuit and further includes a feedback circuit that modulates a reference voltage provided to the quantizer circuit based on the quantizer circuit output. Modulation of the quantizer reference voltage dithers the quantizer circuit to effectively reduce or avoid lock bands. The analog-to-digital converter may be used in combination with a microelectromechanical (MEMS) device such as a gyroscope, an accelerometer, or a pressure sensor.

Abstract: A chopper-stabilized amplifier includes a main signal path having first and second chopping circuits at the inputs and outputs of a transconductance amplifier, and an auto-correction feedback loop. The feedback loop includes a transconductance amplifier connected to amplify the chopped output from the main signal path, a third chopping circuit which chops the amplified output, a filter which filters the chopped output to substantially reduce any offset voltage-induced AC component present in the signal being filtered, and a transconductance amplifier which receives the filtered output and produces an output which is coupled back into the main signal path. When properly arranged, the auto-correction feedback loop operates to suppress transconductance amplifier-related offset voltages and offset voltage-induced ripple that might otherwise be present in the amplifier's output.

Abstract: Clamp networks are provided to insure successful operation of a variety of electronic circuits that are realized in the form of integrated circuit chips. These networks are especially suited for use in chips in which on-chip circuits generate a voltage to bias the chip substrate relative to the chip ground. The clamp networks are configured to drive a current between the chip ground and the chip substrate whenever the chip substrate begins to rise above the chip ground during turn on of the chip input voltage. The clamp networks thus insure that the chip substrate is properly biased when the input voltage has been established and that the chip, therefore, functions as intended.

Abstract: Disclosed are a circuit and a method for tuning a programmable filter including input terminals, output terminals, a filter network and a transadmittance stage. The input terminals can receive input signals, and the output terminals output a filtered signal. The transadmittance stage, coupled to the input terminals, generates a current at its output based on the input signals. The output of the transadmittance stage can be coupled to the output terminals. The filter network can be a resistive-capacitive network connected to the input terminals. The RC network can include a capacitance respectively coupling the input terminals to output terminals, and a voltage divider network coupling the input and output terminals together. The transadmittance stage output terminals can be connected to the voltage divider, and the output terminals of the programmable filter circuit are coupled to respective intermediate nodes of the voltage divider network to provide a filtered output signal.

Abstract: An amplifier structure includes shield conductors that are provided spatially adjacent to elongated feedback signal lines that couple a feedback circuit to an amplifier input. The shield conductors are provided between the feedback signal lines and a ground plane, which interrupts a parasitic capacitance that otherwise would be established between the feedback signal line and ground. The shield conductors are electrically coupled to the amplifier's outputs which create a capacitance between the output terminal and the feedback signal line. In some embodiments, the capacitance generated between the output terminal and the feedback signal line can suffice as a capacitor in a feedback path of the amplifier and be contained in an integrated circuit die on which the amplifier is manufactured. Optionally, a structure may be provided that eliminates common mode signals on the feedback lines while simultaneously preserving the common mode signals on the amplifier output terminals.

Abstract: A quadrature demodulator preweights an input signal prior to mixing with in-phase and quadrature clock signals. In an implementation with discrete phase rotation, a series of weighting circuits may be arranged before or after a select circuit to select the amount of phase rotation. Various implementations may include ratioed current mirrors to perform the weighting function, a stacked arrangement of mixers, an H-bridge input stage, integrated mixers and select circuits, and/or selectable gain stages such as gm cells to perform the weighting function.

Abstract: An analog to digital converter comprising an Nth analog to digital converter and an N+1th analog to digital converter arranged in series such that a residue signal from the Nth analog to digital converter is provided as an input to the N+1th analog to digital converter, characterised in that a bandwidth control means is provided in a signal path for the residue signal and the bandwidth control means is controlled so as to have a first bandwidth during a first period following generation of a conversion result from the Nth analog to digital converter, and a second bandwidth less than the first bandwidth in a second period following the first period.

Abstract: A method of forming a thick polysilicon layer for a MEMS inertial sensor includes forming a first amorphous polysilicon film on a substrate in an elevated temperature environment for a period of time such that a portion of the amorphous polysilicon film undergoes crystallization and grain growth at least near the substrate. The method also includes forming an oxide layer on the first amorphous polysilicon film, annealing the first amorphous polysilicon film in an environment of about 1100° C. or greater to produce a crystalline film, and removing the oxide layer. Lastly, the method includes forming a second amorphous polysilicon film on a surface of the crystalline polysilicon film in an elevated temperature environment for a period of time such that a portion of the second amorphous polysilicon film undergoes crystallization and grain growth at least near the surface of the crystalline polysilicon film.

Abstract: A transistor cell is provided that includes transistors arranged to turn on for different voltages applied to a control terminal of the transistor cell. The transistor cell can include a first transistor having a gate, a source, and a drain, and a second transistor having a gate, a source, and a drain, wherein the source of the second transistor is coupled to the source of the first transistor, and the drain of the second transistor is coupled to the drain of the first transistor. The transistor cell can further include a first resistor coupled between the gate of the first transistor and the gate of the second transistor. A frequency mixer is also provided that includes at least one transistor cell.

Abstract: A method of packaging an integrated circuit singulates a wafer to form an integrated circuit, positions the integrated circuit on a carrier, and passivates the integrated circuit after the positioning the integrated circuit on the carrier. At this point, the integrated circuit is secured to the carrier. The method also electrically connects the integrated circuit to a plurality of exposed conductors.

Abstract: Circuits and methods for reducing distortion in an amplified signal are disclosed. The circuits and methods may use multiple single-ended gain stages to produce multiple amplified signals. The amplified signals may be processed in combination to produce a resulting output signal having little, or no, distortion. The circuits may be implemented on a single chip as integrated circuits.

Abstract: A reference voltage circuit which is less dependent on semiconductor process variations compared to bandgap based reference voltage circuits. The circuit comprises a first amplifier having an inverting input, a non-inverting input and an output. A current biasing circuit provides first and second PTAT currents, and a CTAT current. The CTAT current is equal in value to the second PTAT at a first predetermined temperature and opposite in polarity. A first load element is coupled to the non-inverting input of the first amplifier and arranged for receiving the first PTAT current such that a PTAT voltage is developed across the first load element. A feedback load element is coupled between the inverting input and the output of the amplifier for receiving the summation of the CTAT current and the second PTAT current.

Abstract: A measurement signal from a detector may have a complementary polarity. For example, an RF power detector may generate an output signal that decreases in magnitude in response to an increasing input signal. In one embodiment, the RF power detector may include a series of transconductance detector cells arranged to progressively turn off as the input signal becomes progressively larger.