Abstract: A sampled analog circuit is divided into at least two segments, each segment receiving sampled analog data and a respective subset of bits of a filter coefficient. The at least two segments can have digital-to-capacitance circuits with substantially identical ranges of capacitance values. One or more outputs from the segments can be scaled to reflect a position of the subset of bits in the bits of the filter coefficient, and thereafter added in the analog domain to produce a filtered output signal that may then be digitized. Alternatively, the outputs from the segments may be digitized before being scaled and/or added in the digital domain.

Abstract: A passive wireless sensor system is disclosed that includes components fabricated from carbon nanotube (CNT) structures. In some situations, the passive wireless sensor system includes a CNT structure sensor and an antenna that communicates wirelessly by altering an impedance of the antenna. The passive wireless sensor system includes a non-battery-powered energy storage device that harvests energy from carrier signals received at the antenna. The antenna and the energy storage device can be formed from CNT structures.

Abstract: Digital to analog converters (DAC) are used to convert digital signals to analog values. The digital system providing data to the analog converter may be highly tasked. A DAC is provided with some in built logic to assist in reducing the load on the devices driving the DAC. The DAC may include a library of functions that it can apply to the input words to modify transitions in the analog output words. The DAC may further include a health checking system for monitoring the digital words being supplied to the DAC and raising a concern, and taking action if required, if the sequence of words is unlikely to be correct or beyond the target operating range.

Abstract: A buffer is provided where a part of the buffer is implemented in switched capacitor or other analog discrete time processing circuitry and a dynamic response characteristic, such as an effective gain or charge transfer coefficient between the input stage and an output stage is digitally controllable. This means that the buffer can be driven as if it was a system controlled by, for example a three (3) term controller, giving rise to greater, digital flexibility in tailoring the buffer's transient response.

Abstract: Analog-to-digital converters (ADCs) can be used inside ADC architectures, such as delta-sigma ADCs. The error in such internal ADCs can degrade performance. To calibrate the errors in an internal ADC, comparator offsets of the internal ADC can be estimated by computing a mean of each comparator of the internal ADC. Relative differences in the computed means serves as estimates for comparator offsets. If signal paths in the internal ADC are shuffled, the estimation of comparator offsets can be performed in the background without interrupting normal operation. Shuffling of signal paths may introduce systematic measurement errors, which can be measured and reversed to improve the estimation of comparator offsets.

Abstract: A clock generation circuit coupled to an integrator circuit uses a variable resistance that is adjusted in a transconductance bias feedback circuit. This resistance is calibrated to the reciprocal of the transconductance of the input amplifier. The product of the adjusted resistance and a capacitance in the clock generation circuit provides a time constant for the settling time of the integrator and controls a pulse width of an adaptively controlled duty cycle output clock.

Abstract: For continuous-time multi-stage noise shaping analog to digital converters (CT MASH ADCs), quantization noise cancellation often requires estimation of transfer functions, e.g., a noise transfer function of the front end modulator. To estimate the noise transfer function, a dither signal can be injected in the front end modulator. However, it is not trivial how the dither signal can be injected, since the dither signal can potentially leak to the back end modulator and cause overall noise degradation. To address some of these issues, the dither signal is injected post the flash analog to digital converter (ADC) of the front end modulator. Furthermore, dummy comparator structures can be used to synchronize the dither with the quantization noise of the targeted flash ADC.

Abstract: Apparatus and methods for fractional-N synthesizer phase-locked loops with multi-phase oscillators are provided. In certain configurations, a fractional-N PLL includes a time-to-digital converter (TDC), a digital loop filter, a multi-phase oscillator, and fractional division circuitry. The multi-phase oscillator includes multiple taps used to generate multiple clock signal phases that are provided to the fractional division circuitry to reduce the fractional-N PLL's quantization error. The fractional division circuitry includes a tap error correction circuit for compensating for errors in tap positions of the multi-phase oscillator. By including the tap error correction circuit, the phase noise and/or jitter performance of the fractional-N PLL can be enhanced.

Abstract: An integrated circuit is provided in which a surge protector, protecting against modest over-voltage events which may contain a lot of energy, and an electrostatic discharge (ESD) protector, protecting against high voltage events that may contain only a little energy, are provided within the integrated circuit package. The two types of protectors may protect against different types of electrical events.

Abstract: An integrated circuit device for protecting circuits from transient electrical events is disclosed. An integrated circuit device includes a semiconductor substrate having formed therein a bidirectional semiconductor rectifier (SCR) having a cathode/anode electrically connected to a first terminal and an anode/cathode electrically connected to a second terminal. The integrated circuit device additionally includes a plurality of metallization levels formed above the semiconductor substrate. The integrated circuit device further includes a triggering device formed in the semiconductor substrate on a first side and adjacent to the bidirectional SCR.

Abstract: A substantially planar waveguide for dynamically controlling the out-of-plane angle at which a light beam exits the waveguide. Generally, liquid crystal materials may be disposed within a waveguide in a cladding proximate or adjacent to a core layer of the waveguide. In one example, the waveguide may contain one or more taper regions such that the light beam exits the waveguide and propagates out-of-the-plane of the waveguide into an out-coupling medium at a propagation angle. In one example, the waveguide may contain one or more electrodes onto which one or more voltages may be applied. The magnitude of the propagation angle may be electronically controlled by stored by controlling or altering the magnitude of the one or more applied voltages.

Abstract: Embodiments of the present disclosure provide code readers for reading codes provided as patterns imprinted on objects. Light interacts with a pattern by e.g. being reflected from or transmitted through the pattern, and at least some of the light that has interacted with the pattern is incident on photosensitive element(s) of one or more photodetectors of a code reader. The code reader employs centroid-measuring photodetector(s), i.e. photodetectors that detect light in such a manner that centroid of a pattern can be obtained directly from the photocurrents generated as a result of the photosensitive elements detecting light incident thereon. The code reader is then configured to process the detected light to determine a centroid of the pattern from the detected light and to decode data encoded in the pattern based on a position of the centroid. Such code readers are substantially less complex than camera-based devices and avoid mechanical scanning.

Abstract: Apparatus and methods for electrostatic discharge (ESD) protection of radio frequency circuits are provided. In certain configurations, an integrated circuit includes a first pin, a second pin, a forward ESD protection circuit, and a reverse ESD protection circuit. The forward ESD protection circuit includes one or more P+/N-EPI diodes, one or more ESD protection devices, and one or more P-EPI/N+ diodes electrically connected in series between the first pin and the second pin. A first P+/N-EPI diode of the one or more P+/N-EPI diodes includes an anode electrically connected to the first pin. The reverse ESD protection circuit comprising one or more P+/N-EPI diodes, one or more ESD protection devices, and one or more P-EPI/N+ diodes electrically connected in series between the second pin and the first pin. A first P-EPI/N+ diode of the one or more P-EPI/N+ diodes includes a cathode electrically connected to the first pin.

Abstract: Transmitter noise cancellation may be applied on a channel by channel basis to active channels of an incoming radio frequency signal received at a receiver. A noise cancellation filter may be provided for each active channel in a predetermined signal band. Applying noise cancellation on a per active channel basis instead of to the entire receive band may substantially reduce the filtering requirement and number of filter coefficients or taps to save power and reduce manufacturing costs. Channelized transmitter noise cancellers, multi transmitter-receiver cross coupling cancellers, and hybrid full signal band and channelized transmitter noise cancellers are also provided.

Abstract: Various embodiments of switched amplifiers are disclosed herein. In some embodiments, a switched amplifier may include a first amplifier; a second amplifier; an input matching network common to both the first and second amplifiers; and at least one switch to couple an input of the switched amplifier, via the input matching network, to one of the first amplifier or the second amplifier. In some embodiments, a switched amplifier may include a first amplifier; a second amplifier; an input matching network common to both the first and second amplifiers or an output matching network common to both the first and second amplifiers; and a bias generation circuit to selectively (1) provide a first bias current to the first amplifier or (2) provide a second bias current to the second amplifier, wherein the second bias current is less than the first bias current.

Abstract: A substantially planar waveguide for dynamically controlling the out-of-plane angle at which a light beam exits the waveguide. Generally, liquid crystal materials may be disposed within a waveguide in a cladding proximate or adjacent to a core layer of the waveguide. In one example, the waveguide may contain one or more taper regions such that the light beam exits the waveguide and propagates out-of-the-plane of the waveguide into an out-coupling medium at a propagation angle. In one example, the waveguide may contain one or more electrodes onto which one or more voltages may be applied. The magnitude of the propagation angle may be electronically controlled by altered by controlling or altering the magnitude of the one or more applied voltages.

Abstract: Apparatus and techniques for controlling measurement of an electrical parameter of an energy source can be used to obtain information for use in enhancing a power transfer efficiency between the energy source and a load. For example, during a first measurement cycle, information indicative of the electrical parameter of the energy source can be obtained using a measurement circuit during a first sampling duration in which the load is decoupled from the energy source. The information indicative of the obtained electrical parameter can be compared to a threshold. In response to the comparing, a different second sampling duration can be determined for use in obtaining information indicative of the electrical parameter during a subsequent measurement cycle. The information indicative of the electrical parameter of the energy source includes information for use in enhancing the power transfer efficiency between the energy source and the load.

Abstract: The present invention relates to electrical measurement apparatus (10). The electrical measurement apparatus (10) comprises a measurement arrangement (20,24) configured to be disposed in relation to an electrical circuit (12,14,16,18) which bears an electrical signal, the measurement arrangement (20,24) being operative when so disposed to measure the electrical signal. The electrical measurement apparatus (10) further comprises a signal source (22) operative to apply a reference input signal to the measurement arrangement (20,24) whereby an output signal from the measurement arrangement comprises an electrical output signal corresponding to the electrical signal and a reference output signal corresponding to the reference input signal, the reference input signal having a substantially piecewise constant form which is repeated over each of plural cycles.

Abstract: Angular accelerometers are described, as are systems employing such accelerometers. The angular accelerometers may include a proof mass and rotational acceleration detection beams directed toward the center of the proof mass. The angular accelerometers may include sensing capabilities for angular acceleration about three orthogonal axes. The sensing regions for angular acceleration about one of the three axes may be positioned radially closer to the center of the proof mass than the sensing regions for angular acceleration about the other two axes. The proof mass may be connected to the substrate though one or more anchors.

Abstract: A method of manufacture of a sensor, the method comprising, in a first fabrication facility, forming one or more components of the sensor on a substrate; and in a second fabrication facility depositing a sensor layer, such as a magnetoresistive sensor, onto the substrate or over the one or more components. Otherwise contaminating effects of depositing magnetoresistive materials can thus be confined to the second fabrication facility, permitting more advanced fabrication equipment and techniques to be employed in the first fabrication facility.