Abstract: A sigma-delta modulator circuit selectively removes a dither signal previously added to an input of a quantizer circuit from the quantizer circuit output when addition of the dither signal causes a digital state change in the quantizer circuit output. Various examples for enabling the selective removal of the dither signal are described. In one embodiment, a second quantizer circuit provides a non-dithered output signal for comparison, by a digital comparator, with the dithered output signal. In another embodiment, a single quantizer circuit provides the dithered and non-dithered output signals in turn, for comparison. A subtraction circuit may remove the dither signal as appropriate. Embodiments enable retention of the improved limit cycle tone reduction achievable via dithering while reducing the need for circuits with increased signal headroom, and associated design complexity and power dissipation.

Abstract: Apparatus and methods for multi-channel autozero and chopper amplifiers are provided herein. In certain configurations, an amplifier includes at least three channels that operate using multiple phases, including at least a non-inverting chop phase, an inverting chop phase, and an autozero phase. The amplifier further includes an autozero and chopping timing control circuit, which at least partially interleaves or staggers timing of the channels' phases. For example, in certain configurations, when one or more of the channels are being autozeroed at a certain time instance, at least some of the remaining channels operate in the non-inverting chop phase or the inverting chop phase.

Abstract: A headphone system includes a headphone, a sensor, and a processor. The headphone may provide sound from virtual speakers to a listener via a plurality of sound paths that are filtered with a plurality of filters. The sensor may sense an angular velocity of a movement of the listener. The processor may receive the angular velocity and may calculate delays in the plurality of sound paths and filter coefficients for the plurality of filters based on the angular velocity, and insert the calculated delays in the plurality of sound paths and adjust the plurality of filters with the calculated filter coefficients.

Abstract: A system for receiving at least two data streams and providing a single input data stream to a MIPI's CSI Tx is disclosed. The two received data streams are written into respective data buffers. The system includes a control logic configured to control reading of data stored in the buffers to a multiplexer, the read-side clock being a multiple of a frequency of a fixed frequency clock. The control logic is further configured to control the multiplexer to combine data read from each buffer that corresponds to a complete unit of data into a separate portion and multiplex the separate portions into the input data stream. In this manner, two data streams may be transmitted using a single CSI Tx. When the two data streams are received by the system from an APIX interface, the system provides a bridge between the APIX interface and MIPI's CSI Tx.

Abstract: Heart rate monitors are plagued by noisy photoplethysmography (PPG) data, which makes it difficult for the monitors to output a consistently accurate heart rate reading. Noise is often caused by motion. Using known methods for processing accelerometer readings that measure movement to filter out some of this noise may help, but not always. The present disclosure describes an improved front-end technique (time-domain interference removal) based on using adaptive linear prediction on accelerometer data to generate filters for filtering the PPG signal prior to tracking the frequency of the heartbeat (heart rate). The present disclosure also describes an improved back-end technique based on steering the frequency of a resonant filter in order to track the heartbeat. Implementing one or both of these techniques leads to more accurate heart rate measurements.

Abstract: Heart rate monitors are plagued by noisy photoplethysmography (PPG) data, which makes it difficult for the monitors to output a consistently accurate heart rate reading. Noise is often caused by motion. Using known methods for processing accelerometer readings that measure movement to filter out some of this noise may help, but not always. The present disclosure describes an improved front-end technique (time-domain interference removal) based on using adaptive linear prediction on accelerometer data to generate filters for filtering the PPG signal prior to tracking the frequency of the heartbeat (heart rate). The present disclosure also describes an improved back-end technique based on steering the frequency of a resonant filter in order to track the heartbeat. Implementing one or both of these techniques leads to more accurate heart rate measurements.

Abstract: Apparatus and methods for frequency lock enhancement of phase-locked loops (PLLs) are provided. In one aspect, a PLL can include a VCO having a tuning voltage input and a frequency tuning circuit configured to set a frequency band setting of the VCO. The frequency tuning circuit can include a voltage monitor configured to compare the voltage level of the tuning voltage input to one or more tuning voltage threshold levels, a control circuit configured to control at least a frequency band setting and a bias current setting of the VCO, and an amplitude detection circuit configured to compare an amplitude of an oscillation signal of the VCO to one or more amplitude threshold levels.

Abstract: A protection device is provided that exhibits a turn on time of order of one nanosecond or less. Such a device provides enhanced protection for integrated circuits against electrostatic discharge events. This in turn reduces the risk of device failure in use. The protection device can include a bipolar transistor structure connected between a node to be protected and a discharge path.

Abstract: Embodiments of the disclosure provide improved mechanisms for applying DEM techniques to a DAC comprising a plurality of cells. Disclosed mechanisms include keeping track of the amplitude of input digital signal over a certain time period to determine a range of amplitudes of a portion of the input signal, and, when converting the digital values of that portion to analog values and applying a particular DEM technique, limiting the number of DAC cells on which a DEM technique is applied only to a number that is necessary for generating the analog output corresponding to the tracked portion, which number is determined based on the tracked amplitudes and could be smaller than the total number of DAC cells. In this manner, mismatch error may be reduced for smaller input signal amplitudes. Whenever possible, unused DAC cells may be put into a power saving mode, providing the advantage of reduced power consumption.

Abstract: A magnetic core is provided for an integrated circuit, the magnetic core comprising: a plurality of layers of magnetically functional material; a plurality of layers of a first insulating material; and at least one layer of an secondary insulating material; wherein layers of the first insulating material are interposed between layers of the magnetically functional material to form subsections of the magnetic core, and the at least one layer of second insulating material is interposed between adjacent subsections.

Abstract: Systems and methods for filtering noise from an input signal in a computationally efficient manner are provided. A method includes generating a raw noisy matrix representing the input signal, wherein each element of the raw noisy matrix represents a portion of the input signal, initializing a denoised matrix as equal to the raw noisy matrix, and updating the denoised matrix. Updating the denoised matrix includes iteratively convolving a current version of the denoised matrix with a kernel to generate a convolution matrix, and modifying the denoised matrix based in part on values in the convolution matrix.

Abstract: Vertical mount package assemblies and methods for making the same are disclosed. A method for manufacturing a vertical mount package assembly includes providing a base substrate having electrical connections for affixing to external circuitry, and providing a package having a mounting region configured to receive a device therein. Flexible electrical leads are formed between the base substrate and the package. The flexible leads can include a plurality of aligned grooves to guide bending. After forming the flexible electrical leads, the package is rotated relative to the base substrate. The aligned grooves can constrain the relative positions of the substrates during rotation, and the beveled edges of the base substrate and package can maintain a desired angular relationship (e.g., perpendicular) between the base substrate and the package after rotation.

Abstract: Apparatus and methods for ultrasound probes are provided. In certain implementations, a receive switch for an ultrasound probe includes a first field effect transistor (FET) and a second FET electrically connected in series between a first terminal and a second terminal with the FETs' sources connected to one another. The receive switch includes a positive threshold detection and control circuit for turning off the receive switch when a voltage of the first terminal is greater than a positive threshold voltage, and a negative threshold detection and control circuit for turning off the receive switch when the first terminal's voltage is less than a negative threshold voltage. The receive switch further includes a gate bias circuit that can bias the gates of the first and second FETs so as to turn on the receive switch when no positive or negative high voltage conditions are detected on the first terminal.

Abstract: Apparatus and methods for loss of signal detection are provided. In one embodiment, a detection circuit for monitoring an input includes a small signal boost circuit, a rectifier circuit, a low-pass filter, and one or more comparators. The small signal boost circuit can generate an amplified signal by providing a first amount of gain to an input signal when the input signal is relatively small, but can saturate and provide reduced gain without external gain control adjustment when the input signal does not have a relatively small magnitude. The rectifier circuit can rectify the boosted signal to generate a rectified signal, and the low-pass filter can filter the rectified signal to generate a filtered signal. The one or more comparators can compare the filtered signal to one or more decision threshold voltages to determine the presence or absence of the input signal on the input.

Abstract: Microphone stages in a microphone array may be coupled together in a daisy chain. Each stage may include a microphone, an analog to digital converter, a decimation unit, a receiver, an adder, and a transmitter. The converter may convert analog audio microphone signals into digital codes that may be decimated. The adder may add decimated digital codes in each stage to a cumulative sum of decimated digital codes from prior stages. This new sum may be transmitted to the next microphone stage, where the adder may add the decimated digital codes from that stage to the cumulative sum. A serial interface may be used to connect the transmitters and receivers of each of the stages. The serial interface may be used to transmit the cumulative sum of decimated digital codes between the stages. The serial interface may also be used to transmit configuration data between the stages.

Abstract: A transducer amplification circuit may include a preamplifier circuit with a signal input receiving a transducer signal to provide an amplified transducer signal comprising audible frequency components and ultrasonic frequency components. The transducer amplification circuit may include a first sigma-delta modulator configured to sample and quantize the amplified transducer signal to generate a first digital transducer signal comprising a first quantization noise signal. The first sigma-delta modulator may include a first noise transfer function having a high pass response in at least a portion of an audible frequency range to push the quantization noise signal to ultrasonic frequencies. A second sigma-delta modulator is configured to sample and quantize the amplified transducer signal to generate a second digital transducer signal comprising a second quantization noise signal.

Abstract: Apparatus and methods for transceiver interface overvoltage clamping are provided. In certain configurations, an interface device includes a first p-type well region and a second p-type well region in an n-type isolation structure. Additionally, the clamp device includes a first p-type active region and a first n-type active region in the first p-type well region and electrically connected to a first terminal of the clamp device. Furthermore, the clamp device includes a second p-type active region and a second n-type active region in the second p-type well region and electrically connected to a second terminal of the clamp device. The n-type isolation structure is in a p-type region of a semiconductor substrate, and electrically isolates the first and second p-type well regions from the p-type substrate region. The clamp device further includes a blocking voltage tuning structure positioned between the first and second n-type active regions.

Abstract: A phase corrector for laser trimming a component, the phase corrector comprising: a first correction structure located to a first side of the component, the first correction structure comprising first and second correction regions at first and second distances from the component; and a second correction structure located to a second side the component, the second correction structure comprising third and fourth correction regions at third and fourth distances from the component.

Abstract: A temperature sensor for use in an infrared detector the temperature sensor comprising: a first resistor associated with a first thermal path having a first thermal conductivity between the first resistor and a substrate and a first temperature coefficient of resistance; a second resistor associated with a second thermal path having a second thermal conductivity between the second resistor and the substrate and a second temperature coefficient of resistance, and a measurement circuit responsive to changes in the resistance of the first and second resistors to estimate changes in temperature, and wherein at least one of (a) the first and second thermal conductivities are different or (b) the first and second temperature coefficients of resistance are different.

Abstract: A clock system including a ring oscillator having a plurality of cascaded inverters, each of the cascaded inverters having a pair of inputs coupled to outputs of a respectively adjacent inverter stage and having a pair of outputs coupled to inputs of another respectively adjacent inverter stage, each inverter stage having a common mode control circuit provided therein, and a feedback controller adapted to transmit a control signal to the common mode control circuit of at least one of the inverters.