Abstract: An approach to processing of acoustic signals acquired at a user's device include one or both of acquisition of parallel signals from a set of closely spaced microphones, and use of a multi-tier computing approach in which some processing is performed at the user's device and further processing is performed at one or more server computers in communication with the user's device. The acquired signals are processed using time versus frequency estimates of both energy content as well as direction of arrival. In some examples, a non-negative matrix or tensor factorization approach is used to identify multiple sources each associated with a corresponding direction of arrival of a signal from that source. In some examples, data characterizing direction of arrival information is passed from the user's device to a server computer where direction-based processing is performed.

Abstract: Various embodiments of the present invention provide a two-wire (e.g., unshielded twisted pair) bus system that is simple (e.g., no microcontroller required in slave devices), synchronous with embedded clock information, inexpensive, automotive EMC compliant, and has sufficient speed and bandwidth for a large number of slave devices/peripherals, and also provides various protocols that can be used in various communication systems such as a two-wire bus system. The two-wire bus optionally may be self-powered, i.e., the master device may provide power to the slave devices over the two-wire bus.

Abstract: Power consumption of analog-to-digital converters (ADCs) is one important requirement for automotive and consumer devices. One flavor of an ADC is a dual quantizer architecture for oversampling delta-sigma modulators. The dual quantizer delta-sigma modulator has a first quantizer for digitizing the output of the loop filter and a second quantizer for digitizing the input of the quantizer. However, the quantization noise of the second quantizer is a highly correlated signal and significantly degrades the spectrum of the delta-sigma modulator. To address this issue, an improvement to the dual quantizer architecture is made to cancel the quantization noise of the second quantizer that is digitizing the input. Furthermore, the improvement allows the second quantizer to run at a much slower sampling rate than the first quantizer. Advantageously, the improvement provides reduction in power consumption and the overall area of modulator.

Abstract: Embodiments of the present invention eliminate the high bandwidth buffer from the analog chopper circuit. In some specific embodiments, the buffer is replace with a comparator-based loop that can be used to apply offset correction and achieve N-bit settling performance with sharp (up to 1 ns) rise and fall time with significantly lower power than with a buffer. Other specific embodiments include overcharging circuitry in combination with the comparator-based loop or in lieu of the comparator-based loop. Still other specific embodiments include an array of capacitors in place of the single large capacitor Clarge and use decoding/switching circuitry to selectively couple one of the capacitors into the circuit based on the DAC input code. Importantly, exemplary embodiments result in total power dissipation around the theoretical limit needed to charge the capacitor to the DAC output voltage.

Abstract: In an example, a system for detecting an object in an area over a screen of a mobile device may comprise a light source and a photodetector tilted toward the screen. Since a field of view of the photodetector and a radiation field of the light source may be directed toward the screen, the system may detect that a user performed a non-contacting gesture in the area over the screen. In another example, a system for detecting multiple modes of finger gestures may detect at least one of a signature gesture, a thumb joystick mode, or a thumb mouse mode. The system can execute a calendar application upon detecting that a user gestured in the shape of a letter “C”. When detecting a thumb gesture, the system may utilize a sensor having a reduced range relative to the range needed for hand gestures and, thereby, reduce power consumption.

Abstract: In one example, there is disclosed herein a processor configured for interruptible atomic exclusive memory operations. For example, a load exclusive (LDEX) may be followed by a store exclusive (STREX), with the two together forming an atom. To facilitate timely handling of interrupts, the STREX operation is split into two parts. The STREX_INIT is not interruptible but has a determinate execution time because it takes a fixed number of clock cycles. The STREX_INIT sends the value out to the memory bus. It is followed by a STREX_SYNC operation that polls a flag for whether a return value is available. STREX_SYNC is interruptible, and methods are disclosed for determining whether, upon return from an interrupt, atomicity of the operation has been broken. If atomicity is broken, the instruction fails, while if atomicity is preserved, the instruction completes.

Abstract: Apparatus and methods for frequency lock enhancement of phase-locked loops (PLLs) are provided. In one aspect, a PLL can include a VCO and a calibration voltage generation circuit that can generate a calibration voltage for controlling a tuning voltage input of the VCO when the VCO is being coarsely tuned. Additionally, the calibration voltage generation circuit can sense a temperature of the PLL, and can control a voltage level of the calibration voltage to provide compensation based on the sensed temperature. The calibration voltage generation circuit can include a bandgap reference circuit configured to generate a zero-to-absolute-temperature (ZTAT) current and a proportional-to-absolute temperature (PTAT) current, and the calibration voltage can be generated based in part on a difference between the PTAT current and the ZTAT current.

Abstract: The present invention relates to current measurement apparatus. The current measurement apparatus comprises first and second measurement devices with each of the first and second measurement devices being operative to measure current in a respective one of a live conductor and a neutral conductor substantially simultaneously. The current measurement apparatus is operative to make plural different determinations in dependence on the substantially simultaneous current measurements.

Abstract: An MEMS device has a dynamically variable reference capacitor that provides a reference to a sense capacitance. In some embodiments, a 3-axis accelerometer includes a proof mass suspended above a substrate from an anchor, and a cantilevered Z-axis reference capacitor arm suspended above the substrate from the same anchor. In some embodiments, the proof mass is suspended from a plurality of anchors, and each anchor also supports one or more cantilevered arms, the cantilevered arms forming a dynamically variable reference capacitance.

Abstract: Apparatus and methods calibrate one or more gain ranges for errors. A system can identify offset error and amplification error that occurs when the system transitions from amplifying an input signal by a first gain factor to amplifying the input signal by a second gain factor. To identify the amplification error, the system can compare the slope of the data signal in a source or reference gain range with the slope of the data signal in the destination gain range. To identify the offset error, the system can compare the amplitude of the data signal in a destination gain range with an expected value in the destination gain range.

Abstract: In a data processing system, a method for implementing a factor graph having variable nodes and function nodes connected to each other by edges includes implementing a first function node and a on a first computer system, the first computer system being in network communication with a second computer system; establishing a network connection to each of a plurality of processing systems; receiving, at the first function node, soft data from a variable node implemented on one of the processing systems, the soft data including an estimate of a value and information representative of an extent to which the estimate is believed to correspond to a correct value; and transmitting, from the first function node to the one of the processing systems, soft data representing an updated estimate of the value.

Abstract: Provided herein are apparatus and methods for a cascode amplifier topology for millimeter-wave power application. The cascode amplifier can use a neutralized common source stage cascoded with a bootstrapped common gate stage to provide an amplifier topology having enhanced performance, gain, stability and reliability. Additionally, a bootstrap capacitor of the common gate stage can be patterned between the source fingers and the drain fingers of a cascode transistor so as to improve device performance. Operating as an RF power amplifier, a single-stage cascode amplifier using the neutralized common source stage with the bootstrapped common gate stage can provide greater than 15 dB of power gain to signals of the E band.

Abstract: In an example detection system for vehicles or other objects of interest, objects are detected in real-time at full VGA 30 frame per second resolution. A preprocessor may perform run-length encoding (RLE) to provide detected edges. The image may then be scanned from the bottom up to identify vertical clusters or “stacks” or RLEs. Vertical clusters with low vertical density may be eliminated as poor vehicle candidates. Vertical clusters not eliminated may then be processed with a histogram of gradients algorithm, and confirmed with a support vector machine algorithm. A range to the nearest object may also be calculated, and a warning provided if the object is too close.

Abstract: A delta-sigma modulator is configured to sense and convert an electromagnetic field into a digital signal. An exemplary delta-sigma modulator includes a sensor component, such as an LC resonator, that is configured to sense the electromagnetic field and generate an input analog signal, where the delta-sigma modulator is configured to convert the input analog signal to the digital signal. Delta-sigma modulator can include an analog-to-digital converter coupled to the sensor component that receives and converts the input analog signal to the digital signal. Delta-sigma modulator can further include a digital-to-analog converter (DAC) coupled to the resonator and the ADC, the DAC configured to receive the digital signal from the ADC and generate a feedback analog signal.

Abstract: A transconductance stage has a common-emitter transconductance stage having common emitter transistors, a common-base transconductance stage having common base transistors, wherein collectors of the common emitter transistors and collectors of the common base transistors are cross-connected to allow in-phase signal combining, an input differential signal applied to the common-emitter transconductance stage and the common-base transconductance stage in parallel, and a selectable gain output, the output selectable between at least one high gain and one low gain, wherein the low gain is lower than the high gain. A switchable transconductance stage has at least one input voltage signal having a frequency in the microwave range, a switchable gain setting, the switchable gain setting having at least two gain settings, and an output current signal having a gain determined by the switchable gain setting.

Abstract: In an example, there is disclosed a digital to analog converter (DAC) architecture that in a first aspect provides first and second parallel paths through the DAC so as to allow a separation of a coarse and fine aspect of the DAC transfer function is described. In another aspect a DAC architecture is provided that comprises at an output of the DAC an interpolator arranged to extend the resolution of the overall DAC architecture by interpolating within the voltage range of the DAC stages that precede the interpolator. Such an interpolator can be used with both an amplifier and/or comparator to provide one or more of a buffering of the output and/or a comparison of the DAC output with signals from other circuit elements. Features of the first and second aspects may be used independently of one another.

Abstract: A connection device for connecting a load to a power supply, comprising at least first and second current control devices arranged in parallel between the power supply and the load, and a controller arranged to switch the current control devices on in sequence for temporally overlapping on periods.

Abstract: A compensation capacitor can be added to an amplifier for stability. Disclosed are systems and methods for improving the power supply rejection ratio (PSRR) performance of an amplifier in the presence of one or more compensation capacitors.

Abstract: Methods and apparatus for temperature control of devices and mechanical resonating structures are described. A mechanical resonating structure may include a heating element and a temperature sensor. The temperature sensor may sense the temperature of the mechanical resonating structure, and the heating element may be adjusted to provide a desired level of heating. Optionally, additional heating elements and/or temperature sensors may be included.

Abstract: A system for receiving at least two data streams and providing a single input data stream to a MIPI's CSI Tx is disclosed. The two received data streams are written into respective data buffers. The system includes a control logic configured to control reading of data stored in the buffers to a multiplexer, the read-side clock being a multiple of a frequency of a fixed frequency clock. The control logic is further configured to control the multiplexer to combine data read from each buffer that corresponds to a complete unit of data into a separate portion and multiplex the separate portions into the input data stream. In this manner, two data streams may be transmitted using a single CSI Tx. When the two data streams are received by the system from an APIX interface, the system provides a bridge between the APIX interface and MIPI's CSI Tx.