Abstract: An error correction method corrects and replaces erroneous digital signal samples (having N companded bits) in a receiver after ascertaining by parity check that a sample is erroneous. The method chooses M MSBs where M is less than or equal to N, and produces M test samples, each test sample being obtained by inverting a single bit from the M bits, keeping other bits unaltered. Each test sample is expanded and passed through a selected low pass filter (e.g., 15 kHz) to obtain a filtered output and a differential value between the test sample and its filtered output. The test sample producing the least differential value is chosen to replace the erroneous signal sample. The technique is applicable in NICAM demodulators receiving 14 bit sample signals (at 32 kHz) companded to (N) 10 bits from which (M) 6 MSB parity encoded bits are chosen for producing test samples.

Abstract: A system includes a modulator for receiving an input signal, modulating the received input signal, and generating a digital signal, an H-bridge controller for receiving the digital signal and generating control signals, an H-bridge circuit for receiving the control signals and operating based on the received control signals so as to output an analog signal to a load, and a common-mode error determination circuit for generating an error signal indicating at least one of an error of a common-mode voltage and an error of a common-mode current of the H-bridge circuit. The H-bridge controller receives the error signal and generates the control signals based on the received digital signal and the received error signal so as to reduce variations in at least one of an average of the common-mode voltage or an average of the common-mode current of the H-bridge circuit.

Abstract: Apparatuses and methods for electronic circuit protection are disclosed. In one embodiment, an apparatus comprises an internal circuit electrically connected between a first node and a second node, and a protection circuit electrically connected between the first node and the second node and configured to protect the internal circuit from transient electrical events. The protection circuit comprises a bipolar transistor having an emitter connected to the first node, a base connected to a third node, and a collector connected to a fourth node. The protection circuit further comprises a first diode electrically connected between the third node and the fourth node, and a second diode electrically connected between the second node and the fourth node. The first diode is an avalanche breakdown diode having an avalanche breakdown voltage lower than or about equal to a breakdown voltage associated with the base and the collector of the bipolar transistor.

Abstract: Apparatus and methods are disclosed related to an oscillator that includes a sustaining amplifier. One such apparatus includes a resonant circuit configured to operate at a resonant frequency, a sustaining amplifier, and a passive impedance network. The resonant circuit can have a first terminal and a second terminal. The sustaining amplifier can include at least a first switch configured to drive the first terminal of the resonant circuit in response to an input at a first control terminal of the first switch. The passive impedance network can be configured to pass a bias to the first control terminal, such as a gate of a field effect transistor, of the first switch. The passive impedance network can be electrically coupled to the second terminal of the resonant circuit and can include at least one inductor.

Abstract: A voltage level shifter for a direct coupling of an external voltage source to a common mode of a circuit may include an amplifier, a voltage-controlled current source, a first and second resistors. A first input of the amplifier may be connected to the common mode. A second input of the amplifier may, via the first and second resistors, receive a voltage indicative of the external voltage source. The output of the amplifier may indicate a voltage difference between the first and second inputs. The voltage-controlled current source may be controlled by the voltage difference to supply a current to a common node of the first and second resistors so that the voltage difference between the first and second inputs may be minimized.

Abstract: An inertial sensor includes driving piezoelectric transducers for enabling an oscillation of a resonator, sensing piezoelectric transducers for enabling a detection of a movement of the inertial sensor, and piezoelectric compensating elements substantially equidistantly among the driving and the sensing piezoelectric transducers, wherein the compensating elements and the resonator form corresponding capacitors having capacitive gaps, and wherein, during the oscillation of the resonator, changes in electrostatic charges stored in the capacitors are measured with the compensating elements and are modified so as to modify the oscillation of the resonator.

Abstract: An active RC resonator includes a first operational amplifier having first and second inputs and first and second outputs, a second operational amplifier having first and second inputs and first and second outputs, a first resistor coupled between the first input of the first operational amplifier and the second output of the second operational amplifier, a second resistor coupled between the second input of the first operational amplifier and the first output of the second operational amplifier, a third resistor coupled between the first output of the first operational amplifier and the first input of the second input of the second operational amplifier, a fourth resistor coupled between the second output of the first operational amplifier and the second input of the second operational amplifier, and at least one of 1) a first capacitor coupled between the first input of the first operational amplifier and the first output of the second operational amplifier, and a second capacitor coupled between the second

Abstract: Electronic circuitry comprising operational circuits of active switching type requiring timing signals, and conductive means for distributing said timing signals to the operational circuits, wherein the timing signal distribution means includes a signal path that has different phases of a drive signal are supplied via active means at different positions about the signal path where that path exhibits endless electro-magnetic continuity without signal phase inversion or has interconnections with another signal path having different substantially unidirectional signal flow where there is no endless electromagnetic continuity between those signal paths and generally has non-linear associated circuit means where the signal path is of a transmission line nature.

Abstract: Techniques to reduce correlated errors in a multi-channel sampling system. A plurality of clock signals may be generated from a master clock signal, each with edges offset from each other. The offset clock signals may be distributed to a plurality of sampling devices. Each sampling device may capture a respective input signal according to its offset clock. In this manner, the sampling units may sample their inputs signals over a distributed window of time rather than sampling in response to a common clock edge. By distributing the switching operations performed by the sampling units, noise effects are likely to be reduced.

Abstract: Some general aspects of the invention relate to a circuit and to a method for analog computation, for example, using switched capacitor integrated circuits. In some examples, a circuit includes a first group of capacitors and a second group of capacitors that may store charges during circuit operation. The first and/or the second group of capacitors may include multiple disjoint subsets of capacitors. An input circuit is provided for receiving a set of input signals and for inducing a charge on each of some or all capacitors in the first group of capacitors according to a corresponding input signal. Switches, for example, transistors controlled by a sequence of clock signals, are used to couple different sets of capacitors. Different configurations of the switches are used to form different sets of the capacitors among which charge can redistribute.

Abstract: A current mirror circuit provided in an emitter follower configuration achieves linearly output over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node.

Abstract: A method and apparatus utilizing a prediction guided decimated search motion estimation algorithm are provided. The prediction guided decimated search motion estimation algorithm generates a motion vector used to encode a macroblock in a frame from a video sequence. The algorithm includes generating full-pixel seed vectors, performing a full-pixel search around the generated seed vectors, which is followed by a fractional pixel search. The full-pixel seed vectors generated are a predicted motion vector and a hierarchical motion vector. A fractional pixel search may be conducted around a final motion vector generated by the full-pixel search and may include a half-pixel search and a quarter-pixel search. The prediction guided decimated search motion estimation algorithm can be implemented in both software and hardware. The algorithm is characterized by improved efficiency, scalability, and decreased complexity.

Abstract: A quadrature demodulator preweights an input signal prior to mixing with in-phase and quadrature clock signals. In an implementation with discrete phase rotation, a series of weighting circuits may be arranged before or after a select circuit to select the amount of phase rotation. Various implementations may include ratioed current mirrors to perform the weighting function, a stacked arrangement of mixers, an H-bridge input stage, integrated mixers and select circuits, and/or selectable gain stages such as gm cells to perform the weighting function.

Abstract: Apparatus and methods for electronic amplification are provided. In one embodiment, an amplifier includes a first adaptive level shifter (ALS), a second ALS, a first transconductance amplification circuit, a second transconductance amplification circuit, and a transimpedance amplification circuit. The first ALS and the second ALS are electrically coupled to the first and second transconductance amplification circuits to improve the input voltage range and common-mode rejection ratio (CMRR) of the amplifier. The transimpedance amplification block is electrically coupled to the first and second transconductance amplification blocks and generates an output voltage of the amplifier. The first ALS receives a differential input voltage, and the second ALS is configured to receive a feedback signal configured to change in relation to the output voltage signal.

Abstract: A circuit electrically connects a MEMS microphone with a single line transmitting both a DC power signal and an AC information signal. The MEMS microphone has a power interface for receiving the power signal, and an information interface for delivering the information signal. In such embodiments, the circuit includes a pair of lines that separate the power and information signals. To that end, the circuit has an information line configured to connect with the information interface of the MEMS microphone, and a power line configured to connect with the power interface of the MEMS microphone.

Abstract: Apparatus and methods for electronic amplification are provided. In one embodiment, a method amplifying a differential input voltage signal using a first NMOS transistor and a second NMOS transistor is provided. The method includes controlling a drain-source voltage of the first NMOS transistor using a first high voltage NMOS transistor and a first high voltage PMOS transistor. The first high voltage NMOS and PMOS transistors are electrically connected in parallel and to a drain of the first NMOS transistor. The method further includes controlling a drain-source voltage of the second NMOS transistor using a second high voltage NMOS transistor and a second high voltage PMOS transistor. The second high voltage NMOS and PMOS transistors are electrically connected in parallel and to a drain of the second NMOS transistor.

Abstract: A redundancy switch includes at least three data ports and a control input. Each data port includes a data input and a data output. The redundancy switch operates in one of at least three states. In a first state, a first data port is communicatively coupled with a second data port. In a second state, the first data port is communicatively coupled with a third data port. In a third state, the second data port is communicatively coupled with the third data port. The state of the redundancy switch can be controlled based on a signal received at the control input. The redundancy switch can further include transconductance switching elements that convert a voltage input to a current output.

Abstract: An accurate, cost-efficient temperature sensor may be integrated into an integrated circuit (IC) using common materials as the IC's interconnect metallization. The temperature sensor may include an impedance element having a length of metal made of the interconnect metal, a current source connected between a first set of contacts at opposite ends of the impedance element, and an analog-to-digital converter connected between a second set of contacts at opposite ends of the impedance element. The temperature sensor may exploits the proportional relationship between the metal's resistance and temperature to measure ambient temperature. Alternatively, such a temperature sensor may be used on disposable chemical sensors where the impedance element is made of a common metal as conductors that connect a sensor reactant to sensor contacts. In either case, because the impedance element is formed of a common metal as other interconnect, it is expected to incur low manufacturing costs.

Abstract: Apparatus and methods for adaptive level shifting are provided. In one embodiment, a method of level shifting in an adaptive level shifter (ALS) is provided. The technique includes charging a first capacitor and a second capacitor each to a voltage that is about equal to a difference between a common mode voltage of a differential input voltage signal and a reference voltage. The technique can further include inserting the first capacitor between a first input and a first output of the ALS and the second capacitor between the second input and a second output of the ALS. The technique can further include switching the first capacitor and the second capacitor such that the first capacitor is inserted between the second input and the second output and the second capacitor is inserted between the first input and the first output.

Abstract: Apparatus and methods are disclosed related to using one or more field effect transistors as a resistor. One such apparatus includes a field effect transistor with a first series circuit in parallel with the gate and the source of the field effect transistor and a second series circuit in parallel with the gate and the drain of the field effect transistor. Each series circuit can include a capacitor and a switch in series with the capacitor. The switch can be configured to be on when the field effect transistor is on, and to be off when the field effect transistor is off. This can improve the linearity of the field effect transistor as a resistor. In some implementations, the apparatus can further include an isolation resistor having a first end and a second end, the first end electrically coupled to the gate of the field effect transistor.