Abstract: Electronics packages are provided with structure that provides a significantly-reduced package footprint and also facilitates substantial reduction of package fabrication time and cost. The footprint reduction is realized with a frame that defines an aperture wall which surrounds first sets of components on the first side of a printed circuit board and also extends away from the printed circuit board to provide package input/output access along the perimeter of the package footprint. The second side of the printed circuit board receives a second set of components and this set is protected by a board fill. The frame and printed circuit board are configured for realization from frame and board panels whose planar forms substantially reduce package fabrication time and cost because they facilitate the use of modern high-speed printed circuit board (PCB) fabrication processes.

Abstract: An RF measurement system includes an envelope detector to extract the modulation envelope of the RF input signal. The resulting baseband envelope signal is then applied to a statistics extraction circuit which provides a precise measure of the modulation envelope. The statistics extraction circuit can be implemented with any number of lower-frequency precision measurement technologies because the high-frequency carrier portion of the signal is removed, and thus, the demands on the post-envelope extraction circuit are greatly reduced. In one embodiment, the envelope detector and statistics extraction circuit may be implemented as a logarithmic amplifier followed by an RMS-responding post-processing circuit to provide accurate power measurement.

Abstract: Embodiments of the present invention provide a drive signal for a motor-driven mechanical system whose frequency distribution has zero (or near zero) energy at the expected resonant frequency of the mechanical system. The drive signal may be provided as a pair of steps sufficient to activate movement of the mechanical system and then park the mechanical system at a destination position. The steps are spaced in time so as to have substantially zero energy at an expected resonant frequency fR of the mechanical system. The drive signal may be filtered to broaden a zero-energy notch at the expected resonant frequency fR.

Abstract: Digital potentiometer architecture is disclosed, composing of an integrated circuit containing multiple string arrays, each having a plurality of switching devices and an array of resistors. The insertion of an additional string array between the input terminals and the wiper, allows for the disconnection of a common string array and for the independent calibration of the resistance between each input terminal and the wiper.

Abstract: A drive signal for a motor-driven mechanical system has zero (or near zero) energy at an expected resonant frequency of the mechanical system. The drive signal may be provided in a series of steps according to a selected row of Pascal's triangle, wherein the number of steps equals the number of entries from the selected row of Pascal's triangle, each step has a step size corresponding to a respective entry of the selected row of Pascal's triangle, and the steps are spaced from each other according to a time constant determined by an expected resonant frequency of the mechanical system.

Abstract: A drive signal for a motor-driven mechanical system has zero (or near zero) energy at an expected resonant frequency of the mechanical system. The drive signal may be provided in a series of steps according to a selected row of Pascal's triangle, wherein the number of steps equals the number of entries from the selected row of Pascal's triangle, each step has a step size corresponding to a respective entry of the selected row of Pascal's triangle, and the steps are spaced from each other according to a time constant determined by an expected resonant frequency of the mechanical system.

Abstract: A digital current share bus interface connects to a power module which provides a signal representative of its output current, and adjusts the module's output current in response to a control signal received from the interface. A data formatting module receives the output current signal and generates a digital word that varies with the current; the bits of the word are coupled to a current share bus. A comparator module receives digital words conveyed via the bus and generated by the data formatting module at respective inputs, and provides the control signal to the power module so as to adjust its output current to match the current value represented by the digital word on the bus. In a typical implementation, multiple power modules are coupled to the current share bus via respective interfaces, with the output currents of all the power modules connected in parallel.

Abstract: An analog to digital converter is provided in which the outputs of first and second digital to analog converters DAC1 and DAC2 are combined in a combining circuit so as to form a plurality of decision thresholds. This enables two or more bits to be determined in a single trial.

Abstract: An H-bridge controller and a method for controlling a common-mode voltage and/or current of an H-bridge circuit are disclosed. In one embodiment, an H-bridge controller includes a section for receiving a signal indicating at least one of a common-mode voltage or common-mode current of the H-bridge circuit, and a section for generating control signals which determine switching of the H-bridge circuit so as to control at least one of the common-mode voltage or common-mode current of the H-bridge circuit. In another embodiment, a method for controlling a common-mode voltage and/or current of an H-bridge circuit includes receiving a signal indicating at least one of a common-mode voltage or common-mode current of the H-bridge circuit; and generating control signals which determine switching of the H-bridge circuit so as to control at least one of the common-mode voltage or common-mode current of the H-bridge circuit.

Abstract: Low-cost switching converter systems are provided which combine analog generation of a current signal with digital generation of a loop error signal that is realized with a control loop that includes a high-resolution, low-bandwidth sigma-delta modulator and a low-resolution digital-to-analog converter. The current signal and error signal are differenced to provide a control signal to the switching converter. This economical system structure facilitates quick and easy digital alteration of system parameters (e.g., loop compensation and voltage reference). System embodiments add a high-frequency analog feedback path in parallel with the control loop to supplement and enhance its control performance.

Abstract: In an output stage of an operational amplifier, first and second transistors each provide a collector current under quiescent conditions to first and second current sources. A resistor receives a portion of one the collector currents and produces a resistor voltage in response. An output transistor provides a quiescent current having a value calculated as a function of the resistor voltage and a base-emitter voltage of the second transistor.

Abstract: A method for delivering control information together with sampled data between a DSP and an RF/analog front-end in a high speed communication modem, which embeds sampled data and control information in frames to be transferred over one interface. A frame may comprise various fields, each may consist of one or more bytes or octets. The frame may have a data field for carrying the sampled data, and at least one control field for transferring the control information to update RF/analog front-end registers. The control field may include an octet containing a control address, an octet containing a control command, and an octet containing control data. The frame may also provide means of synchronization, e.g., by using a sync field to identify the frame boundary.

Abstract: A receiver architecture for processing spread spectrum signals. The receiver has an RF front end to receive and down convert a broadcast signal to an intermediate frequency carrier. The IF signal is digitized and provided to a processor (which may be a software-driven DSP, an ASIC or other embodiment) for processing. A given IF carrier is removed and the signal is low pass filtered. The signal is provided to a number of channels, each, for example, correspond to a unique transmitter. On each channel the sample rate is reduced to a predetermined fixed rate with timing mismatch compensated. The Doppler frequency shift, as estimated for the channel, is removed succeedingly. A locally generated copy of the spreading code used by the transmitter is applied to the carrier and Doppler removed signal at the predetermined fixed sample rate. The de-spread signal is used to provide estimates of the Doppler shift and for subsequent sample selection.

Abstract: An emulator circuit for forming a signal representative of current flow in an inductor of a switched mode power supply, where the inductor is associated with a switching arrangement operational to connect a first node of the inductor to a first voltage (Vin) or to one of a reference voltage (gnd) or a current flow path, a second node of the inductor to a second voltage (Vout) or to one of a second reference voltage (gnd) or the current flow path, and wherein the emulator circuit forms a emulator output signal representing the integral with respect to time for which the first and second node of the inductor are connected to the first voltage and the second voltage respectively.

Abstract: A voltage generation and power switching apparatus, method and system is described. The apparatus includes a digital media processing chip. The digital media processing chip includes a control unit, a one-time programmable memory, a charge pump and a switching network. The control unit is to receive an operating state. The charge pump is connected to a first voltage and configured to generate a second voltage using the first voltage. The control unit activates the charge pump based upon the received operating state. The one-time programmable memory is connected to the charge pump via a switching network. The switching network is configured by the control unit to provide a voltage required by the received operating state to the one-time programmable memory.

Abstract: An analog-to-digital converter includes a delta circuit, a sigma circuit, and a quantizer circuit and further includes a feedback circuit that modulates a reference voltage provided to the quantizer circuit based on the quantizer circuit output. Modulation of the quantizer reference voltage dithers the quantizer circuit to effectively reduce or avoid lock bands. The analog-to-digital converter may be used in combination with a microelectromechanical (MEMS) device such as a gyroscope, an accelerometer, or a pressure sensor.

Abstract: Disclosed is a micro-electro-mechanical switch, including a substrate having a gate connection, a source connection, a drain connection and a switch structure, coupled to the substrate. The switch structure includes a beam member, an anchor, an anchor beam interface and a hinge. The beam member having a length sufficient to overhang both the gate connection and the drain connection. The anchor coupling the switch structure to the substrate. The anchor beam interface coupling the anchor to the hinge. The hinge coupling the beam member to the anchor at a respective position along the anchor's length, the hinge to flex in response to a voltage differential established between the gate and the beam member. The switch structure having gaps between the substrate and the anchor in regions proximate to the hinges.

Abstract: A chopper-stabilized amplifier includes a main signal path having first and second chopping circuits at the inputs and outputs of a transconductance amplifier, and an auto-correction feedback loop. The feedback loop includes a transconductance amplifier connected to amplify the chopped output from the main signal path, a third chopping circuit which chops the amplified output, a filter which filters the chopped output to substantially reduce any offset voltage-induced AC component present in the signal being filtered, and a transconductance amplifier which receives the filtered output and produces an output which is coupled back into the main signal path. When properly arranged, the auto-correction feedback loop operates to suppress transconductance amplifier-related offset voltages and offset voltage-induced ripple that might otherwise be present in the amplifier's output.

Abstract: Disclosed are a circuit and a method for tuning a programmable filter including input terminals, output terminals, a filter network and a transadmittance stage. The input terminals can receive input signals, and the output terminals output a filtered signal. The transadmittance stage, coupled to the input terminals, generates a current at its output based on the input signals. The output of the transadmittance stage can be coupled to the output terminals. The filter network can be a resistive-capacitive network connected to the input terminals. The RC network can include a capacitance respectively coupling the input terminals to output terminals, and a voltage divider network coupling the input and output terminals together. The transadmittance stage output terminals can be connected to the voltage divider, and the output terminals of the programmable filter circuit are coupled to respective intermediate nodes of the voltage divider network to provide a filtered output signal.

Abstract: Clamp networks are provided to insure successful operation of a variety of electronic circuits that are realized in the form of integrated circuit chips. These networks are especially suited for use in chips in which on-chip circuits generate a voltage to bias the chip substrate relative to the chip ground. The clamp networks are configured to drive a current between the chip ground and the chip substrate whenever the chip substrate begins to rise above the chip ground during turn on of the chip input voltage. The clamp networks thus insure that the chip substrate is properly biased when the input voltage has been established and that the chip, therefore, functions as intended.