Abstract: A digital baseband processor is provided for concurrent operation with different wireless systems. The digital baseband processor includes a digital signal processor for executing digital signal processor instructions, a microcontroller for executing microcontroller instructions, and a timing and event processor controlled by the digital signal processor and the microcontroller for executing timing-sensitive instructions. The timing and event processor includes a plurality of instruction sequencers for executing timing-sensitive instruction threads and a time base generator for generating timing signals for initiating execution of the instruction threads on each of the plurality of instruction sequencers.

Abstract: A digital baseband processor is provided for concurrent operation with different wireless systems. The digital baseband processor includes a digital signal processor for executing digital signal processor instructions, a microcontroller for executing microcontroller instructions, and a timing and event processor controlled by the digital signal processor and the microcontroller for executing timing-sensitive instructions. The timing and event processor includes a plurality of instruction sequencers for executing timing-sensitive instruction threads and a time base generator for generating timing signals for initiating execution of the instruction threads on each of the plurality of instruction sequencers.

Abstract: A bandgap voltage reference circuit is provided that includes a PTAT source whose polarity reverses at a determinable temperature. The PTAT source is combined with a CTAT source in a manner to remove the effects of the slope of the CTAT source such that a voltage reference may be generated. A method of operating such a circuit is also described.

Abstract: A transceiver system is disclosed for use in a telecommunication system. The transceiver system includes a transmission circuit with a differential transmitter input coupled via a transmitter input stage to a differential input of a transmission amplifier in an embodiment. The transmitter input stage includes a trimmable resistor, one end of which is coupled to a positive transmit input signal, and the other end of which is coupled to a negative transmit input signal. The transceiver system also includes a receiver circuit with a differential receiver output coupled to a differential input of a receiver amplifier, and further includes a transmission line interface circuit coupled to a differential output of said transmission amplifier and to a differential input of said receiver amplifier. In accordance with other embodiments, the receiver amplifier includes an input stage that includes a first plurality of capacitors and a feedback circuit that includes a second plurality of capacitors.

Abstract: The present invention relates to a method and system for reducing integral non linearity errors in a pipeline Analog to Digital Converter (ADC). The invention provides in a first embodiment a method comprising the steps of: adding an analog dither signal to the analog input signal of a pipeline Analog to Digital Converter, and converting the analog input signal to a digital output signal by means of the pipeline Analog to Digital Converter. The amplitude of the analog dither signal is determined by the architecture of the Analog to Digital Converter. The invention also provides in a second embodiment a circuit comprising a pipeline analog to digital converter for converting an analog input signal to a digital output signal and a feedback circuit coupled to the converter such that the digital output signal is adapted to have an average non linearity error value of about zero LSBs.

Abstract: A coupling apparatus allows anti-phase movements of inertial sensor element frames along parallel axes but substantially prevents in-phase movements of the frames. The coupling apparatus includes a bar coupled between first and second sensor element frames and at least one supporting structure supporting the bar. The at least one structure is coupled to a substrate underlying the frames. The structures allow the bar to rotate at a pivot point when the frames move in anti-phase to one another along substantially parallel axes but substantially prevent in-phase movements of the frames.

Abstract: A method for one-way coupling an input signal to an integrated circuit on a semiconductor chip with the integrated circuit electrically isolated from the input signal comprises forming a MOS isolation coupler on the semiconductor chip by a CMOS process. The MOS isolation coupler comprises an inductor coil for generating a magnetic field in response to an input signal applied to terminals thereof. A MAGFET having a split drain formed by respective drain portions is formed on the semiconductor chip below the inductor coil, so that a current difference is induced between the drain currents in the drain portions which is proportional to the strength of the magnetic field generated by the inductor coil resulting from the input signal. The MAGFET is formed prior to the inductor coil. An oxide isolating layer is provided over the MAGFET, and the inductor coil is formed on the oxide layer.

Abstract: A reduced complexity turbo decoding scheme combines elements from two MAP (Maximum a posteriori) algorithms, namely a LogMAP algorithm and a max-LogMAP algorithm. Forward and backward recursive metrics are computed in accordance with the max-LogMAP algorithm, while output extrinsic LLR (Log Likelihood Ratio) values are computed in accordance with the LogMAP algorithm.

Abstract: In one embodiment, a circuit comprises at least first and second circuit stages, at least one level shifting circuit, and a control circuit. The first circuit stage is configured and arranged to produce a reference voltage at the at least one first output during each first phase of at least first and second phases, and to produce an output signal at the at least one first output that is responsive to an input signal at the at least one first input during each second phase of the at least first and second phases. The at least one level shifting circuit comprises at least one capacitor and at least one switch and is coupled between the first circuit stage and the second circuit stage.

Abstract: A die has a part that is sealed with a cap. The seal can be hermetic or non-hermetic. If hermetic, a layer of glass or metal is formed in the surface of the die, and the cap has a layer of glass or metal at a peripheral area so that, when heated, the layers form a hermetic seal. A non-hermetic seal can be formed by bonding a cap with a patterned adhesive. The cap, which can be silicon or can be a metal paddle, is electrically coupled to a fixed voltage to shield the part of the die.

Abstract: The present application relates to the manufacture of Wafer Level Chip Scale Packages (WLCSPs), which are a type of CSP in which the traditional wire bonding arrangements are dispensed with in favour of making direct contact by means of conductive bumps (typically solder balls) to the integrated circuitry. WLCSPs differ from fine pitch Ball Grid Array (BGA) and leadframe based Chip Scale Packages (CSPs) in that most of the packaging process steps are performed at wafer level. A package and method of manufacture are provided which prevent the ingress of light to the internal circuitry of WLCSP packages by providing a substantially opaque coating on the inactive side of the WLCSP packages and at least partially on the sides of WLCSP packages.

Abstract: Methods and apparatus for tuning are disclosed. One embodiment of the invention is directed to a tuner formed on a substrate. The tuner comprises a first die that receives an analog input signal and processes the analog input signal using analog processing circuitry to form analog output signals, and a second die that receives the analog output signals, converts the analog output signals to digital signals, and processes the digital signals to form output signals. Another embodiment of the invention is directed to a multi-chip module comprising a tuner adapted to process television signals of a plurality of types and of a plurality of standards to form output signals.

Abstract: A timing circuit operates by applying an arbitrary voltage across a resistance, and using the resulting current to generate a charging current which charges and/or discharges a capacitance to an endpoint voltage. Additional circuitry is arranged such that the capacitance is charged and/or discharged until its voltage crosses a threshold which is proportional to one of the resistance's endpoint voltages, such that the capacitance's endpoint voltage tracks the resistance's endpoint voltage. Thus, the resistor voltage can vary with supply voltage or temperature, or the resistance value itself can vary, without materially affecting the timing relationships. The arbitrary voltage is preferably provided with a pair of diode-connected transistors connected in series with the resistance, so that a single transistor operated at the same current density as one of the diode-connected transistors establishes the threshold voltage and detects when the capacitor voltage reaches the threshold.

Abstract: A compound video cable has a drive interface, a receive interface with a differential-to-single ended converter, and a differential mode data wired transmission medium connected to the drive interface and the receive interface. The differential-to-single ended converter is configured to convert differential mode signals into single ended signals.

Abstract: A power detection system implemented using a pair of directional couplers and a transmission line (or equivalent) disposed between the directional couplers, wherein the transmission line (or equivalent) provides a 90° phase shift between the directional couplers. Accurate power detection is provided by combining the powers detected at each of the directional couplers, whereby the combined power is independent of load phase. The total power in the forward case is given by Pc1=2*Pf*C, where Pf is the forward power and C is the coupling coefficient the directional couplers. The total power in the reflected case is given by Pc1=2*Pf*C*(?2+D2), where Pf is the forward power, C is the coupling coefficient of said directional couplers, ? is the reflection coefficient, and D is the directivity of the directional couplers.

Abstract: A method of processing a semiconductor wafer provides a wafer, and then forms an organic mask on at least a portion of the wafer. The method then applies a vapor etching process to the wafer through holes in the organic mask.

Abstract: An optically transparent conductive material is disposed directly or indirectly on an inside surface of a cover material for static dissipation in an optical switching device. The optically transparent conductive material forms an electrically continuous film. The optically transparent conductive material can also be used for anti-reflection. An additional coating may be disposed directly or indirectly on an outside surface of the cover material.

Abstract: The invention provides a multi-channel DAC circuit which provides for correlation between selected ones of the multiple channels such that a single set of calibration coefficients may be used for calibration of multiple channels.

Abstract: A multiple op amp IC with a single low noise op amp configuration comprises at least two op amp circuits fabricated on a common substrate. The IC can be configured such that the multiple op amps are connected in parallel to form a single op amp having output drive and input-referred noise characteristics which are superior to those of the constituent op amps. The IC can be fabricated with either first or second metallization patterns, with the first pattern providing multiple op amps with separate inputs and outputs, and the second pattern interconnecting the amplifiers to form a single op amp. The second pattern also preferably interconnects at least one set of corresponding high impedance nodes to prevent a difference voltage which might otherwise arise between the nodes due to component mismatches between the multiple op amps.

Abstract: A microphone system has a primary microphone for producing a primary signal, a secondary microphone for producing a secondary signal, and a selector operatively coupled with both the primary microphone and the secondary microphone. The system also has an output for delivering an output audible signal principally produced by one of the to microphones. The selector selectively permits either 1) at least a portion of the primary signal and/or 2) at least a portion of the secondary signal to be forwarded to the output as a function of the noise in the primary signal.