Abstract: The present invention relates to an H-bridge controller and method for controlling a common-mode voltage and/or current of an H-bridge circuit. The H-bridge controller comprises a section for receiving a signal indicating at least one of a common-mode voltage and common-mode current of the H-bridge circuit, and a section for generating control signals which determine switching of the H-bridge circuit so as to control at least one of the common-mode voltage and common-mode current of the H-bridge circuit.

Abstract: A bias circuit is disclosed for use in a temperature compensation system. The bias circuit provides a current that is proportional to a temperature variation raised to an nth power where |n|>1 in accordance with an embodiment. In further embodiments, the bias circuit includes a PTAT current source for providing to a driver-stage amplifier a current that is substantially proportional to absolute temperature, and a CTAT current source for providing a current that is complementary to absolute temperature, wherein the PTAT and CTAT current sources coact to provide a PTAT2 reference current that is proportional to an absolute temperature variation to the nth power wherein |n|>1.

Abstract: The invention provides a temperature reference circuit that is adapted to provide a ?Vbe of sufficiently large value that no amplification is required, and therefore any offset contribution is not gained. Using a stacked arrangement of three pairs of transistors, the invention reduces the requirement for multiple resistors within a circuit and can therefore minimize errors due to resistor matching and value. By driving at least some of the transistors with a proportional to absolute temperature (PTAT) current it is possible to ensure that the ?Vbe as a temperature sensitive variable.

Abstract: An overload current limiting circuit includes an output control circuit responsive to a logic input signal for generating a control signal for driving an output device to produce at an output terminal a signal representative of the logic input signal; and a sense circuit for sensing voltage at the output terminal indicative of a current overload and diverting a portion of that current to change the control signal to the output device to limit the overload current.

Abstract: A single chip digital frequency synthesiser (1) for synthesising a frequency swept synthesised output signal of a selectable frequency sweep comprises a direct digital synthesiser (5) which produces the frequency swept synthesised output signal on an output terminal (7) in response to values of a frequency control digital word applied to a frequency control input (8) thereof by an on-chip data processing circuit (25). An on-chip programmable data storing circuit (12) is programmable to store data indicative of a selected mode in which the digital frequency synthesiser (1) is to operate, and to store data indicative of selectable frequency and the time domains of the frequency swept synthesised output signal to be produced.

Abstract: In one embodiment, a state machine receives a plurality of instructions from an instruction register to be processed by a digital signal processor. After receiving a single RTI, the state machine loads each of the plurality of instructions one at time and determines the validity of each instruction. If the instruction is valid, the state machine transfers the instruction to the decoder. If the instruction is invalid or if a no-operation instruction is present, the state machine discards the instruction and immediately loads the next instruction.

Abstract: This invention discloses a process for forming durable anti-stiction surfaces on micromachined structures while they are still in wafer form (i.e., before they are separated into discrete devices for assembly into packages). This process involves the vapor deposition of a material to create a low stiction surface. It also discloses chemicals which are effective in imparting an anti-stiction property to the chip. These include polyphenylsiloxanes, silanol terminated phenylsiloxanes and similar materials.

Abstract: In an inertial sensor, a mass is supported by a number of mass support structures positioned within an inner periphery of the mass. The mass support structures are affixed to a substrate by at least one anchor positioned proximate to the mass' center of mass. A number of sensing fingers are affixed to the mass support structures.

Abstract: The method provides a semiconductor structure and method for forming such a structure that provides for protection for resistive layers formed within the structure from contamination from adjacent layers. By encapsulating the resistive layer in a material that is resistant to the diffusion of contaminants it is possible to protect the resistive material during the processing required to manufacture the structure.

Abstract: An interpolator utilizes two ranks of transistors to generate a plurality of interpolator currents within the confines of a low power supply voltage. The first rank of transistors are underdriven, thereby generating a plurality of partially switched currents having shallow Gaussian-shaped functions. The partially switched currents are then spatially amplified by the second rank of transistors to reduce the overlap of the currents from adjacent transistors. The first rank of transistors are driven ratiometrically by the difference of two control currents, thereby eliminating errors caused by inaccurate resistors and current sources. A biasing op-amp senses the interpolator currents and servos the first rank of transistors, thereby regulating the interpolator currents to a value determined by a reference voltage which is temperature compensated. Thus, the biasing op-amp automatically compensates for temperature variations and manufacturing uncertainties in devices throughout the entire interpolator.

Abstract: A power supply monitoring circuit is provided that utilises an adaptive internal control of the refresh rates of capacitors to reduce the power requirements of the circuit. The circuit provides at an output a signal indicative of the level of the supply voltage relative to a predetermined reference voltage.

Abstract: An integrated circuit has a substrate with a back side and a front side. The front side has both a working area and a front side contact in electrical communication with the working area. In a similar manner, the back side has first and second back side contacts. A first conductive path extending through the substrate electrically connects the front side contact and the first back side contact. In addition, a second conductive path electrically connects the first back side contact with the second back side contact.

Abstract: Rather than increasing the mass of the structure, the structure in a sensor system suspends its substrate from some mechanical ground. Motion of the substrate relative to the mechanical ground thus provides the movement information. To those ends, the sensor system includes a base, a substrate, and a flexible member suspended from at least a portion of the substrate. At least a portion of the flexible member is capable of moving relative to at least a portion of the substrate. In addition, the flexible member is secured to the base, thus causing the substrate to be movable relative to the base. Moreover, the mass of the substrate is greater than the mass of the flexible member. The substrate and flexible member are configured to interact to produce a motion signal identifying movement of the base.

Abstract: A joint detection system and associated methods are provided. A joint detection system is configured to perform joint detection of received signals. The joint detection system includes a joint detector accelerator configured to perform an operation of the joint detection of the received signals, wherein the joint detection includes computing joint detection variables. The operation includes a multiply and accumulate operation resulting in a value in an accumulator, and the value in the accumulator includes a plurality of bits. The joint detector accelerator is configured to select a subset of bits of the plurality of bits of the value in the accumulator, where the subset of bits selected is configurable. The joint detector accelerator is further configured to store the subset of bits into a memory as a fixed point representation.

Abstract: An apparatus for biasing a transistor, comprising: a controllable bias generator; a test circuit; a digital Mth order differentiator responsive to an output of the test circuit; and a controller responsive to the digital Mth order differentiator for controlling the controllable bias generator; wherein the test circuit is configured to calculate an Lth order derivative of the transistor's performance.

Abstract: A system for processing a sound input to a MEMS microphone in a voice communication device, such as a cellular telephone. The system includes the microphone and a processing microchip. The processing microchip includes a differential receiver that receives the signal output of the microphone on one input and a voltage that biases the microphone on the other input. The output of the differential receiver represents the audio signal from the microphone, while noise signals induced on connections between the microphone and microchip are received equally on the differential receiver inputs, thereby cancelling. Further, the processing microchip also includes a bias voltage generator circuit for supplying a bias voltage to the microphone. Noise that is coupled onto or is inherent in the bias voltage generator circuit or couples onto the signal path from the bias voltage generator to the microphone will traverse substantially symmetrical paths to the differential receiver.

Abstract: A microphone microchip for a voice communication device. The microchip receives and processes an audio signal from a microphone. The microchip incorporates an RF filter that substantially attenuates noise signals at RF frequencies, while passing audio signals, substantially unattenuated. The filter is inserted between ports through which RF carrier signal noise can enter the microchip and internal elements of the microchip that provide a nonlinear response. Thus, modulated RF carrier noise is attenuated before this noise can interact with the nonlinear elements to convert the modulated carrier noise to audible interference. Corruption of microphone signals is thereby avoided.

Abstract: A ?? modulator system with start up transient suppression includes a ?? analog to digital converter having predetermined internal signal limits; an envelope control circuit for attenuating the input signal to the ?? analog to digital converter and a control circuit responsive to a start/reset signal to enable for a limited time the envelope control circuit to attenuate the input signal to maintain the ?? analog to digital converter internal signal substantially within the predetermined internal signal limits.

Abstract: In one embodiment, a digital signal processor includes look ahead logic to decrease the number of bubbles inserted in the processing pipeline. The processor receives data containing instructions in a plurality of buffers and decodes the size of a first instruction. The beginning of a second instruction is determined based on the size of the first instruction. The size of the second instruction is decoded and the processor determines whether loading the second instruction will deplete one of the plurality of buffers.

Abstract: A mass includes a first set of drive fingers interdigitated with a first array of fixed drive fingers and a second set of drive fingers interdigitated with a second array of fixed drive fingers. Each array of fixed drive fingers is affixed to a substrate using a plurality of anchors. The anchors for the first and second arrays of fixed drive fingers are arranged to be co-linear in a lateral direction relative to the motion of the mass.