Abstract: Embodiments of the disclosure relate to methods of selectively depositing organic and hybrid organic/inorganic layers. More particularly, embodiments of the disclosure are directed to methods of modifying hydroxyl terminated surfaces for selective deposition of molecular layer organic and hybrid organic/inorganic films. Additional embodiments of the disclosure relate to cyclic compounds for use in molecular layer deposition processes.

Abstract: Methods for depositing a silicon-containing film on a substrate are described. The method comprises heating a processing chamber to a temperature greater than or equal to 200° C.; maintaining the processing chamber at a pressure of less than or equal to 300 Torr; coflowing a silicon precursor and nitrous oxide (N2O) into the processing chamber, and depositing a conformal silicon-containing film on the substrate. The silicon-containing film has dielectric constant (k-value) in a range of from about 3.8 to about 4.0, has a breakdown voltage of greater than 8 MV/cm at a leakage current of 1 mA/cm2 and has a leakage current of less than 1 nA/cm2 at 2 MV/cm.

Abstract: Methods of selectively depositing films on substrates are described. A passivation film is deposited on a metal surface before deposition of a dielectric material. Also described is exposing a substrate surface comprising a metal surface and a dielectric surface to a docking precursor to form a passivation film.

Abstract: Exemplary processing systems may include a chamber body. The systems may include a pedestal configured to support a semiconductor substrate. The systems may include a faceplate. The chamber body, the pedestal, and the faceplate may define a processing region. The faceplate may be coupled with an RF power source. The systems may include a remote plasma unit. The remote plasma unit may be coupled at electrical ground. The systems may include a discharge tube extending from the remote plasma unit towards the faceplate. The discharge tube may define a central aperture. The discharge tube may be electrically coupled with each of the faceplate and the remote plasma unit. The discharge tube may include ferrite extending about the central aperture of the discharge tube.

Abstract: Exemplary substrate support assemblies may include an electrostatic chuck body defining a support surface that defines a substrate seat. The substrate support surface may include a dielectric coating. The substrate support assemblies may include a support stem coupled with the electrostatic chuck body. The substrate support assemblies may include a cooling hub positioned below a base of the support stem and coupled with a cooling fluid source. The electrostatic chuck body may define at least one cooling channel that is in communication with a cooling fluid source. The substrate support assemblies may include a heater embedded within the electrostatic chuck body. The substrate support assemblies may include an AC power rod extending through the support stem and electrically coupled with the heater. The substrate support assemblies may include a plurality of voids formed within the electrostatic chuck body between the at least one cooling channel and the heater.

Abstract: Electroplating systems may include an electroplating chamber. The systems may also include a replenish assembly fluidly coupled with the electroplating chamber. The replenish assembly may include a first compartment housing anode material. The first compartment may include a first compartment section in which the anode material is housed and a second compartment section separated from the first compartment section by a divider. The replenish assembly may include a second compartment fluidly coupled with the electroplating chamber and electrically coupled with the first compartment. The replenish assembly may also include a third compartment electrically coupled with the second compartment, the third compartment including an inert cathode.

Abstract: Exemplary processing methods may include forming a plasma of a deposition precursor in a processing region of a semiconductor processing chamber. The methods may include adjusting a variable capacitor within 20% of a resonance peak. The variable capacitor may be coupled with an electrode incorporated within a substrate support on which a substrate is seated. The methods may include depositing a material on the substrate.

Abstract: Exemplary semiconductor processing systems may include a chamber body including sidewalls and a base. The system may include a substrate support extending through the base of the chamber body. The chamber body may define an access circumferentially extending about the substrate support at the base of the chamber body. The system may include one or more isolators disposed within the chamber body. The one or more isolators may define an exhaust path between the one or more isolators and the chamber body. The exhaust path may extend to the base of the chamber body. The systems may include a fluid source fluidly coupled with the chamber body at the access extending about the substrate support.

Abstract: Methods of enhancing selective deposition are described. In some embodiments, a passivation layer is deposited on a metal surface before deposition of a dielectric material. A block I molecule is deposited on a metal surface, and a block II molecule is reacted with the block I molecule to form a passivation layer.

Abstract: Exemplary semiconductor chamber component cleaning systems may include a receptacle. The receptacle may include a bottom lid that may be an annulus. The annulus may be characterized by an inner annular wall and an outer annular wall. A plurality of recessed annular ledges may be defined between the inner annular wall and the outer annular wall. Each recessed annular ledge of the plurality of recessed annular ledges may be formed at a different radial position along the bottom lid. The cleaning systems may include a top lid removably coupled with the bottom lid about an exterior region of the top lid. The cleaning systems may include a tank defining a volume to receive the receptacle.

Abstract: Exemplary semiconductor processing chambers may include a chamber body. The chambers may include a showerhead. The chambers may include a substrate support. The substrate support may include a platen characterized by a first surface facing the showerhead. The substrate support may include a shaft coupled with the platen along a second surface of the platen opposite the first surface of the platen. The shaft may extend at least partially through the chamber body. A coating may extend conformally about the first surface of the platen, the second surface of the platen, and about the shaft.

Abstract: Selective deposition methods are described. A passivation film is deposited on a metal surface before deposition of a dielectric material. Methods include exposing a substrate surface including a metal surface and a dielectric surface to a heterocyclic reactant comprising a head group and a tailgroup in a processing chamber and selectively depositing the heterocyclic reactant on the metal surface to form a passivation layer, wherein the heterocyclic headgroup selectively reacts and binds to the metal surface.

Abstract: A method of forming an interconnect structure for semiconductor devices is described. The method comprises depositing an etch stop layer on a substrate by physical vapor deposition followed by in situ deposition of a metal layer on the etch stop layer. The in situ deposition comprises flowing a plasma processing gas into the chamber and exciting the plasma processing gas into a plasma to deposit the metal layer on the etch stop layer on the substrate. The substrate is continuously under vacuum and is not exposed to ambient air during the deposition processes.

Abstract: Selective deposition methods are described. An exemplary method comprises exposing the substrate comprising a first surface and a second surface to an anchor reactant and selectively depositing the anchor reactant on the first surface as a seed layer, wherein the anchor reactant comprises an ethynyl derivative with a headgroup that selectively targets the first surface.

Abstract: Methods for filling a substrate feature with a carbon gap fill, while leaving a void, are described. Methods comprise flowing a process gas into a high density plasma chemical vapor deposition (HDP-CVD) chamber, the chamber housing a substrate having at least one feature, the process gas comprising a hydrocarbon reactant, generating a plasma, and depositing a carbon film.

Abstract: Exemplary semiconductor processing methods may include flowing deposition gases that may include a nitrogen-containing precursor, a silicon-containing precursor, and a carrier gas, into a substrate processing region of a substrate processing chamber. The flow rate ratio of the nitrogen-containing precursor to the silicon-containing precursor may be greater than or about 1:1. The methods may further include generating a deposition plasma from the deposition gases to form a silicon-and-nitrogen containing layer on a substrate in the substrate processing chamber. The silicon-and-nitrogen-containing layer may be treated with a treatment plasma, where the treatment plasma is formed from the carrier gas without the silicon-containing precursor. The flow rate of the carrier gas in the treatment plasma may be greater than a flow rate of the carrier gas in the deposition plasma.

Abstract: Exemplary semiconductor processing chambers may include a gasbox including a first plate having a first surface and a second surface opposite to the first surface. The first plate of the gasbox may define a central aperture that extends from the first surface to the second surface. The first plate may define an annular recess in the second surface. The first plate may define a plurality of apertures extending from the first surface to the annular recess in the second surface. The gasbox may include a second plate characterized by an annular shape. The second plate may be coupled with the first plate at the annular recess to define a first plenum within the first plate.

Abstract: Exemplary support assemblies may include an electrostatic chuck body defining a support surface that defines a substrate seat. The assemblies may include a support stem coupled with the chuck body. The assemblies may include a heater embedded within the chuck body. The assemblies may include a first bipolar electrode embedded within the electrostatic chuck body between the heater and support surface. The assemblies may include a second bipolar electrode embedded within the chuck body between the heater and support surface. Peripheral edges of one or both of the first and second bipolar electrodes may extend beyond an outer periphery of the seat. The assemblies may include an RF power supply coupled with the first and second bipolar electrodes. The assemblies may include a first floating DC power supply coupled with the first bipolar electrode. The assemblies may include a second floating DC power supply coupled with the second bipolar electrode.

Abstract: Wafer cassettes and methods of use that provide heating a cooling to a plurality of wafers to decrease time between wafer switching in a processing chamber. Wafers are supported on a wafer lift which can move all wafers together or on independent lift pins which can move individual wafers for heating and cooling.

Abstract: A method may include providing a substrate in a plasma chamber, the substrate comprising a monocrystalline semiconductor, having an upper surface. The method may include initiating a plasma in the plasma chamber, the plasma comprising an amorphizing ion species, and applying a pulse routine to the substrate, the pulse routine comprising a plurality of extraction voltage pulses, wherein a plurality of ion pulses are directed to the substrate, and wherein an ion dose per pulse is greater than a threshold for low dose amorphization.