Patents Assigned to Applied Material
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Publication number: 20200362458Abstract: Methods for depositing rhenium-containing thin films on a substrate are described. The substrate is exposed to a rhenium precursor and a reducing agent to form the rhenium-containing film (e.g., metallic rhenium, rhenium nitride). The exposures can be sequential or simultaneous.Type: ApplicationFiled: May 14, 2020Publication date: November 19, 2020Applicants: Applied Materials, Inc., Wayne State UniversityInventors: Thomas Knisley, Keenan N. Woods, Mark Saly, Stefan Cwik, Charles H. Winter
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Patent number: 10840132Abstract: Disclosed is a semiconductor processing approach wherein a wafer twist is employed to increase etch rate, at select locations, along a hole or space end arc. By doing so, a finished hole may more closely resemble the shape of the incoming hole end. In some embodiments, a method may include providing an elongated contact hole formed in a semiconductor device, and etching the elongated contact hole while rotating the semiconductor device, wherein the etching is performed by an ion beam delivered at a non-zero angle relative to a plane defined by the semiconductor device. The elongated contact hole may be defined by a set of sidewalls opposite one another, and a first end and a second end connected to the set of sidewalls, wherein etching the elongated contact hole causes the elongated contact hole to change from an oval shape to a rectangular shape.Type: GrantFiled: September 23, 2019Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Glen F. R. Gilchrist, Shurong Liang
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Patent number: 10840112Abstract: Disclosed herein is a ceramic article or coating useful in semiconductor processing, which is resistant to erosion by halogen-containing plasmas. The ceramic article or coating is formed from a combination of yttrium oxide and zirconium oxide.Type: GrantFiled: January 18, 2019Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Jennifer Y. Sun, Ren-Guan Duan, Jie Yuan, Li Xu, Kenneth S. Collins
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Patent number: 10840086Abstract: Embodiments include a method of processing a substrate. In an embodiment, the method comprises flowing one or more source gasses into a processing chamber, and inducing a plasma from the source gases with a plasma source that is operated in a first mode. In an embodiment, the method may further comprise biasing the substrate with a DC power source that is operated in a second mode. In an embodiment, the method may further comprise depositing a film on the substrate.Type: GrantFiled: April 27, 2018Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Kelvin Chan, Travis Koh, Simon Huang, Philip Allan Kraus
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Patent number: 10840062Abstract: A radio frequency (RF) filter system for a substrate processing chamber comprises a first RF filter coupled to a first element of the processing chamber and a second RF filter coupled to the first element of the processing chamber. Each of the RF filters comprises a first filter stage configured to reject a first frequency, a second filter stage coupled to the first filter stage and configured to reject a second frequency, and a third filter stage coupled to the second filter stage and configured to reject the first frequency. Further, the first filter stage comprises a first inductor and a first capacitance, the second filter stage comprises a second inductor and a second capacitance, the third filter stage comprises a third inductor and a third capacitance.Type: GrantFiled: October 14, 2019Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Andrew Nguyen, Michael G. Chafin, Lu Liu, Anilkumar Rayaroth
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Patent number: 10837111Abstract: A holding arrangement for supporting a substrate carrier and a mask carrier during layer deposition in a processing chamber is provided. The holding arrangement includes two or more alignment actuators connectable to at least one of the substrate carrier and the mask carrier, wherein the holding arrangement is configured to support the substrate carrier in, or parallel to, a first plane, wherein a first alignment actuator of the two or more alignment actuators is configured to move the substrate carrier and the mask carrier relative to each other at least in a first direction, wherein a second alignment actuator of the two or more alignment actuators is configured to move the substrate carrier and the mask carrier relative to each other at least in the first direction and a second direction different from the first direction, and wherein the first direction and the second direction are in the first plane.Type: GrantFiled: January 12, 2015Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Tommaso Vercesi, Dieter Haas, Stefan Bangert, Oliver Heimel, Daniele Gislon
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Patent number: 10840113Abstract: Disclosed herein is a ceramic article or coating useful in semiconductor processing, which is resistant to erosion by halogen-containing plasmas. The ceramic article or coating is formed from a combination of yttrium oxide and zirconium oxide.Type: GrantFiled: January 18, 2019Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Jennifer Y. Sun, Ren-Guan Duan, Jie Yuan, Li Xu, Kenneth S. Collins
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Patent number: 10840186Abstract: A first metallization layer comprises a set of first conductive lines that extend along a first direction on a first dielectric layer on a substrate. Pillars are formed on recessed first dielectric layers and a second dielectric layer covers the pillars. A dual damascene etch provides a contact hole through the second dielectric layer and an etch removes the pillars to form air gaps.Type: GrantFiled: July 25, 2019Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Susmit Singha Roy, Ziqing Duan, Abhijit Basu Mallick, Praburam Gopalraja
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Patent number: 10840104Abstract: Methods of etching a semiconductor substrate may include applying an etchant to the semiconductor substrate. The semiconductor substrate may include an exposed region of an oxygen-containing material and an exposed region of a nitrogen-containing material. The methods may include heating the semiconductor substrate from a first temperature to a second temperature. The methods may include maintaining the semiconductor substrate at the second temperature for a period of time sufficient to perform an etch of the nitrogen-containing material relative to the oxygen-containing material. The methods may also include quenching the etch subsequent the period of time.Type: GrantFiled: July 16, 2018Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Eric J. Bergman, John L. Klocke, Charles Sharbono, Kyle Moran Hanson, Paul McHugh
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Patent number: 10840100Abstract: The present invention generally describes one ore more methods that are used to perform an annealing process on desired regions of a substrate. In one embodiment, an amount of energy is delivered to the surface of the substrate to preferentially melt certain desired regions of the substrate to remove unwanted damage created from prior processing steps (e.g., crystal damage from implant processes), more evenly distribute dopants in various regions of the substrate, and/or activate various regions of the substrate. The preferential melting processes will allow more uniform distribution of the dopants in the melted region, due to the increased diffusion rate and solubility of the dopant atoms in the molten region of the substrate. The creation of a melted region thus allows: 1) the dopant atoms to redistribute more uniformly, 2) defects created in prior processing steps to be removed, and 3) regions that have hyper-abrupt dopant concentrations to be formed.Type: GrantFiled: November 26, 2018Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Paul Carey, Aaron Muir Hunter, Dean Jennings, Abhilash J. Mayur, Stephen Moffatt, William Schaffer, Timothy N. Thomas, Mark Yam
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Patent number: 10840088Abstract: Techniques for deposition of high-density dielectric films for patterning applications are described. More particularly, a method of processing a substrate is provided. The method includes flowing a precursor-containing gas mixture into a processing volume of a processing chamber having a substrate positioned on an electrostatic chuck. The substrate is maintained at a pressure between about 0.1 mTorr and about 10 Torr. A plasma is generated at the substrate level by applying a first RF bias to the electrostatic chuck to deposit a dielectric film on the substrate. The dielectric film has a refractive index in a range of about 1.5 to about 3.Type: GrantFiled: July 15, 2019Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Eswaranand Venkatasubramanian, Samuel E. Gottheim, Pramit Manna, Abhijit Basu Mallick
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Patent number: 10837121Abstract: Embodiments described herein generally relate to a susceptor support for supporting a susceptor in a deposition process. The susceptor support includes a shaft, a plate with a first major surface coupled to the shaft, and a support element extending from a second major surface of the plate. The plate may be made of a material that is optically transparent to the radiation energy from a plurality of energy sources disposed below the plate. The plate may have a thickness that is small enough to minimize radiation transmission loss and large enough to be thermally and mechanically stable to support the susceptor during processing. The thickness of the plate may range from about 2 mm to about 20 mm.Type: GrantFiled: March 27, 2017Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Richard O. Collins, Errol Antonio C. Sanchez, David K. Carlson, Mehmet Tugrul Samir
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Patent number: 10840138Abstract: Processing methods may be performed to expose a contact region on a semiconductor substrate. The methods may include selectively recessing a first metal on a semiconductor substrate with respect to an exposed first dielectric material. The methods may include forming a liner over the recessed first metal and the exposed first dielectric material. The methods may include forming a second dielectric material over the liner. The methods may include forming a hard mask over selected regions of the second dielectric material. The methods may also include selectively removing the second dielectric material to expose a portion of the liner overlying the recessed first metal.Type: GrantFiled: September 17, 2018Date of Patent: November 17, 2020Assignee: Applied Materials, Inc.Inventors: Yung-Chen Lin, Qingjun Zhou, Ying Zhang, Ho-yung Hwang
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Publication number: 20200357629Abstract: A method of forming an electronic device is disclosed. The method comprises forming a barrier layer on a silicon layer, and depositing a silicon oxide layer on the barrier layer. The formation of the barrier layer on the silicon layer minimizes parasitic oxidation of the underlying silicon layer and minimizes defects in the silicon layer.Type: ApplicationFiled: May 4, 2020Publication date: November 12, 2020Applicant: Applied Materials, Inc.Inventors: Benjamin Colombeau, Johanes F. Swenberg, Steven C.H. Hung
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Publication number: 20200356620Abstract: Various arrangements for performing vector-matrix multiplication are provided here. Digital input vectors that include binary-encoded values can be converted into a plurality of analog signals using a plurality of one-bit digital to analog converters (DACs). Using an analog vector matrix multiplier, a vector-matrix multiplication operation can be performed using a weighting matrix for each bit-order of the plurality of analog signals. For each performed vector-matrix multiplication operation, a bit-ordered indication of an output of the analog vector matrix multiplier may be stored. A bit-order weighted summation of the sequentially performed vector-matrix multiplication operation may be performed.Type: ApplicationFiled: May 9, 2019Publication date: November 12, 2020Applicant: Applied Materials, Inc.Inventors: She-Hwa Yen, Frank Tzen-Wen Guo
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Publication number: 20200357993Abstract: Exemplary methods of forming a memory structure may include forming a layer of a transition-metal-and-oxygen-containing material overlying a substrate. The substrate may include a first electrode material. The methods may include annealing the transition-metal-and-oxygen-containing material at a temperature greater than or about 500° C. The annealing may occur for a time period less than or about one second. The methods may also include, subsequent the annealing, forming a layer of a second electrode material over the transition-metal-and-oxygen-containing material.Type: ApplicationFiled: April 22, 2020Publication date: November 12, 2020Applicant: Applied Materials, Inc.Inventors: Nicolas Louis Gabriel Breil, Siddarth Krishnan, Shashank Sharma, Ria Someshwar, Kai Ng, Deepak Kamalanathan
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Publication number: 20200358163Abstract: The present disclosure relates to methods and apparatus for forming thin-form-factor reconstituted substrates and semiconductor device packages for radio frequency applications. The substrate and package structures described herein may be utilized in high-density 2D and 3D integrated devices for 4G, 5G, 6G, and other wireless network systems. In one embodiment, a silicon substrate is structured by laser ablation to include cavities for placement of semiconductor dies and vias for deposition of conductive interconnections. Additionally, one or more cavities are structured to be filled or occupied with a flowable dielectric material. Integration of one or more radio frequency components adjacent the dielectric-filled cavities enables improved performance of the radio frequency elements with reduced signal loss caused by the silicon substrate.Type: ApplicationFiled: April 7, 2020Publication date: November 12, 2020Applicant: Applied Materials, Inc.Inventors: Guan Huei SEE, Ramesh CHIDAMBARAM
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Patent number: 10829855Abstract: Embodiments disclosed herein generally relate to a gas distribution assembly for providing improved uniform distribution of processing gases into a semiconductor processing chamber. The gas distribution assembly includes a gas distribution plate, a blocker plate, and a dual zone showerhead. The gas distribution assembly provides for independent center to edge flow zonality, independent two precursor delivery, two precursor mixing via a mixing manifold, and recursive mass flow distribution in the gas distribution plate.Type: GrantFiled: April 20, 2017Date of Patent: November 10, 2020Assignee: Applied Materials, Inc.Inventors: Anh N. Nguyen, Dmitry Lubomirsky, Mehmet Tugrul Samir
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Patent number: 10831112Abstract: Provided herein are approaches for processing reticle blanks. In one approach, a reticle processing system includes a support assembly having a plate coupled to a frame, and a carrier assembly coupled to the support assembly. In one approach, the carrier assembly includes a carrier base coupled to the plate, a reticle disposed over the carrier base, and a carrier shield disposed over the reticle, wherein the carrier shield may include a central opening formed therein, allowing for placement and extraction of the reticle. In one approach, when the carrier assembly is placed atop the support assembly, a plurality of pins extend from the plate through corresponding openings in the carrier base, the plurality of pins supporting the carrier assembly so the carrier base, the reticle, and the carrier shield are each independently supported and vertically separated from one another.Type: GrantFiled: February 21, 2019Date of Patent: November 10, 2020Assignee: Applied Materials, Inc.Inventors: James Strassner, Charles Carlson, Robert Brent Vopat, Jeffrey Blahnik
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Patent number: 10832092Abstract: There is provided a method of examination of a semiconductor specimen. The method comprises: upon obtaining by a computer a Deep Neural Network (DNN) trained for a given examination-related application within a semiconductor fabrication process, processing together one or more fabrication process (FP) images using the obtained trained DNN, wherein the DNN is trained using a training set comprising synthetic images specific for the given application; and obtaining, by the computer, examination-related data specific for the given application, and characterizing at least one of the processed one or more FP images. Generating the training set can comprise: training an auxiliary DNN to generate a latent space, generating a synthetic image by applying the trained auxiliary DNN to a point selected in the generated latent space, and adding the generated synthetic image to the training set.Type: GrantFiled: February 7, 2019Date of Patent: November 10, 2020Assignee: Applied Materials Israel Ltd.Inventors: Ohad Shaubi, Assaf Asbag, Boaz Cohen