Patents Assigned to Applied Material
  • Patent number: 10781518
    Abstract: Embodiments of the disclosure include an electrostatic chuck assembly, a processing chamber and a method of maintaining a temperature of a substrate is provided. In one embodiment, an electrostatic chuck assembly is provided that includes an electrostatic chuck, a cooling plate and a gas box. The cooling plate includes a gas channel formed therein. The gas box is operable to control a flow of cooling gas through the gas channel.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: September 22, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Brian T. West, Manoj A. Gajendra, Soundarrajan Jembulingam
  • Patent number: 10784157
    Abstract: Described are doped TaN films, as well as methods for providing the doped TaN films. Doping TaN films with Ru, Cu, Co, Mn, Al, Mg, Cr, Nb, Ti and/or V allows for enhanced copper barrier properties of the TaN films. Also described are methods of providing films with a first layer comprising doped TaN and a second layer comprising one or more of Ru and Co, with optional doping of the second layer.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: September 22, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Annamalai Lakshmanan, Paul F. Ma, Mei Chang, Jennifer Shan
  • Patent number: 10774423
    Abstract: An apparatus and method are provided for controlling the intensity and distribution of a plasma discharge in a plasma chamber. In one embodiment, a shaped electrode is embedded in a substrate support to provide an electric field with radial and axial components inside the chamber. In another embodiment, the face plate electrode of the showerhead assembly is divided into zones by isolators, enabling different voltages to be applied to the different zones. Additionally, one or more electrodes may be embedded in the chamber side walls.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Karthik Janakiraman, Thomas Nowak, Juan Carlos Rocha-Alvarez, Mark A. Fodor, Dale R. Du Bois, Amit Bansal, Mohamad Ayoub, Eller Y. Juco, Visweswaren Sivaramakrishnan, Hichem M'Saad
  • Patent number: 10777414
    Abstract: Disclosed are methods for reducing transfer pattern defects in a semiconductor device. In some embodiments, a method includes providing a semiconductor device including a plurality of photoresist lines on a stack of layers, wherein the plurality of photoresist lines includes a bridge defect extending between two or more photoresist lines of the plurality of photoresist lines. The method may further include forming a plurality of mask lines by etching a set of trenches in a first layer of the stack of layers, and removing the bridge defect by etching the bridge defect at a non-zero angle of inclination with respect to a perpendicular to a plane of an upper surface of the stack of layers.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Regina Freed, Steven R. Sherman, Nadine Alexis, Lin Zhou
  • Patent number: 10773995
    Abstract: An article comprises a body having a coating. The coating comprising a eutectic system having a super-lattice of a first fluoride and a second fluoride. The coating includes a glaze on a surface of the coating, the glaze comprising the eutectic system having the super-lattice of the first fluoride and the second fluoride.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Chengtsin Lee, Jennifer Y. Sun
  • Patent number: 10777436
    Abstract: Embodiments of the present disclosure generally relate to expandable substrate inspection systems. The inspection system includes multiple metrology units adapted to inspect, detect, or measure one or more characteristics of a substrate, including thickness, resistivity, saw marks, geometry, stains, chips, micro cracks, and crystal fraction. The inspection systems may be utilized to identify defects on substrates and estimate cell efficiency prior to processing a substrate. Substrates may be transferred through the inspection system and/or between metrology units on a track or conveyor, and then sorted via at least one gripper coupled with the high speed rotatory sorting apparatus into respective bins based upon the inspection data. The rotary sorting apparatus maintains a sorting capability of at least 5,400 substrates per hour. Each bin may optionally have a gas support cushion for supporting the substrate as it falls from the rotary sorting apparatus into the respective bin.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Markus J. Stopper, Asaf Schlezinger
  • Patent number: 10777650
    Abstract: The present disclosure provides an apparatus and methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures field effect transistor (FET) for semiconductor chips. In one example, a method of forming nanowire structures includes depositing a dielectric material on a first side and a second side of a stack. The stack may include repeating pairs of a first layer and a second layer. The first side is opposite the second side and the first side and the second side have one or more recesses formed therein. The method includes removing the dielectric material from the first side and the second side of the stack. The dielectric material remains in the one or more recesses. The method includes the deposition of a stressor layer and the formation of one or more side gaps between the stressor layer and the first side and the second side of the stack.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Shiyu Sun, Nam Sung Kim, Bingxi Sun Wood, Naomi Yoshida, Sheng-Chin Kung, Miao Jin
  • Patent number: 10777391
    Abstract: A chamber component for a processing chamber is disclosed herein. In one embodiment, a chamber component for a processing chamber includes a component part body having unitary monolithic construction. The component part body has a textured surface. The textured surface includes a plurality of independent engineered macro features integrally formed with the component part body. The engineered macro features include a macro feature body extending from the textured surface.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Kadthala R. Narendrnath, Govinda Raj, Goichi Yoshidome, Bopanna Ichettira Vasantha, Umesh M. Kelkar
  • Patent number: 10775158
    Abstract: Optical grating components and methods of forming are provided. In some embodiments, a method includes providing an optical grating layer, and forming an optical grating in the optical grating layer, wherein the optical grating comprises a plurality of angled trenches disposed at a non-zero angle of inclination with respect to a perpendicular to a plane of the optical grating layer. The method may further include delivering light from a light source into the optical grating layer, and measuring at least one of: an undiffracted portion of the light exiting the optical grating layer, and a diffracted portion of the light exiting the optical grating layer.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Joseph C. Olson, Ludovic Godet, Rutger Meyer Timmerman Thijssen, Morgan Evans
  • Patent number: 10777394
    Abstract: Implementations of the present disclosure generally relate to methods for cleaning processing chambers. More specifically, implementations described herein relate to methods for determining processing chamber cleaning endpoints. In some implementations, a “virtual sensor” for detecting a cleaning endpoint is provided. The “virtual sensor” is based on monitoring trends of chamber foreline pressure during cleaning of the chamber, which involves converting solid deposited films on the chamber parts into gaseous byproducts by reaction with etchants like fluorine plasma for example. Validity of the “virtual sensor” has been confirmed by comparing the “virtual sensor” response with infrared-based optical measurements. In another implementation, methods of accounting for foreline pressure differences due to facility design and foreline clogging over time.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Hemant P. Mungekar, William Pryor, Zhijun Jiang
  • Publication number: 20200286897
    Abstract: Methods of forming memory devices are described. Some embodiments of the disclosure utilize a low temperature anneal process to reduce bottom voids and seams in low melting point, low resistance metal buried word lines. Some embodiments of the disclosure utilize a high density dielectric cap during a high temperature anneal process to reduce bottom voids in buried word lines.
    Type: Application
    Filed: February 28, 2020
    Publication date: September 10, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Priyadarshi Panda, Seshadri Ganguli, Sang Ho Yu, Sung-Kwan Kang, Gill Yong Lee, Sanjay Natarajan, Rajib Lochan Swain, Jorge Pablo Fernandez
  • Patent number: 10770329
    Abstract: A gas flow is described to reduce condensation with a substrate processing chuck. In one example, a workpiece holder in the chamber having a puck to carry the workpiece for fabrication processes, a top plate thermally coupled to the puck, a cooling plate fastened to and thermally coupled to the top plate, the cooling plate having a cooling channel to carry a heat transfer fluid to transfer heat from the cooling plate, a base plate fastened to the cooling plate opposite the puck, and a dry gas inlet of the base plate to supply a dry gas under pressure to a space between the base plate and the cooling plate to drive ambient air from between the base plate and the cooling plate.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: September 8, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Hun Sang Kim, Michael D. Willwerth
  • Patent number: 10766119
    Abstract: A computer implemented method of monitoring a polishing process includes, for each sweep of a plurality of sweeps of an optical sensor across a substrate undergoing polishing, obtaining a plurality of current spectra, each current spectrum of the plurality of current spectra being a spectrum resulting from reflection of white light from the substrate, for each sweep of the plurality of sweeps, determining a difference between each current spectrum and each reference spectrum of a plurality of reference spectra to generate a plurality of differences, for each sweep of the plurality of sweeps, determining a smallest difference of the plurality of differences, thus generating a sequence of smallest difference, and determining a polishing endpoint based on the sequence of smallest differences.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: September 8, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Boguslaw A. Swedek, Dominic J. Benvegnu, Jeffrey Drue David
  • Patent number: 10768612
    Abstract: Embodiments presented herein provide techniques for planning and scheduling in a factory. The technique begins by generating a bottleneck loading plan from a plurality of inputs. A simulation is run using the bottleneck loading plan. The factory is simulated using decisions made based on the bottleneck loading plan and a lot-to-machine schedule is generated with the simulation bottleneck loading plan.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: September 8, 2020
    Assignee: Applied Materials, Inc.
    Inventor: David Everton Norman
  • Patent number: 10770269
    Abstract: Embodiments of the present disclosure generally provide various apparatus and methods for reducing particles in a semiconductor processing chamber. One embodiment of present disclosure provides a vacuum screen assembly disposed over a vacuum port to prevent particles generated by the vacuum pump from entering substrate processing regions. Another embodiment of the present disclosure provides a perforated chamber liner around a processing region of the substrate. Another embodiment of the present disclosure provides a gas distributing chamber liner for distributing a cleaning gas around the substrate support under the substrate supporting surface.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: September 8, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Andrew Nguyen, Bradley Howard, Shahid Rauf, Ajit Balakrishna, Tom K. Choi, Kenneth S. Collins, Anand Kumar, Michael D. Willwerth, Yogananda Sarode Vishwanath
  • Patent number: 10770292
    Abstract: Methods of depositing a film selectively onto a first material relative to a second material are described. The substrate is pre-cleaned by heating the substrate to a first temperature, cleaning contaminants from the substrate and activating the first surface to promote formation of a self-assembled monolayer (SAM) on the first material. A SAM is formed on the first material by repeated cycles of SAM molecule exposure, heating and reactivation of the first material. A final exposure to the SAM molecules is performed prior to selectively depositing a film on the second material. Apparatus to perform the selective deposition are also described.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: September 8, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Chang Ke, Lei Zhou, Biao Liu, Cheng Pan, Yuanhong Guo, Liqi Wu, Michael S. Jackson, Ludovic Godet, Tobin Kaufman-Osborn, Erica Chen, Paul F. Ma
  • Patent number: 10770321
    Abstract: Embodiments of the present disclosure provide a method, system, and computer program product for monitoring a service life of a chamber component. In one example, the method includes receiving one or more power measurements of a semiconductor processing chamber from one or more sensors positioned about the semiconductor processing chamber. The processor compares the one or more power measurements to one or more threshold values corresponding to the service life of the chamber component. The processor determines whether the one or more power measurements exceed the threshold values. If the processor determines that the one or more power measurements exceed the threshold values, the processor takes remedial measures for the service life of the chamber component.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: September 8, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Kang-Lie Chiang, Greg A. Blackburn, Pallavi Zhang, Michael D. Armacost, Nitin Khurana
  • Patent number: 10770568
    Abstract: Methods for forming semiconductor devices, such as FinFETs, are provided. In an embodiment, a fin structure processing method includes removing a portion of a first fin of a plurality of fins formed on a substrate to expose a surface of a remaining portion of the first fin, wherein the fins are adjacent to dielectric material structures formed on the substrate; performing a deposition operation to form features on the surface of the remaining portion of the first fin by depositing a Group III-V semiconductor material in a substrate processing environment; and performing an etching operation to etch the features with an etching gas to form a plurality of openings between adjacent dielectric material structures, wherein the etching operation is performed in the same chamber as the deposition operation.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 8, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Xinyu Bao, Ying Zhang, Qingjun Zhou, YungChen Lin
  • Patent number: 10770270
    Abstract: An electrostatic chuck is described to carry a workpiece for processing such as high power plasma processing. In embodiments, the chuck includes a top plate to carry the workpiece, the top plate having an electrode to grip the workpiece, a cooling plate under the top plate to cool the top plate, a gas hole through the cooling plate and the top plate to feed a gas to the workpiece through the top plate, and an aperture-reducing plug in the cooling plate gas hole to conduct gas flow through the hole.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: September 8, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Jaeyong Cho, Haitao Wang, Vijay D. Parkhe, Kartik Ramaswamy, Chunlei Zhang
  • Patent number: 10770349
    Abstract: Processing methods to create self-aligned contacts are described. A conformal liner can be deposited in a feature in a substrate surface leaving a gap between the walls of the liner. A tungsten film can be deposited in the gap of the liner and volumetrically expanded. The expanded film can be removed and replaced with a contact material to a make a contact. In some embodiments, a conformal tungsten film can be formed in the feature leaving a gap between the walls. A dielectric can be deposited in the gap and the conformal tungsten film can be volumetrically expanded to grow two pillars. The pillars can be removed and replaced with a contact material to make two contacts.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: September 8, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Abhijit Basu Mallick, Ziqing Duan