Abstract: Embodiments of the present disclosure provide methods and apparatus for forming and patterning a spacer layer for multi-patterning processes. In one embodiment, a method for patterning a spacer layer on a substrate includes forming a protective layer on a spacer layer disposed on a structure disposed on a substrate, wherein the protective layer is formed predominately on a top surface of the spacer layer, than a bottom surface of the spacer layer, etching the spacer layer from the bottom surface, forming a polymer layer on the substrate, etching a top portion of the polymer layer and a first portion the spacer layer located the top surface of the structure, and removing the structure from the substrate and leaving a second portion the spacer layer on the substrate.

Abstract: The present disclosure generally relates to process chambers having modular design to provide variable process volume and improved flow conductance and uniformity. The modular design according to the present disclosure achieves improved process uniformity and symmetry with simplified chamber structure. The modular design further affords flexibility of performing various processes or processing substrates of various sizes by replacing one of more modules in a modular process chamber according to the present disclosure.

Abstract: Interconnects and methods for forming interconnects are described and disclosed herein. The interconnect contains a stack formed on a substrate having a via and a trench formed therein, a first metal formed from a first material of a first type deposited in the via, and a second metal formed from a second material of a second type deposited in the trench.

Abstract: A processing chamber for processing a substrate is disclosed herein. In one embodiment, the processing chamber includes a liner assembly disposed within an interior volume of the processing chamber, and a C-channel disposed in an interior volume of the chamber, circumscribing the liner assembly. In another embodiment, a process kit disposed in the interior volume of the processing chamber is disclosed herein. The process kit includes a liner assembly, a C-channel, and an isolator disposed in the interior volume. The C-channel and the isolator circumscribe the liner assembly. A method for depositing a silicon based material on a substrate by flowing a precursor gas into a processing chamber is also described herein.

Abstract: A collimator that is biasable is provided. The ability to bias the collimator allows control of the electric field through which the sputter species pass. In some implementations of the present disclosure, a collimator that has a high effective aspect ratio while maintaining a low aspect ratio along the periphery of the collimator of the hexagonal array of the collimator is provided. In some implementations, a collimator with a steep entry edge in the hexagonal array is provided. It has been found that use of a steep entry edge in the collimator reduces deposition overhang and clogging of the cells of the hexagonal array. These various features lead to improve film uniformity and extend the life of the collimator and process kit.

Abstract: Embodiments disclosed herein relate to a light pipe structure for thermal processing of semiconductor substrates. In one embodiment, a light pipe window structure for use in a thermal process chamber includes a transparent plate, and a plurality of light pipe structures formed in a transparent material that is coupled to the transparent plate, each of the plurality of light pipe structures comprising a reflective surface and having a longitudinal axis disposed in a substantially perpendicular relation to a plane of the transparent plate.

Abstract: Memory devices and methods of forming memory devices are described. The memory devices comprise a substrate with at least one film stack. The film stack comprises a polysilicon layer on the substrate; a bit line metal layer on the polysilicon layer; a cap layer on the bit line metal layer; and a hardmask on the cap layer. The memory device of some embodiments includes an optional barrier metal layer on the polysilicon layer and the bit line metal layer is on the barrier metal layer. Methods of forming electronic devices are described where one or more patterns are transferred through the films of the film stack to provide the bit line of a memory device.

Abstract: Thermal monitors comprising a substrate with at least one camera position on a bottom surface thereof, a wireless communication controller and a battery. The camera has a field of view sufficient to produce an image of at least a portion of a wafer support, the image representative of the temperature within the field of view. Methods of using the thermal monitors are also described.

Abstract: The present disclosure provides an apparatus for vacuum deposition on a substrate. The apparatus includes a vacuum chamber having a first area and a first deposition area, one or more deposition sources at the first deposition area, wherein the one or more deposition sources are configured for vacuum deposition on at least a first substrate while the at least a first substrate is transported along a first transport direction past the one or more deposition sources, and a first substrate transport unit in the first area, wherein the first substrate transport unit is configured for moving the at least a first substrate within the first area in a first track switch direction, which is different from the first transport direction.

Abstract: Exemplary etching methods may include flowing a fluorine-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include flowing a hydrogen-containing precursor into the substrate processing region. The methods may include contacting a substrate housed in the substrate processing region with the fluorine-containing precursor and the hydrogen-containing precursor. The substrate may include a trench or recessed feature, and a spacer may be formed along a sidewall of the trench or feature. The spacer may include a plurality of layers including a first layer of a carbon-containing or nitrogen-containing material and a second layer of an oxygen-containing material. The methods may also include removing the oxygen-containing material.

Abstract: Methods of modifying the threshold voltage of metal oxide stacks are discussed. These methods utilize materials which provide larger shifts in threshold voltage while also being annealed at lower temperatures.

Abstract: An additive manufacturing system includes a platen having a top surface to support an object being manufactured, a support structure, an actuator coupled to at least one of the platen or the support structure to create relative motion there between along a first axis parallel to the top surface, a plurality of printheads mounted on the support structure, and an energy source. Each printhead includes a dispenser to deliver a plurality of successive layers of feed material over the platen. The printheads are spaced along a second axis perpendicular to the first axis such that during motion along the first axis the plurality of printheads dispense feed material in a plurality of parallel swaths along the first axis. The energy source is configured to fuse at least a portion of the feed material.

Abstract: Embodiments include devices and methods for detecting particles in a wafer processing tool. In an embodiment, a particle monitoring device having a wafer form factor includes several micro sensors capable of operating in all pressure regimes, e.g., under vacuum conditions. The particle monitoring device may include a clock to output a time value when a parameter of a micro sensor changes in response to receiving a particle within a chamber of the wafer processing tool. A location of the micro sensor or the time value may be used to determine a source of the particle. Other embodiments are also described and claimed.

Abstract: A method for process analysis includes acquiring first inspection data, using a first inspection modality, with respect to a substrate having multiple instances of a predefined pattern of features formed thereon using different, respective sets of process parameters. Characteristics of defects identified in the first inspection data are processed so as to select a first set of defect locations in which the first inspection data are indicative of an influence of the process parameters on the defects. Second inspection data are acquired, using a second inspection modality having a finer resolution than the first inspection modality, of the substrate at the locations in the first set. The defects appearing in the second inspection data are analyzed so as to select, from within the first set of the locations, a second set of the locations in which the second inspection data are indicative of an optimal range of the process parameters.

Abstract: Embodiments described herein include a modular high-frequency emission source comprising a plurality of high-frequency emission modules and a phase controller. In an embodiment, each high-frequency emission module comprises an oscillator module, an amplification module, and an applicator. In an embodiment, each oscillator module comprises a voltage control circuit and a voltage controlled oscillator. In an embodiment, each amplification module is coupled to an oscillator module, in an embodiment, each applicator is coupled to an amplification module. In an embodiment, the phase controller is communicatively coupled to each oscillator module.

Abstract: Embodiments described provide dynamic imaging systems that compensates for pattern defects resulting from distortion caused by warpage of the substrate. The methods and apparatus described are useful to create compensated exposure patterns. The dynamic imaging system includes an inspection system configured to provide 3D profile measurements and die shift measurements of the first substrate to the interface configured to provide compensated pattern data to the digital lithography system configured to receive the compensated pattern data from the interface and expose the photoresist with a compensated pattern.

Abstract: A deposition system for depositing evaporated material on a substrate is described. The deposition system includes a vapor source having one or more vapor outlets; a shield; and a cooling device for cooling the shield, wherein the vapor source is movable to an idle position in which the one or more vapor outlets are directed toward the shield. Further, a deposition apparatus with a deposition system as well as a method of operating a deposition system are described.

Abstract: Processing methods to etch metal oxide films with less etch residue are described. The methods comprise etching a metal oxide film with a metal halide etchant, and exposing the etch residue to a reductant to remove the etch residue. Some embodiments relate to etching tungsten oxide films. Some embodiments utilize tungsten halides to etch metal oxide films. Some embodiments utilize hydrogen gas as a reductant to remove etch residues.

Abstract: The present disclosure provides a deposition apparatus for a vacuum deposition process. The deposition apparatus includes a vacuum chamber, a movable deposition source arranged in the vacuum chamber, and a supply arrangement providing a supply passage for media supply lines for the movable deposition source, wherein the supply arrangement comprises an axially deflectable element.

Abstract: Exemplary semiconductor processing chamber showerheads may include a dielectric plate characterized by a first surface and a second surface opposite the first surface. The dielectric plate may define a plurality of apertures through the dielectric plate. The dielectric plate may define a first annular channel in the first surface of the dielectric plate, and the first annular channel may extend about the plurality of apertures. The dielectric plate may define a second annular channel in the first surface of the dielectric plate. The second annular channel may be formed radially outward from the first annular channel. The showerheads may also include a conductive material embedded within the dielectric plate and extending about the plurality of apertures without being exposed by the apertures. The conductive material may be exposed at the second annular channel.