Abstract: Cleaning solutions and cleaning methods targeted to particular substrates and structures in semiconductor fabrication are described. A method of cleaning fragile structures having a dimension less than 0.15 um with a cleaning solution formed of a solvent having a surface tension less than water while applying acoustic energy to the substrate on which the structures are formed is described. Also, a method of cleaning copper with several different cleaning solutions, and in particular an aqueous sulfuric acid and HF cleaning solution, is described. Also, methods of cleaning both sides of a substrate at the same time with different cleaning solutions applied to the top and the bottom are described.

Abstract: The present invention provides a method of forming interconnects in a photovoltaic module. According to one aspect, a method according to the invention includes processing steps that are similar to those performed in conventional integrated circuit fabrication. For example, the method can include masks and etches to form isolation grooves between cells, and additional etches to form a conductive step adjacent to the grooves that can be used to form interconnects between cells. According to another aspect the method for forming the conductive step can be self-aligned, such as by positioning a mirror above the module and exposing photoresist from underneath the substrate at an angle one or more times, and etching to expose the conductive step. According to another aspect, the process can include steps to form grid lines in the module to improve current transport in the structure.

Abstract: A method of etching a substrate is provided. The method of etching a substrate includes transferring a pattern into the substrate using a double patterned amorphous carbon layer on the substrate as a hardmask. Optionally, a non-carbon based layer is deposited on the amorphous carbon layer as a capping layer before the pattern is transferred into the substrate.

Abstract: In a first aspect, a first method of mapping contents of a substrate carrier is provided. The first method includes the steps of (1) coupling a sensor to the substrate carrier or a loadport adapted to receive the substrate carrier; and (2) determining a presence or absence of a substrate in a slot of the substrate carrier using the sensor. Numerous other aspects are provided.

Abstract: In a first aspect, a first mainframe is provided for use during semiconductor device manufacturing. The first mainframe includes (1) a sidewall that defines a central transfer region adapted to house a robot; (2) a plurality of facets formed on the sidewall, each adapted to couple to a process chamber; and (3) an extended facet formed on the sidewall that allows the mainframe to be coupled to at least four full-sized process chambers while providing service access to the mainframe. Numerous other aspects are provided.

Abstract: A pulsed plasma system with pulsed sample bias for etching semiconductor structures is described. In one embodiment, a portion of a sample is removed by applying a pulsed plasma process, wherein the pulsed plasma process comprises a plurality of duty cycles. A negative bias is applied to the sample during the ON state of each duty cycle, while a zero bias is applied to the sample during the OFF state of each duty cycle. In another embodiment, a first portion of a sample is removed by applying a continuous plasma process. The continuous plasma process is then terminated and a second portion of the sample is removed by applying a pulsed plasma process.

Abstract: Methods are disclosed for adjusting the temperature of at least a portion of the surface of a reaction chamber during a film formation process to control film properties. More than one portion of the chamber surface may be temperature-modulated, and may be accomplished by actively keeping the temperature of a first wall of the reaction chamber above the temperature of a second wall during the film formation process.

Abstract: Plasma resistant coating materials, plasma resistant coatings and methods of forming such coatings on hardware components. In one embodiment, hardware component is an electrostatic chuck (ESC) and the plasma resistant coating is formed on a surface of the ESC. The plasma resistant coatings are formed by methods other than thermal spraying to provide plasma resistant coatings having advantageous material properties.

Abstract: A semiconductor device includes a gate, a source region and a drain region that are co-doped to produce a strain in the channel region of a transistor. The co-doping can include having a source and drain region having silicon that includes boron and phosphorous or arsenic and gallium. The source and drain regions can include co-dopant levels of more than 1020 atom/cm3. The source region and drain region each can be co-doped with more boron than phosphorous or can be co-doped with more phosphorous than boron. Alternatively, the source region and drain region each can be co-doped with more arsenic than gallium or can be co-doped with more gallium than arsenic. A method of manufacturing a semiconductor device includes forming a gate on top of a substrate and over a nitrogenated oxide layer, etching a portion of the substrate and nitrogenated oxide layer to form a recessed source region and a recessed drain region, filling the recessed source region and the recessed drain region with a co-doped silicon compound.

Abstract: Embodiments of the invention generally provide methods for end point detection at predetermined dopant concentrations during plasma doping processes. In one embodiment, a method includes positioning a substrate within a process chamber, generating a plasma above the substrate and transmitting a light generated by the plasma through the substrate, wherein the light enters the topside and exits the backside of the substrate, and receiving the light by a sensor positioned below the substrate. The method further provides generating a signal proportional to the light received by the sensor, implanting the substrate with a dopant during a doping process, generating multiple light signals proportional to a decreasing amount of the light received by the sensor during the doping process, generating an end point signal proportional to the light received by the sensor once the substrate has a final dopant concentration, and ceasing the doping process.

Abstract: Apparatus for processing a substrate in a physical vapor deposition chamber is provided herein. In one embodiment, apparatus for processing a substrate in a physical vapor deposition chamber having a target disposed in a lid assembly and a grounded chamber wall includes a ground frame and a ground shield. The ground frame is configured to be insulatively coupled to the lid assembly and has an electrically conductive lower surface. The ground shield has an electrically conductive wall that is adjustably and electrically coupled to the conductive lower surface of the ground frame. The ground shield is configured to circumscribe the target and has an upper edge configured to provide a gap between the upper edge and a peripheral edge of the target when installed.

Abstract: A method for inspecting a region, including irradiating the region via an optical system with a pump beam at a pump wavelength. A probe beam at a probe wavelength irradiates the region so as to generate returning probe beam radiation from the region. The beams are scanned across the region at a scan rate. A detector receives the returning probe radiation, and forms an image of the region that corresponds to a resolution better than pump and probe Abbe limits of the optical system. Roles of the pump and probe beams may be alternated, and a modulation frequency of the pump beam may be changed, to produce more information. Information extracted from the probe signal can also differentiate between different materials on the region.

Abstract: In an optical inspection tool, an image of an object under inspection, such as a semiconductor wafer, may be obtained using imaging optics defining a focal plane. Light comprising the image can be split into portions that are detected using multiple detectors which each register a portion of the image. The image of the object at the focal plane can be split into two, three, or more parts by polarization-based beam splitters and/or lenses positioned tangent to the focal plane. The splitting apparatus may comprise a pair of arrays of half-cylinder lenses comprising a convex side and a flat side. The arrays can be positioned with the cylinder axes perpendicular to one another and the flat sides facing each other. Thus, the pair of arrays can divide incoming light into a plurality of rectangular portions without introducing non-uniformities which would occur if several spherical lenses are configured for use in a rectangular array.

Abstract: A method for void free filling with in-situ doped amorphous silicon of a deep trench structure is provided in which a first fill is carried out in a way so that film deposition occurs from the bottom of the trench upwards, with step coverage well in excess of 100%. In a second fill step, deposition conditions are changed to reduce the impact of dopant on deposition rate, and deposition proceeds at a rate which exceeds the deposition rate of the first fill. In an application of this method to the formation of deep trench capacitor structures, the intermediate steps further including the capping of the void free filled trench with a thick layer of amorphous silicon, planarization of the wafer thereafter, followed by a thermal anneal to re-distribute the dopant within the filled trench. Thereafter, additional steps can be performed to complete the formation of the capacitor structure.

Abstract: A method of tuning an ion beam in an ion implanter relative to, e.g., ion beam current, energy, size and shape, includes retrieving a set of parameters associated with operation of the ion implanter, at least some of which are stored in a dynamic database, configuring the ion implanter according to the retrieved set of parameters, to thereby provide an ion beam, optimizing the ion beam by varying one or more of the parameters, and updating the parameters stored in the dynamic database which changed during optimization.

Abstract: Methods and apparatus are disclosed for the formation and utilization of metastable specie in a reaction chamber for processing substrates. The metastable specie may be used for etching the surface of substrates in situ, deposition processes during processing of the substrate.

Abstract: A method of manufacturing electrically tintable window glass with a variety of sizes and functionalities is described. The method comprises: (a) providing a large format glass substrate; (b) fabricating a plurality of electrically tintable thin film devices on the large format glass substrate; (c) cutting the large format glass substrate into a plurality of electrically tintable pieces, each electrically tintable piece including one of the plurality of electrically tintable thin film devices; (d) providing a plurality of window glass pieces; (e) matching each one of the plurality of electrically tintable pieces with a corresponding one of the plurality of window glass pieces; and (f) laminating each of the matched electrically tintable pieces and window glass pieces. The lamination may result in the electrically tintable device either being sandwiched between the glass substrate and the window glass piece or on the surface of the laminated pieces. The electrically tintable device is an electrochromic device.

Abstract: In one embodiment, a method for forming a tungsten-containing material on a substrate is provided which includes forming a tungsten-containing layer by sequentially exposing a substrate to a processing gas and a tungsten-containing gas during an atomic layer deposition process, wherein the processing gas comprises a boron-containing gas and a nitrogen-containing gas, and forming a tungsten bulk layer over the tungsten-containing layer by exposing the substrate to a deposition gas comprising the tungsten-containing gas and a reactive precursor gas during a chemical vapor deposition process. In one example, the tungsten-containing layer and the tungsten bulk layer are deposited within the same processing chamber.

Abstract: In a first aspect, a method of managing work in progress within a small lot size semiconductor device manufacturing facility is provided. The first method includes providing a small lot size semiconductor device manufacturing facility having (1) a plurality of processing tools; and (2) a high speed transport system adapted to transport small lot size substrate carriers among the processing tools. The method further includes maintaining a predetermined work in progress level within the small lot size semiconductor device manufacturing facility by (1) increasing an average cycle time of low priority substrates within the small lot size semiconductor device manufacturing facility; and (2) decreasing an average cycle time of high priority substrates within the small lot size semiconductor device manufacturing facility so as to approximately maintain the predetermined work in progress level within the small lot size semiconductor device manufacturing facility. Numerous other aspects are provided.

Abstract: Embodiments of the present invention provide methods of electroprocessing a substrate. One embodiment of the present invention provides a method comprises pressing a substrate against a polishing pad with a force less than about two pounds per square inch, the substrate contacting a first electrode of the polishing pad, applying an electrical bias to the substrate with the first electrode relative to a second electrode of the polishing pad, wherein the second electrode is disposed below the second electrode, and biasing a third electrode disposed in the polishing pad radially outward of the second electrode.