Abstract: A method of fabricating a semiconductor device, where the method includes forming a transistor on a substrate, where the transistor includes a channel region configured to conduct charge between a source region and a drain region, forming a trench adjacent to the transistor, depositing a material on the substrate and within the trench, and annealing the material, where the material is tensile following the annealing and creates a tensile stress in the channel region. Also, a method of forming a trench isolation in a semiconductor device, where the method includes forming a trench in a substrate, forming a material within the trench at a lower deposition rate, forming the material on the substrate at a higher deposition rate after the depositing of the material within the trench, and annealing the material, where after the annealing the material in the trench is tensile.

Abstract: Methods and systems are disclosed that provide multiple lithography exposures on a wafer, for example, using interference lithography and optical photolithography. Various embodiments may balance the dosage and exposure rates between the multiple lithography exposures to provide the needed exposure on the wafer. Other embodiments provide for assist features and/or may apply resolution enhancement to various exposures. In a specific embodiment, a wafer is first exposed using optical photolithography and then exposed using interference lithography.

Abstract: An electronic device manufacturing system is disclosed. The system includes a processing tool having one or more processing chambers each adapted to perform an electronic device manufacturing process on one or more substrates; a substrate carrier adapted to couple to the system and carry one or more substrates; and a component adapted to create a sealed environment relative to at least a portion of the substrate carrier and to substantially equalize the sealed environment with an environment within the substrate carrier. Methods of the invention are described as are numerous other aspects.

Abstract: Embodiments of the present invention are directed to an apparatus for generating a precursor for a semiconductor processing system (320). The apparatus includes a canister (300) having a sidewall (402), a top portion and a bottom portion. The canister (300) defines an interior volume (438) having an upper region (418) and a lower region (434). In one embodiment, the apparatus further includes a heater (430) partially surrounding the canister (300). The heater (430) creates a temperature gradient between the upper region (418) and the lower region (434). Also claimed is a method of forming a barrier layer from purified pentakis (dimethylamido) tantalum, for example a tantalum nitride barrier layer by atomic layer deposition.

Abstract: A process is provided for depositing an silicon oxide film on a substrate disposed in a process chamber. A process gas that includes a halogen source, a fluent gas, a silicon source, and an oxidizing gas reactant is flowed into the process chamber. A plasma having an ion density of at least 1011 ions/cm3 is formed from the process gas. The silicon oxide film is deposited over the substrate with a halogen concentration less than 1.0%. The silicon oxide film is deposited with the plasma using a process that has simultaneous deposition and sputtering components. The flow rate of the halogen source to the process chamber to the flow rate of the silicon source to the process chamber is substantially between 0.5 and 3.0.

Abstract: In one embodiment, a method for forming a tantalum-containing material on a substrate is provided which includes heating a liquid tantalum precursor containing tertiaryamylimido-tris(dimethylamido) tantalum (TAIMATA) to a temperature of at least 30° C. to form a tantalum precursor gas and exposing the substrate to a continuous flow of a carrier gas during an atomic layer deposition process. The method further provides exposing the substrate to the tantalum precursor gas by pulsing the tantalum precursor gas into the carrier gas and adsorbing the tantalum precursor gas on the substrate to form a tantalum precursor layer thereon. Subsequently, the tantalum precursor layer is exposed to at least one secondary element-containing gas by pulsing the secondary element-containing gas into the carrier gas while forming a tantalum barrier layer on the substrate.

Abstract: A method and system for inspecting an inspected object. The system includes: a detector adapted to detect charged particles scattered from a sample; a magnetic lens adapted to generate a magnetic field such as to direct a charge particle beam towards a sample and an first electrode positioned very close to an inspected object, wherein the first electrode comprises a very thin portion that defines a narrow aperture through which the charged particle beam can propagate.

Abstract: A method of depositing a silicon and nitrogen containing film on a substrate. The method includes introducing silicon-containing precursor to a deposition chamber that contains the substrate, wherein the silicon-containing precursor comprises at least two silicon atoms. The method further includes generating at least one radical nitrogen precursor with a remote plasma system located outside the deposition chamber. Moreover, the method includes introducing the radical nitrogen precursor to the deposition chamber, wherein the radical nitrogen and silicon-containing precursors react and deposit the silicon and nitrogen containing film on the substrate. Furthermore, the method includes annealing the silicon and nitrogen containing film in a steam environment to form a silicon oxide film, wherein the steam environment includes water and acidic vapor.

Abstract: A method of forming a silicon oxide layer on a substrate. The method includes providing a substrate and forming a first silicon oxide layer overlying at least a portion of the substrate, the first silicon oxide layer including residual water, hydroxyl groups, and carbon species. The method further includes exposing the first silicon oxide layer to a plurality of silicon-containing species to form a plurality of amorphous silicon components being partially intermixed with the first silicon oxide layer. Additionally, the method includes annealing the first silicon oxide layer partially intermixed with the plurality of amorphous silicon components in an oxidative environment to form a second silicon oxide layer on the substrate. At least a portion of amorphous silicon components are oxidized to become part of the second silicon oxide layer and unreacted residual hydroxyl groups and carbon species in the second silicon oxide layer are substantially removed.

Abstract: A conveyor apparatus adapted to transport and article is provided. The conveyor apparatus has a belt section including a plurality of slots and a plurality of T-shaped stiffeners extending in the slots. Respective belt sections may be spliced together using a plurality of T-shaped stiffeners extending through slots in diagonally-formed ends of each belt section. Methods of the invention are described as are numerous other aspects.

Abstract: A method of depositing a silicon oxide layer over a substrate includes providing a substrate to a deposition chamber. A first silicon-containing precursor, a second silicon-containing precursor and a NH3 plasma are reacted to form a silicon oxide layer. The first silicon-containing precursor includes at least one of Si—H bond and Si—Si bond. The second silicon-containing precursor includes at least one Si—N bond. The deposited silicon oxide layer is annealed.

Abstract: A method for forming a structure includes forming at least one feature across a surface of a substrate. A nitrogen-containing dielectric layer is formed over the at least one feature. A first portion of the nitrogen-containing layer on at least one sidewall of the at least one feature is removed at a first rate and a second portion of the nitrogen-containing layer over the substrate adjacent to a bottom region of the at least one feature is removed at a second rate. The first rate is greater than the second rate. A dielectric layer is formed over the nitrogen-containing dielectric layer.

Abstract: A method for forming a semiconductor structure includes reacting a silicon precursor and an atomic oxygen or nitrogen precursor at a processing temperature of about 150° C. or less to form a silicon oxide or silicon-nitrogen containing layer over a substrate. The silicon oxide or silicon-nitrogen containing layer is ultra-violet (UV) cured within an oxygen-containing environment.

Abstract: A method and apparatus for cleaning the bevel of a semiconductor substrate. The apparatus generally includes a cell body having upstanding walls and a fluid drain basin, a rotatable vacuum chuck positioned centrally positioned in the fluid drain basin, and at least 3 substrate centering members positioned at equal radial increments around the rotatable vacuum chuck. The substrate centering members include a vertically oriented shaft having a longitudinal axis extending therethrough, a cap member positioned over an upper terminating end of the shaft, a raised central portion formed onto the cap member, the raised central portion having a maximum thickness at a location the coincides with the longitudinal axis, and a substrate centering post positioned on the cap member radially outward of the raised central portion, an upper terminating end of the substrate centering post extending from the cap member to a distance that exceeds the maximum thickness.

Abstract: Methods and apparatus are provided for managing movement of small lots between processing tools within an electronic device manufacturing facility. In some embodiments, a number of priority lots to be processed is determined and an equivalent number of carrier storage locations are reserved at a substrate loading station of a processing tool. The number of reserved carrier storage locations are made available either by processing and advancing occupying non-priority lots and/or moving unprocessed occupying non-priority lots from the substrate loading station. Priority lots are then transferred to the reserved carrier storage locations. Other embodiments are provided.

Abstract: A retaining ring for chemical mechanical polishing is described. The ring has a bottom surface with non-intersecting grooves. Alternating grooves are at opposing angles to one another.

Abstract: A lid assembly for semiconductor processing is provided. In at least one embodiment, the lid assembly includes a first electrode comprising an expanding section that has a gradually increasing inner diameter. The lid assembly also includes a second electrode disposed opposite the first electrode. A plasma cavity is defined between the inner diameter of the expanding section of the first electrode and a first surface of the second electrode.

Abstract: A process kit for a semiconductor processing chamber is provided. In one embodiment, a process kit includes a notched deposition ring. In another embodiment, a process kit includes a cover ring configured to engage the notched deposition ring. In another embodiment, a process kit includes an annular deposition ring body having inner, outer, upper and bottom walls. A trough is recessed into an upper surface of the body between the upper and inner walls. A recessed surface is formed on a lower surface of the body between the bottom and inner walls. A notch extends inward from the body to catch deposition material passing through a notch of the substrate being processed.

Abstract: Method and apparatus for etching a metal layer disposed on a substrate, such as a photolithographic reticle, are provided. In one aspect, a method is provided for processing a substrate including positioning a substrate having a metal layer disposed on an optically transparent material in a processing chamber, introducing a processing gas processing gas comprising an oxygen containing gas, a chlorine containing gas, and a chlorine-free halogen containing gas, and optionally, an inert gas, into the processing chamber, generating a plasma of the processing gas in the processing chamber, and etching exposed portions of the metal layer disposed on the substrate.

Abstract: A plasma reactor chamber is characterized by performing the following steps: (a) for each one of the chamber parameters, ramping the level of the one chamber parameter while sampling RF electrical parameters at an RF bias power input to the wafer support pedestal and computing from each sample of the RF electrical parameters the values of the plasma parameters, and storing the values with the corresponding levels of the one chamber parameter as corresponding chamber parameter data; (b) for each one of the chamber parameters, deducing, from the corresponding chamber parameter data, a single variable function for each of the plasma parameters having the one chamber parameter as an independent variable.