Abstract: A gas mixing system for a semiconductor wafer processing chamber is described. The mixing system may include a gas mixing chamber concentrically aligned with a gas transport tube that extends to a blocker plate. The gas mixing chamber and the transport tube are separated by a porous barrier that increases a duration of gas mixing in the gas mixing chamber before processes gases migrate into the transport tube. The system may also include a gas mixing insert having a top section with a first diameter and a second section with a second diameter smaller than the first diameter and concentrically aligned with the top section. The processes gases enter the top section of the insert and follow channels through the second section that cause the gases to mix and swirl in the gas mixing chamber. The second section extends into the gas mixing chamber while still leaving space for the mixing and swirling around the sidewalls and bottom of the mixing chamber.

Abstract: A semiconductor processing system is described. The system includes a processing chamber having an interior capable of holding an internal chamber pressure below ambient atmospheric pressure. The system also includes a pumping system coupled to the chamber and adapted to remove material from the processing chamber. The system further includes a substrate support pedestal, where the substrate support pedestal is rigidly coupled to a substrate support shaft extending through a wall of the processing chamber. A bracket located outside the processing chamber is provided which is rigidly and sometimes rotatably coupled to the substrate support shaft. A motor coupled to the bracket can be actuated to vertically translate the substrate support pedestal, shaft and bracket from a first position to a second position closer to a processing plate.

Abstract: The present invention comprises an electrode arrangement for a coating device with a stationary first electrode (3) and a second movable electrode (18), whose principle surfaces are opposing each other during coating, wherein the second electrode (18) may be moved along a plane parallel to the opposing principle surfaces, wherein at least one end face of an electrode running transversely to the principal surface an electrical shield (12, 19, 13) is provided, which extends at least partially parallel to the end face of one electrode, wherein at least one part (14) of the shield is formed so as to be movable.

Abstract: A magnetic arrangement for a planar magnetron, in which an initial magnetic pole encompasses a second magnetic pole. This magnetic arrangement is moved linear in longitudinal direction to a target by a specific value and then moved back in opposite direction by the same value. In one version, an additional perpendicular motion is effected. The magnet arrangement is designed so that north and south pole interlock and waviform racetracks are generated. This enables constant sputtering from the entire target surface.

Abstract: In one aspect, improved methods and apparatus for pressure control in an electronic device manufacturing system are provided. The method includes acquiring information related to a current state of the electronic device manufacturing system, determining a desired value of a first parameter of the electronic device manufacturing system based on the acquired information and adjusting at least one parameter of a pump to obtain the desired value of the first parameter of the electronic device manufacturing system.

Abstract: Techniques for attaching a retaining ring to a carrier head so that the bottom surface of the retaining ring is orthogonal to a central rotational axis of the carrier head are described.

Abstract: A method of forming a dielectric stack on a pre-treated surface. The method comprises pre-cleaning a semiconductor wafer to remove native oxide, such as by applying hydrofluoric acid to form an HF-last surface, pre-treating the HF-last surface with ozonated deionized water, forming a dielectric stack on the pre-treated surface and providing a flow of NH3 in a process zone surrounding the wafer. Alternately, the method includes pre-treating the HF-last surface with NH3, forming the stack after the pre-treating, and providing a flow of N2 in a process zone surrounding the wafer after the forming. The method also includes pre-treating the HF-last surface using an in-situ steam generation process, forming the stack on the pre-treated surface, and annealing the wafer after the forming.

Abstract: The present invention generally provides methods and apparatus for controlling ion dosage in real time during plasma processes. In one embodiment, ion dosages may be controlled using in-situ measurement of the plasma from a mass distribution sensor combined with in-situ measurement from an RF probe.

Abstract: Techniques for a door system for sealing an opening between two chambers in a semiconductor processing system are described. The opening has at least one angled corner. The door system includes a door, actuator, and sealing member. The door is moveable in the plane and has at least one angled corner to align the door with the opening. The actuator moves the door to selectively open and close the opening. The sealing member seals the opening when the door is in a closed position. The door is sized to apply substantially uniform seal compression to the sealing member when in the closed position.

Abstract: A magnet/target assembly 1 comprises a target 2 consisting of a plurality of (virtual) segments 2.1, 2.2, 2.3, 2.4, 2.5, 2.6 arranged side by side, each of them extending along the longitudinal axis x of the target 2. Each of the plurality of target segments 2.1, 2.2, 2.3, 2.4, 2.5, 2.6 has a magnet system 3.1, 3.2, 3.3, 3.4, 3.5, 3.6 attributed to the respective target segment. In an embodiment of the target/magnet assembly 1 according to the present invention the magnet systems 3.1, 3.2, 3.3, 3.4, 3.5, 3.6 are arranged mutually offset relative to their respective adjacent magnet systems 3.1, 3.2, 3.3, 3.4, 3.5 and 3.6, respectively, while scanning the target segments 2.1, 2.2, 2.3, 2.4, 2.5 and 2.6, respectively. Particularly, the first magnet system 3.1, the third magnet system 3.3 and the fifth magnet system 3.5 are a first group of magnet systems moving parallel and synchronously with each other, and the second magnet system 3.2, the forth magnet systems 3.4 and the sixth magnet system 3.

Abstract: Methods and systems are disclosed that provide multiple lithography exposures on a wafer, for example, using interference lithography and optical photolithography. Various embodiments may balance the dosage and exposure rates between the multiple lithography exposures to provide the needed exposure on the wafer. Other embodiments provide for assist features and/or may apply resolution enhancement to various exposures. In a specific embodiment, a wafer is first exposed using optical photolithography and then exposed using interference lithography.

Abstract: In a semiconductor fabrication facility, a conveyor transports substrate carriers. The substrate carriers are unloaded from the conveyor and loaded onto the conveyor without stopping the conveyor. A load and/or unload mechanism lifts the substrate carriers from the conveyor during unloading operations, while matching the horizontal speed of the conveyor. Similarly, during loading operations, the load/unload mechanism lowers a substrate carrier into engagement with the conveyor while matching the horizontal speed of the conveyor. Individual substrates, without carriers, may be similarly loaded and/or unloaded from a conveyor.

Abstract: A quadruple electromagnetic coil array coaxially arranged in a rectangular array about a chamber axis outside the sidewalls of a plasma sputter reactor, preferably in back of an RF coil within the chamber. The coil currents can be separately controlled to produce different magnetic field distributions, for example, between a sputter deposition mode in which the sputter target is powered to sputter target material onto a wafer and a sputter etch mode in which the RF coil supports the gas sputtering the wafer. The coil array may include a tubular magnetic core, particularly useful for suppressing stray fields. A water cooling coil may be wrapped around the coil array to cool all the coils. The electromagnets can be powered in different relative polarities in a multi-step process.

Abstract: The present invention relates to an apparatus and method for improving and speeding up substrate loading process. One embodiment provides a method for vacuum chucking a substrate. The method comprises venting a center chamber of a flexible membrane configured for mounting the substrate, moving the substrate such that a backside of the substrate is in full contact with the flexible membrane, and vacuuming the center chamber to vacuum chuck the backside of the substrate to the flexible membrane.

Abstract: In one embodiment, a substrate centering apparatus for centering a substrate on a substrate support is provided. In one embodiment, the invention comprises an apparatus that is mounted to an underside of a substrate support and includes a lever that projects upward through a support surface of the substrate support. The lever may be biased toward a center of the substrate support to contact an edge of a substrate. A mechanism is coupled to the lever and moves the lever radially outward to release the substrate. In one embodiment, the mechanism is actuated as the substrate support moves downward to a position that facilitates substrate handoff.

Abstract: A circuit including: an optical detector for detecting an optical pulse and generating therefrom a current pulse on an output; a pulse detector circuit having an input electrically connected to the optical detector and having an output for outputting a detection pulse in response to detecting the current pulse on its input, said pulse detector circuit including: a resettable amplifier including an input for receiving the current pulse from the optical detector, a reset terminal for resetting the amplifier after the amplifier detects the current pulse on its input, and an output for outputting a signal from which the detection pulse is derived; and a reset delay chain feeding back to the reset terminal of the resettable amplifier a feedback signal derived from the output signal of the resettable amplifier.

Abstract: Methods and apparatus for correcting defects, such as rounded corners and line end shortening, in patterns formed via lithography are provided. Such defects are compensated for “post-rasterization” by manipulating the grayscale values of pixel maps.

Abstract: An optical signal distribution network including a semiconductor substrate including a waveguide formed therein to carry an optical signal; and a plurality of detectors within the waveguide and serially arranged along its length, each of the detectors being capable of detecting the optical signal passing through it and sufficiently transparent to the optical signal to enable the optical signal to reach and be detected by all of the plurality of detectors.

Abstract: A system and method for inspecting an object. The system includes: a traveling lens acousto-optic device adapted to generate a traveling lens that propagates through an active region of the traveling lens acousto-optic device; a first scanner, adapted to direct a beam of light towards the traveling lens while the traveling lens propagates; a first beam splitter, adapted to receive a beam formed by the traveling lens; and to split the scanned beam to multiple illuminating light beams; multiple detectors; and an objective lens; adapted to receive the multiple illuminating light beams, direct the multiple illuminating light beams towards multiple areas of the object, receive multiple collected light beams from the multiple areas of the object, and direct the multiple collected light beams towards the multiple detectors; wherein each detector is associated with an area of the multiple areas.

Abstract: A method for electrically testing a wafer that includes: receiving a wafer having a first layer that is at least partly conductive and a second layer formed over the first layer, following production of openings in the second layer; directing towards the wafer a first set of beams of charged particles that are oriented at a first set of angles in relation to the wafer, wherein each angle of the first set of angles deviates substantially from normal, so as to pre-charge an area of the second layer without substantially pre-charging the first layer; scanning the area of the wafer by a second set of beams of charged particles that are oriented at a second set of angles in relation to the wafer, and collecting charged particles scattered from the area wafer.