Patents Assigned to Avalanche Technology
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Patent number: 8542526Abstract: A method of making a magnetic random access memory cell includes forming a magnetic tunnel junction (MTJ) on top of a wafer, depositing oxide on top of the MTJ, depositing a photo-resist layer on top of the oxide layer, forming a trench in the photo-resist layer and oxide layer where the trench has a width that is substantially the same as that of the MTJ. Then, the photo-resist layer is removed and a hard mask layer is deposited on top of the oxide layer in the trench and the wafer is planarized to remove the portion of the hard mask layer that is not in the trench to substantially level the top of oxide layer and the hard layer on the wafer. The remaining oxide layer is etched and the MTJ is etched to remove the portion of the MTJ which is not covered by the hard mask layer.Type: GrantFiled: February 8, 2013Date of Patent: September 24, 2013Assignee: Avalanche Technology, Inc.Inventors: Parviz Keshtbod, Roger Klas Malmhall, Rajiv Yadav Ranjan
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Patent number: 8536063Abstract: Various embodiments of the invention relate to etching processes used in fabrication of MTJ cells in an MRAM device. The various embodiments can be used in combination with each other. The first embodiment adds a hard mask buffer layer between a hard mask and a top electrode. The second embodiment uses a multilayered etching hard mask. The third embodiment uses a multilayered top electrode structure including a first Cu layer under a second layer such as Ta. The fourth embodiment is a two-phase etching process used for the bottom electrode to remove re-deposited material while maintaining a more vertical sidewall etching profile. In the first phase the bottom electrode layer is removed using carbonaceous reactive ion etching until the endpoint. In the second phase an inert gas and/or oxygen plasma is used to remove the polymer that was deposited during the previous etching processes.Type: GrantFiled: August 30, 2011Date of Patent: September 17, 2013Assignee: Avalanche Technology Inc.Inventors: Kimihiro Satoh, Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Parviz Keshtbod, Roger K. Malmhall
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Patent number: 8535952Abstract: In accordance with a method of the present invention, a method of manufacturing a magnetic random access memory (MRAM) cell and a corresponding structure thereof are disclosed to include a multi-stage manufacturing process. The multi-stage manufacturing process includes performing a front end on-line (FEOL) stage to manufacture logic and non-magnetic portions of the memory cell by forming an intermediate interlayer dielectric (ILD) layer, forming intermediate metal pillars embedded in the intermediate ILD layer, depositing a conductive metal cap on top of the intermediate ILD layer and the metal pillars, performing magnetic fabrication stage to make a magnetic material portion of the memory cell being manufactured, and performing back end on-line (BEOL) stage to make metal and contacts of the memory cell being manufactured.Type: GrantFiled: February 29, 2008Date of Patent: September 17, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Publication number: 20130229866Abstract: A spin-torque transfer memory random access memory (STTMRAM) element, employed in a STTMRAM array, receives electric current for storage of digital information, the STTMRAM element has a magnetic tunnel junction (MTJ). The MTJ includes an anti-ferromagnetic (AF) layer, a fixed layer having a magnetization that is substantially fixed in one direction and that comprises a first magnetic layer, an AF coupling layer and a second magnetic layer, a barrier layer formed upon the fixed layer, and a free layer. The free layer is synthetic and has a high-polarization magnetic layer, a low-crystallization magnetic layer, a non-magnetic separation layer, and a magnetic layer, wherein during a write operation, a bidirectional electric current is applied across the STTMRAM element to switch the magnetization of the free layer between parallel and anti-parallel states relative to the magnetization of the fixed layer.Type: ApplicationFiled: March 22, 2013Publication date: September 5, 2013Applicant: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Roger Klas Malmhall
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Patent number: 8526234Abstract: An embodiment of the invention includes a mass storage device with a storage media that includes magnetic random access memory (MRAM) devices with a NAND flash interface and NAND flash memory devices that are coupled to the MRAM devices. The storage media is partitioned into a hybrid reserved area made of a combination of MRAM array NAND array and hybrid user area made of a combination of MRAM array and NAND array and further includes a controller with a host interface and flash interface coupled to the MRAM and NAND flash memory devices through a flash interface.Type: GrantFiled: December 7, 2012Date of Patent: September 3, 2013Assignee: Avalanche Technology, Inc.Inventor: Mehdi Asnaashari
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Publication number: 20130223141Abstract: A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.Type: ApplicationFiled: April 5, 2013Publication date: August 29, 2013Applicant: Avalanche Technology, Inc.Inventor: Avalanche Technology, Inc.
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Patent number: 8519496Abstract: A spin-transfer torque magnetic random access memory (STTMRAM) element is configured to store a state when electrical current is applied thereto. The STTMRAM element includes first and second free layers, each of which having an associated direction of magnetization defining the state of the STTMRAM element. Prior to the application of electrical current to the STTMRAM element, the direction of the magnetization of the first and second free layers each is in-plane and after the application of electrical current to the STTMRAM element, the direction of magnetization of the second free layer becomes substantially titled out-of-plane and the direction of magnetization of the first free layer switches. Upon electrical current being discontinued, the direction of magnetization of the second free layer remains in a direction that is substantially opposite to that of the first free layer.Type: GrantFiled: February 25, 2011Date of Patent: August 27, 2013Assignee: Avalanche Technology, Inc.Inventors: Yuchen Zhou, Yiming Huai, Rajiv Yadav Ranjan, Roger Klas Malmhall
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Publication number: 20130215673Abstract: A magnetoresistive logic cell (MRLC) is described that includes two MTJs in series that share a common free layer (CFL). The relative magnetization orientations of the CFL and the switchable reference layer (SRL) in MTJ-1 dominate the overall resistance of the MRLC without regard to the fixed magnetization orientation of the nonswitchable reference layer in MTJ-2. High and low resistance states of the MRLC occurs based on the relative magnetization orientations of SRL and CFL. This behavior allows the MRLC to be used as a logical comparator. The CFL is switched by STT effect by application of selected relatively short voltage pulses that do not switch the SRL. A voltage-induced switching principle can be used with MRLC embodiments of the present invention to switch the SRL to parallel or anti-parallel with respect to the magnetization CFL in both perpendicular and in-plane anisotropy embodiments.Type: ApplicationFiled: February 22, 2013Publication date: August 22, 2013Applicant: AVALANCHE TECHNOLOGY INC.Inventor: AVALANCHE TECHNOLOGY INC.
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Patent number: 8508984Abstract: A non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, and a free layer formed on top of the barrier layer, wherein the electrical resistivity of the barrier layer is reduced by placing said barrier layer under compressive stress. Compressive stress is induced by either using a compressive stress inducing layer, or by using inert gases at low pressure during the sputtering process as the barrier layer is deposited, or by introducing compressive stress inducing molecules into the molecular lattice of the barrier layer.Type: GrantFiled: February 29, 2008Date of Patent: August 13, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Patent number: 8498150Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.Type: GrantFiled: May 21, 2012Date of Patent: July 30, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Patent number: 8498148Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.Type: GrantFiled: May 18, 2012Date of Patent: July 30, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Patent number: 8498149Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.Type: GrantFiled: May 21, 2012Date of Patent: July 30, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Patent number: 8493779Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.Type: GrantFiled: May 18, 2012Date of Patent: July 23, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Patent number: 8493780Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.Type: GrantFiled: May 21, 2012Date of Patent: July 23, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Patent number: 8493778Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.Type: GrantFiled: May 18, 2012Date of Patent: July 23, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Patent number: 8493777Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The non-volatile current-switching magnetic memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer with a perpendicular anisotropy that is formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer, and a top electrode formed on top of the cap layer.Type: GrantFiled: April 23, 2012Date of Patent: July 23, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod
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Patent number: 8492860Abstract: A STTMRAM element includes a magnetization layer made of a first free layer and a second free layer, separated by a non-magnetic separation layer (NMSL), with the first and second free layers each having in-plane magnetizations that act on each other through anti-parallel coupling. The direction of the magnetization of the first and second free layers each is in-plane prior to the application of electrical current to the STTMRAM element and thereafter, the direction of magnetization of the second free layer becomes substantially titled out-of-plane and the direction of magnetization of the first free layer switches. Upon electrical current being discontinued to the STTMRAM element, the direction of magnetization of the second free layer remains in a direction that is substantially opposite to that of the first free layer.Type: GrantFiled: November 4, 2011Date of Patent: July 23, 2013Assignee: Avalanche Technology, Inc.Inventors: Yuchen Zhou, Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Roger Klas Malmhall
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Patent number: 8488376Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.Type: GrantFiled: May 21, 2012Date of Patent: July 16, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
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Patent number: 8477529Abstract: A magnetic random access memory (MRAM) cell includes an embedded MRAM and an access transistor. The embedded MRAM is formed on a number of metal-interposed-in-interlayer dielectric (ILD) layers, which each include metal dispersed therethrough and are formed on top of the access transistor. An magneto tunnel junction (MTJ) is formed on top of a metal formed in the ILD layers that is in close proximity to a bit line. An MTJ mask is used to pattern the MTJ and is etched to expose the MTJ. Ultimately, metal is formed on top of the bit line and extended to contact the MTJ.Type: GrantFiled: September 19, 2012Date of Patent: July 2, 2013Assignee: Avalanche Technology, Inc.Inventors: Parviz Keshtbod, Ebrahim Abedifard
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Patent number: 8477530Abstract: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.Type: GrantFiled: November 28, 2011Date of Patent: July 2, 2013Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Petro Estakhri, Mahmud Assar, Parviz Keshtbod